Integrated capacitor
By integrating the core group of DC Link capacitors and boost capacitors in the housing and drawing electrodes through the busbar, the problems of large space occupation and low installation efficiency caused by separate installation are solved, and efficient capacitor design is achieved, suitable for high-voltage applications. Scene.
Patent Information
- Application Number
- CN202323390343.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2023-12-12
- Publication Date
- 2025-01-14
- Estimated Expiration
- 2033-12-12
AI Technical Summary
In the existing system, DC-link capacitors and boost capacitors are installed separately, occupying a large space and low installation efficiency, resulting in low efficiency in high voltage applications.
Design an integrated capacitor to form an integrated capacitor by installing a core group of DC Link capacitors and boost capacitors in the housing, and lead the electrode out of the housing through the busbar to form an integrated capacitor, reducing space occupation and simplifying the assembly process.
It achieves space saving and improves assembly efficiency, is suitable for high-voltage application scenarios, and improves the overall efficiency of the system.
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Figure CN222354950U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of electronics, in particular to a capacitor. Background Art
[0002] With the rapid development of power electronics technology, metallized film capacitors are increasingly used in industrial control, new energy, automotive electronics, rail transit, power grid and other fields. In order to improve system efficiency and reduce the current of the line during fast charging, the high-voltage application of controllers is increasing. Therefore, a boost capacitor needs to be added to the system to increase the battery voltage or charging voltage to 800V.
[0003] In the related art, the DC-link capacitor and the boost capacitor are installed separately, which not only occupies a large space but also has low installation efficiency. Utility Model Content
[0004] The utility model aims to solve at least one of the technical problems in the above-mentioned technology to a certain extent. To this end, the purpose of the utility model is to provide an integrated capacitor, which can reduce the occupied space, simplify the assembly process, and improve the efficiency of factory line assembly.
[0005] In order to achieve the above object, the utility model proposes an integrated capacitor, which includes: a housing, a DC Link capacitor and a boost capacitor;
[0006] The housing defines a mounting cavity with one end open;
[0007] The DC Link capacitor comprises a first core group, a first busbar and a second busbar, wherein the first core group is arranged at one side of the installation cavity, and the first busbar and the second busbar are connected to two gold-sprayed surfaces of each core of the first core group in a one-to-one correspondence;
[0008] The boost capacitor comprises a second core group, a third busbar and a fourth busbar, the second core group is arranged on the other side of the mounting cavity, and the third busbar and the fourth busbar are connected to two gold-sprayed surfaces of each core of the second core group in a one-to-one correspondence.
[0009] According to the integrated capacitor proposed by the utility model, the core group of the DC Link capacitor and the boost capacitor is installed in the installation cavity of the shell, and the corresponding electrodes of the DC Link capacitor and the boost capacitor are led out of the shell through the busbar to form an integration of capacitors with different functions. The integrated capacitor can reduce the occupied space, simplify the assembly process, and improve the assembly efficiency of the factory line.
[0010] In addition, the integrated capacitor according to the above embodiment of the utility model may also have the following additional technical features:
[0011] Optionally, the first busbar defines a first pin, and the second busbar defines a second pin, and the first pin and the second pin are arranged at intervals in a horizontal direction and both extend outside the shell.
[0012] Furthermore, an insulating layer is provided between the first lead and the second lead, and the first lead and the second lead are provided close to the insulating layer.
[0013] Furthermore, each of the first pin and the second pin has a plurality of first pins and a plurality of second pins are staggered in a horizontal direction.
[0014] Optionally, a plurality of positioning holes are provided on the first busbar and the second busbar, and the plurality of positioning holes are matched with the positioning posts on the shell in a one-to-one correspondence.
[0015] Optionally, the third busbar defines a third pin, the fourth busbar defines a fourth pin, and the third pin and the fourth pin are arranged at intervals in the horizontal direction and both extend outside the shell.
[0016] Furthermore, the third pin and the fourth pin are both provided with connection holes.
[0017] Optionally, a plurality of mounting holes are provided on the outer edge of the shell.
[0018] Optionally, the first busbar, the second busbar, the third busbar and the fourth busbar are each provided with a plurality of connection parts, each core corresponds to at least one of the connection parts, and the connection parts are hollow structures. BRIEF DESCRIPTION OF THE DRAWINGS
[0019] Figure 1 is a schematic structural diagram of an integrated capacitor according to an embodiment of the utility model;
[0020] Figure 2 It is a partial structural schematic diagram of an integrated capacitor according to an embodiment of the utility model;
[0021] Figure 3 It is a partial structural schematic diagram of an integrated capacitor according to an embodiment of the utility model;
[0022] Description of reference numerals:
[0023] Housing 1, mounting cavity 11, mounting hole 12, positioning column 13;
[0024] DC Link capacitor 2, first core group 21, first busbar 22, first pin 221, connection portion 222, positioning hole 223, second busbar 23, second pin 231, insulation layer 24;
[0025] Boost capacitor 3, second core group 31, third busbar 32, third pin 321, fourth busbar 33, fourth pin 331;
[0026] Filling material 4. DETAILED DESCRIPTION
[0027] The embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are intended to be used to explain the present invention, and should not be construed as limiting the present invention.
[0028] In order to better understand the above technical solution, exemplary embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present invention are shown in the accompanying drawings, it should be understood that the present invention can be implemented in various forms and should not be limited by the embodiments described herein. On the contrary, these embodiments are provided to enable a more thorough understanding of the present invention and to fully convey the scope of the present invention to those skilled in the art.
[0029] In order to better understand the above technical solution, the above technical solution will be described in detail below in conjunction with the accompanying drawings and specific implementation methods.
[0030] Reference below Figure 1-Figure 3 , the implementation of the integrated capacitor proposed in the embodiment of the utility model is described in detail.
[0031] The integrated capacitor according to the embodiment of the utility model comprises: a housing 1 , a DC Link capacitor 2 and a boost capacitor 3 .
[0032] Specifically, the shell 1 defines an installation cavity 11 with one end open; the DC Link capacitor 2 has a first core group 21, a first busbar 22 and a second busbar 23, the first core group 21 is arranged on one side of the installation cavity 11, and the first busbar 22 and the second busbar 23 are connected to the two gold-sprayed surfaces of each core of the first core group 21 in a one-to-one correspondence; the boost capacitor has a second core group 31, a third busbar 32 and a fourth busbar 33, the second core group 31 is arranged in the installation cavity 11, and the third busbar 32 and the fourth busbar 33 are connected to the two gold-sprayed surfaces of each core of the second core group 31 in a one-to-one correspondence.
[0033] That is to say, the first core group 21 is composed of a plurality of cores and is installed on one side of the mounting cavity 11 of the shell 1, and the electrodes are led out of the shell 1 through the first busbar 22 and the second busbar 23, thereby forming a DC Link capacitor 2; similarly, the second core group 31 is composed of a plurality of cores and is installed on the other side of the mounting cavity 11 of the shell 1, and the electrodes are led out of the shell 1 through the third busbar 32 and the fourth busbar 33, thereby forming a boost capacitor 3.
[0034] Thus, the core group of the DC Link capacitor 2 and the boost capacitor 3 is installed in the installation cavity 11 of the housing 1, and the electrodes of the DC Link capacitor 2 and the boost capacitor 3 corresponding to each other are led out of the housing 1 through the busbar to form an integration of capacitors with different functions. The integrated capacitor can reduce the occupied space, simplify the assembly process, and improve the assembly efficiency of the factory line.
[0035] For the first busbar 22 and the second busbar 23, the first busbar 22 defines a first pin 221, and the second busbar 23 defines a second pin 231. The first pin 221 and the second pin 231 are arranged at intervals in the horizontal direction and both extend to the outside of the housing 1. It can be understood that by arranging the first pin 221 and the second pin 231 at intervals in the horizontal direction and both extending to the outside of the housing 1, there is a gap between each first pin 221 and the second pin 231, so that there is enough space to plug or weld with the counterpart without interfering with each other. Among them, the first busbar 22 and the second busbar 23 can be bent according to the shape of the housing 1 and the first core group 21, so that the first pin 221 and the second pin 231 extend from the opening of the housing 1.
[0036] For the isolation of different electrodes, an insulating layer 24 is provided between the first pin 221 and the second lead pin, and the first pin 221 and the second pin 231 are provided close to each other on the insulating layer 24. It can be understood that since the first busbar 22 and the second busbar 23 are bent so that the first pin 221 and the second pin 231 are uniformly extended from the open opening of the housing 1, but since the electrodes of the first pin 221 and the second pin 231 are different, the first pin 221 and the second lead pin can be insulated and isolated by the insulating layer 24, and at the same time, the distribution of the first pin 221 and the second pin 231 can be conveniently arranged on the same line to reduce the space occupied by the first pin 221 and the second pin 231, thereby facilitating the plugging or welding of the first pin 221 and the second pin 231 with the counterpart without interfering with each other. Among them, the insulating layer 24 can be insulating paper.
[0037] For the first pin 221 and the second pin 231, the first pin 221 and the second pin 231 each have a plurality of them, and the plurality of first pins 221 and the plurality of second pins 231 are staggered in the horizontal direction. It can be understood that by setting a plurality of first pins 221 and a plurality of second pins 231, it is possible to avoid current concentration on one pin, thereby reducing the heating of the busbar, and by staggering the plurality of first pins 221 and the plurality of second pins 231 in the horizontal direction, it is convenient for the first pin 221 and the second pin 231 to be butted or welded with the counterpart without interfering with each other. Among them, the number of the first pins 221 can be six, the number of the second pins 231 can be three, and each second pin 231 is arranged between two adjacent first pins 221.
[0038] For the positioning of the first busbar 22 and the second busbar 23, a plurality of positioning posts 13 are provided on the shell 1, and the first busbar 22 and the second busbar 23 are both provided with a plurality of positioning holes 223 to match the positioning posts one by one. It can be understood that since the busbar and the gold-sprayed surface of the core are mostly connected by welding, the positioning holes 223 cooperate with the positioning posts 13 on the shell 1, so that the position of the busbar and the correspondingly connected core is relatively fixed, thereby facilitating the welding of the busbar and the core. Among them, the positioning posts 13 of the shell 1 can be integrally formed with the shell 1, and the number of the positioning posts 13 can be two.
[0039] For the third busbar 32 and the fourth busbar 33, the third busbar 32 defines a third pin 321, and the fourth busbar 33 defines a second pin 231. The third pin 321 and the fourth pin 331 are arranged at intervals and both extend to the outside of the housing 1. It can be understood that the third pin 321 and the fourth pin 331 are arranged at intervals and both extend to the outside of the housing 1, so that the third pin 321 and the fourth pin 331 can be easily led to the outside of the housing 1, so that the third pin 321 and the fourth pin 331 can be butted or welded with the counterpart without interfering with each other. Among them, the third busbar 32 and the fourth busbar 33 can be bent according to the shape of the housing 1 and the second core group 31, so that the third pin 321 and the fourth pin 331 extend from the opening of the housing 1.
[0040] Furthermore, the third pin 321 and the fourth pin 331 are both provided with connection holes. It can be understood that the connection holes of the third pin 321 and the fourth pin 331 can be arranged to facilitate the connection between the connection holes and the external circuit. The connection holes and the counterpart can be plugged, welded or fastened with fasteners to the connection holes.
[0041] For sealing of the housing 1, the gap of the housing 1 is filled with a filler 4 to fill the opening of the housing 1 flat. It can be understood that after the core and the busbar are welded, the gap of the housing 1 is filled with the filler 4 until the opening of the housing 1 is filled flat, so that the components installed in the housing 1 are sealed to form a whole. The filler 4 can be a resin.
[0042] For overall installation, a plurality of mounting holes 12 are provided on the outer edge of the housing 1. It can be understood that the integrated capacitor can be easily installed and fixed at a desired position through the provision of the mounting holes 12. The number of the mounting holes 12 can be four.
[0043] For the connection between the busbar and the core, the first busbar 22, the second busbar 23, the third busbar 32 and the fourth busbar 33 are provided with a plurality of connecting parts 222, and each core corresponds to at least one of the connecting parts 222, and the connecting parts 222 are hollow structures. It can be understood that the hollow setting of the connecting parts 222 facilitates the welding connection between the busbar and the core, thereby facilitating the parallel connection between the cores to form a core group. Among them, one core can correspond to two connecting parts 222; the connecting part 222 can be a U-shaped hollow groove, which is convenient for increasing the contact surface of the welding and making the welding more firm. .
[0044] In the description of the present invention, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.
[0045] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features. In the description of the present utility model, the meaning of "plurality" is two or more, unless otherwise clearly and specifically defined.
[0046] In the present invention, unless otherwise clearly specified and limited, the terms "install", "connect", "connect", "fix" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.
[0047] In the present utility model, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may include that the first and second features are in direct contact, or may include that the first and second features are not in direct contact but are in contact through another feature between them. Moreover, a first feature being "above", "above" and "above" a second feature includes that the first feature is directly above and obliquely above the second feature, or simply indicates that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature includes that the first feature is directly below and obliquely below the second feature, or simply indicates that the first feature is lower in level than the second feature.
[0048] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "example", "specific example", or "some examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the utility model. In this specification, the schematic representation of the above terms should not be understood as necessarily being directed to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner. In addition, those skilled in the art may combine and combine different embodiments or examples described in this specification.
[0049] Although the embodiments of the present invention have been shown and described above, it can be understood that the above embodiments are exemplary and cannot be understood as limitations of the present invention. Ordinary technicians in the field can change, modify, replace and modify the above embodiments within the scope of the present invention.
Claims
1. An integrated capacitor, characterized in that: include: Casing, DC Link capacitor and boost capacitor; The housing defines a mounting cavity with one end open; The DC Link capacitor comprises a first core group, a first busbar and a second busbar, wherein the first core group is arranged at one side of the installation cavity, and the first busbar and the second busbar are connected to two gold-sprayed surfaces of each core of the first core group in a one-to-one correspondence; The boost capacitor comprises a second core group, a third busbar and a fourth busbar, the second core group is arranged on the other side of the mounting cavity, and the third busbar and the fourth busbar are connected to two gold-sprayed surfaces of each core of the second core group in a one-to-one correspondence.
2. The integrated capacitor according to claim 1, characterized in that The first busbar defines a first pin, and the second busbar defines a second pin. The first pin and the second pin are arranged at intervals in a horizontal direction and both extend outside the housing.
3. The integrated capacitor according to claim 2, characterized in that An insulating layer is arranged between the first pin and the second pin, and the first pin and the second pin are arranged close to the insulating layer.
4. The integrated capacitor according to claim 2, characterized in that There are a plurality of the first pins and a plurality of the second pins, and the plurality of the first pins and the plurality of the second pins are staggered in a horizontal direction.
5. The integrated capacitor according to claim 1, characterized in that The first busbar and the second busbar are both provided with a plurality of positioning holes, and the plurality of positioning holes are matched with the positioning posts on the shell in a one-to-one correspondence.
6. The integrated capacitor according to claim 1, wherein: The third busbar defines a third pin, the fourth busbar defines a fourth pin, and the third pin and the fourth pin are arranged at intervals in the horizontal direction and both extend outside the housing.
7. The integrated capacitor according to claim 6, characterized in that The third pin and the fourth pin are both provided with connection holes.
8. The integrated capacitor according to claim 1, wherein: The outer edge of the shell is provided with a plurality of mounting holes.
9. The integrated capacitor according to claim 1, wherein: The first busbar, the second busbar, the third busbar and the fourth busbar are each provided with a plurality of connection parts, each core corresponds to at least one of the connection parts, and the connection parts are in a hollow structure.