IC chip and implantable nerve stimulator

Abstract

The utility model relates to an IC chip and an implantable nerve stimulator. The IC chip comprises a wafer; an IC die bonded to the wafer; and a redistribution layer disposed opposite to the IC die, the IC tube core is rectangular; the IC tube core is provided with a pin, and the width of the pin is D1; the rewiring layer is provided with a convex point, the convex point abuts against the pin, the width of the convex point is D2, and D2 is smaller than D1. Because D2 is smaller than D1, after the IC tube core is subjected to position offset relative to the rewiring layer due to glue solidification, the contact area between the IC tube core and the salient points is still large, and the IC tube core can still be reliably and electrically connected with the rewiring layer.

Description

Technical Field

[0001] The present application relates to the field of electrical hardware technology, and in particular to an IC chip and an implantable neural stimulator. Background Art

[0002] Implantable neurostimulators include fully implantable neurostimulators and semi-implantable neurostimulators. Fully implantable neurostimulators are completely implanted in the patient's body, while semi-implantable neurostimulators are partially implanted in the patient's body and the other part is located outside the patient's body. Implantable neurostimulators are usually small in size to facilitate implantation in the patient's body and reduce the impact on the patient's body.

[0003] Through experiments, it was found that designing the implantable neurostimulator into a slender rod-like structure can help reduce the difficulty of implanting the implantable neurostimulator, reduce the surgical wound, reduce the impact on the patient's body, and reduce the patient's discomfort.

[0004] In order to make the implantable neurostimulator as thin as possible, the circuit board can be designed to be as narrow as possible. In order to design the circuit board as narrow as possible, the IC chip installed on the circuit board is required to be as narrow as possible. Among them, the full name of IC is Integrated Circuit, which means integrated circuit in Chinese. The IC chip includes an IC die, a wafer, a redistribution layer and a ball. The IC die is bonded to the wafer. A bump of the redistribution layer abuts against the pin of the IC die to electrically connect to the IC die, and the bump at the other end of the redistribution layer is connected to the ball, so that the IC die pin is led out to the ball, and finally it is convenient to mount it on the PCB through the ball. During the bonding of the IC die and the wafer and the wafer reconstruction and curing process, glue is used in many places. The IC die is the core structure of the IC chip. To make the IC chip as narrow as possible, the IC die is required to be as narrow as possible. However, the narrower the IC chip, the longer the IC chip. Through experiments, it was found that when the IC die has a long and narrow structure, during the process of bonding the IC die to the wafer and reconstructing and curing the wafer, the IC die will rotate significantly and move to a certain extent due to the unevenness of the glue curing stress. This causes the IC die to have a large positional offset relative to the redistribution layer, causing a part of the contact surface on the bump used to abut the pin to detach from the pin, resulting in a significant reduction in the contact area between the IC die and the redistribution layer, thereby reducing the reliability of the electrical connection between the IC die and the redistribution layer. Utility Model Content

[0005] Based on this, it is necessary to provide an IC chip and an implantable neurostimulator to address the above problems. In the IC chip, after the IC die is shifted relative to the redistribution layer due to the curing of the glue, it can still be reliably electrically connected to the redistribution layer.

[0006] In order to solve the above problems, the present application provides the following technical solutions:

[0007] An IC chip, comprising:

[0008] Wafer;

[0009] An IC die is bonded to the wafer; and

[0010] A redistribution layer is arranged opposite to the IC die;

[0011] The IC die is rectangular in shape; the IC die has a pin, and the width of the pin is D1; ​​the redistribution layer has a bump, and the bump abuts against the pin, and the width of the bump is D2, D2<D1.

[0012] The IC chip has at least the following beneficial effects:

[0013] Because D2 is less than D1, after the IC die is shifted relative to the redistribution layer due to the curing of the glue, the contact area between the IC die and the bumps is still large, and the IC die can still be reliably electrically connected to the redistribution layer.

[0014] In one embodiment, the width and length of the IC die are D3 and L3 respectively, and L3≤3D3.

[0015] Such an arrangement can ensure that the IC die and the redistribution layer are always reliably electrically connected, and can also ensure that no cracks occur during the chip dicing process.

[0016] In one embodiment, D1≥D2×(1+0.1L3 / D3).

[0017] Such an arrangement can ensure that the electrical connection between the IC die and the redistribution layer is always in the best state.

[0018] In one embodiment, D1≤D2×(1+0.2L3 / D3).

[0019] With this arrangement, more pins can be arranged on the IC die.

[0020] The present application also provides an implantable neurostimulator, which includes a circuit board and the above-mentioned IC chip, wherein a plurality of the IC chips are provided, and each of the IC chips is arranged on the circuit board.

[0021] Because the implantable neurostimulator includes the above-mentioned IC chip, after the IC die is displaced relative to the redistribution layer due to the curing of the glue, the contact area between the IC die and the bumps is still large, and the IC die can still be reliably electrically connected to the redistribution layer. Therefore, the IC die can be made as narrow as possible. When the IC die can be made as narrow as possible, the circuit board can be made as narrow as possible. When the circuit board can be made as narrow as possible, the implantable neurostimulator can be made as slender as possible to facilitate implantation in the patient's body and reduce the impact on the patient's body. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 This is a schematic diagram of the structure of an IC chip according to an embodiment of the present application.

[0023] Reference numerals:

[0024] 1. IC die; 11. Pins; 2. Redistribution layer; 21. Bumps. DETAILED DESCRIPTION

[0025] In order to make the above-mentioned purposes, features and advantages of the present application more obvious and easy to understand, the specific implementation methods of the present application are described in detail below in conjunction with the accompanying drawings. In the following description, many specific details are set forth to facilitate a full understanding of the present application. However, the present application can be implemented in many other ways different from those described herein, and those skilled in the art can make similar improvements without violating the connotation of the present application, so the present application is not limited by the specific embodiments disclosed below.

[0026] In the description of the present application, it should be understood that the terms "center", "longitudinal", "lateral", "length", "width", "thickness", "up", "down", "front", "back", "left", "right", "vertical", "horizontal", "top", "bottom", "inside", "outside", "clockwise", "counterclockwise", "axial", "radial", "circumferential" and the like indicate orientations or positional relationships based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present application and simplifying the description, and do not indicate or imply that the referred device or element must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present application.

[0027] In addition, the terms "first" and "second" are used for descriptive purposes only and should not be understood as indicating or implying relative importance or implicitly indicating the number of the indicated technical features. Therefore, the features defined as "first" and "second" may explicitly or implicitly include at least one of the features. In the description of this application, the meaning of "plurality" is at least two, such as two, three, etc., unless otherwise clearly and specifically defined.

[0028] In this application, unless otherwise clearly specified and limited, the terms "installed", "connected", "connected", "fixed" and the like should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium, it can be the internal connection of two elements or the interaction relationship between two elements, unless otherwise clearly defined. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.

[0029] In the present application, unless otherwise clearly specified and limited, a first feature being "above" or "below" a second feature may mean that the first and second features are in direct contact, or that the first and second features are in indirect contact through an intermediate medium. Moreover, a first feature being "above", "above" and "above" a second feature may mean that the first feature is directly above or obliquely above the second feature, or simply means that the first feature is higher in level than the second feature. A first feature being "below", "below" and "below" a second feature may mean that the first feature is directly below or obliquely below the second feature, or simply means that the first feature is lower in level than the second feature.

[0030] It should be noted that when an element is referred to as being "fixed to" or "disposed on" another element, it may be directly on the other element or there may be a central element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. The terms "vertical", "horizontal", "upper", "lower", "left", "right" and similar expressions used herein are for illustrative purposes only and are not intended to be the only implementation method.

[0031] See also Figure 1 The present application first provides an IC chip, which includes a wafer, an IC die 1 and a redistribution layer 2. The IC die 1 is bonded to the wafer, and the redistribution layer 2 is arranged opposite to the IC die 1. In order to make the IC die 1 as narrow as possible, the IC die 1 is rectangular. The IC die 1 has a pin 11, and the width of the pin 11 is D1. The redistribution layer 2 has a bump 21, and the bump 21 abuts against the pin 11, and the width of the bump 21 is D2, and D2<D1. Because D2<D1, after the IC die 1 is shifted relative to the redistribution layer 2 due to the curing of the glue between the IC die 1 and the wafer, the contact area between the IC die 1 and the bump 21 is still large, and the IC die 1 can still be reliably electrically connected to the redistribution layer 2.

[0032] It was found through experiments that although the above positional deviation is caused by both the rotation and movement of the IC die 1 , the above positional deviation is mainly caused by the rotation of the IC die 1 , and the movement of the IC die 1 has a relatively small impact on the above positional deviation.

[0033] The rotation direction of the IC die 1 during the curing process of the glue between the IC die 1 and the wafer is defined as the first rotation direction. Preferably, when the IC die 1 is bonded to the wafer, the bump 21 is located in the central area of ​​the contact surface on the pin 11 for abutting the bump 21. In this way, no matter whether the first rotation direction is clockwise or counterclockwise, after the IC die 1 has a large positional displacement relative to the redistribution layer 2, most of the contact surface on the bump 21 for abutting the pin 11 will remain on the pin 11.

[0034] If the manufacturer can determine the first rotation direction based on its own production conditions, the bump 21 can be located at the edge area of ​​the contact surface on the pin 11 for abutting the bump 21 when the IC die 1 is bonded to the wafer. In this way, after a large position shift of the IC die 1 relative to the redistribution layer 2 occurs, the bump 21 can be shifted from the edge area on one side of the contact surface on the pin 11 for abutting the bump 21 to the edge area on the other side of the contact surface on the pin 11 for abutting the bump 21, which is beneficial for allowing more of the contact surface on the bump 21 for abutting the pin 11 to remain on the pin 11.

[0035] It can be understood that, compared with the prior art, the above technical solution ensures that the contact area between the IC die 1 and the redistribution layer 2 is always large by increasing the size of the pin 11, thereby ensuring that the IC die 1 is reliably electrically connected to the redistribution layer 2. The more the size of the pin 11 is increased, the more conducive it is to making the IC die 1 and the redistribution layer 2 reliably electrically connected.

[0036] Through experiments, it is found that the narrower the IC die 1 is (correspondingly, the longer the IC die 1 will be), the greater the positional offset of the IC die 1 relative to the redistribution layer 2 will occur after the glue is cured. The narrower the IC die 1 is, the larger the size of the pin 11 needs to be to ensure that the contact area between the IC die 1 and the redistribution layer 2 is always large. However, the area on the IC die 1 for setting a single pin 11 is limited. In other words, the size of the pin 11 is limited and cannot be increased infinitely. Therefore, the width of the IC die 1 cannot be reduced infinitely. The width and length of the IC die 1 are defined as D3 and L3 respectively. Through experiments, it is found that when L3>3D3, it is difficult to increase the size of the pin 11 so that the IC die 1 is still reliably electrically connected to the redistribution layer 2 after the positional offset occurs relative to the redistribution layer 2, and cracks may occur during the chip dicing process. In order to ensure that the IC die 1 is always reliably electrically connected to the redistribution layer 2 and that the chip dicing process does not cause cracks, in the IC chip provided in this application, L3≤3D3.

[0037] Through experiments, it is found that when D1≥D2×(1+0.1L3 / D3), after the IC die 1 is displaced relative to the redistribution layer 2 due to the curing of the glue, all parts of the contact surface of the bump 21 that is used to abut against the pin 11 are still in contact with the pin 11 in most cases, which makes the electrical connection between the IC die 1 and the redistribution layer 2 always in the best state. In order to ensure that the electrical connection between the IC die 1 and the redistribution layer 2 is always in the best state, in the IC chip provided in the present application, D1≥D2×(1+0.1L3 / D3).

[0038] It should be noted that due to various reasons such as the different glues and the different temperatures at which the glue cures, when D1≥D2×(1+0.1L3 / D3), after the IC die 1 is shifted relative to the redistribution layer 2 due to the curing of the glue, a very small portion of the contact surface of the bump 21 used to abut the pin 11 will, in a few cases, detach from the pin 11. However, even so, the contact area between the bump 21 and the pin 11 is still large, and the IC die 1 and the redistribution layer 2 can still be reliably electrically connected.

[0039] It can be understood that appropriately limiting the size of the pins 11 can increase the number of pins 11 on the IC die 1. In some embodiments, in order to provide more pins 11 on the IC die 1, D1≤D2×(1+0.2L3 / D3).

[0040] The present application secondly provides an implantable neurostimulator, which includes a circuit board and the above-mentioned IC chip. There are multiple IC chips, and each IC chip is arranged on the circuit board. Because the implantable neurostimulator includes the above-mentioned IC chip, after the IC die 1 is displaced relative to the redistribution layer 2 due to the curing of the glue, the contact area between the IC die 1 and the bump 21 is still large, and the IC die 1 can still be reliably electrically connected to the redistribution layer 2. Therefore, the IC die 1 can be made as narrow as possible. In the case where the IC die 1 can be made as narrow as possible, the circuit board can be made as narrow as possible. The circuit board can be made as narrow as possible, and the implantable neurostimulator can be made as slender as possible to facilitate implantation in the patient's body and reduce the impact on the patient's body.

[0041] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0042] The above-described embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be construed as limiting the scope of the patent application. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent application shall be subject to the attached claims.

Claims

1. An IC chip, characterized in that: include: Wafer; An IC die (1) bonded to the wafer; and A redistribution layer (2) is arranged opposite to the IC die (1); The IC die (1) is rectangular; the IC die (1) has a pin (11), the width of the pin (11) is D1; ​​the redistribution layer (2) has a bump (21), the bump (21) abuts against the pin (11), the width of the bump (21) is D2, and D2<D1.

2. The IC chip according to claim 1, characterized in that: The width and length of the IC die (1) are D3 and L3 respectively, and L3≤3D3.

3. The IC chip according to claim 2, characterized in that: D1≥D2×(1+0.1L3 / D3).

4. The IC chip according to claim 3, characterized in that: D1≤D2×(1+0.2L3 / D3).

5. An implantable neural stimulator, characterized in that: The invention comprises a circuit board and the IC chip according to any one of claims 1 to 4, wherein a plurality of the IC chips are provided, and each of the IC chips is provided on the circuit board.

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