Packaging component with protection circuit
By integrating the protection circuit in the packaged components, controlling the on state of the field effect transistor, the problem of damage to the load circuit components caused by the output current of the isolation circuit is solved, and effective protection of the load circuit and life extension are achieved.
Patent Information
- Application Number
- CN202421205364.9
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-05-30
- Publication Date
- 2025-02-11
- Estimated Expiration
- 2034-05-30
AI Technical Summary
There is a lack of protection mechanism between the existing isolation circuit and the load circuit, resulting in the electronic components on the load circuit being damaged by the current output by the isolation circuit.
A package element with a protection circuit is designed, including an isolation circuit, a logic circuit, a field effect transistor, an overvoltage protection circuit, an overcurrent protection circuit and an overtemperature protection circuit. Through these protection circuits, whether the drain and source of the field effect transistor are turned on is controlled, thereby controlling the output of the sink current.
Ensure that the load circuit operates within the appropriate operating range, avoid damage to electronic components due to excessive current, voltage or temperature, and extend the life of the load circuit.
Smart Images
Figure CN222464595U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to a packaging component, in particular to a packaging component with a protection circuit. Background Art
[0002] Many existing circuit systems require electrical isolation to prevent current from flowing directly from one area to another area in the circuit system unnecessarily. An isolation circuit is often provided in the circuit system to limit the flow of current. Common isolation circuits include inductive isolation circuits and capacitive isolation circuits. Taking an inductive isolation circuit as an example, two coils are usually provided in the inductive isolation circuit, namely an input coil and an output coil. The input coil is connected to the input end of the inductive isolation circuit, and the output coil is connected to the output end of the inductive isolation circuit.
[0003] When an input electrical signal flows from the input end to the input coil, the input electrical signal will generate a magnetic field around the input coil, causing the output coil to generate an output current according to the magnetic field. The output electrical signal will flow out of the output end of the inductive isolation circuit and flow to a load circuit. However, the load circuit may include electronic components with low tolerance, and the electronic components may be damaged by the excessive output electrical signal. Therefore, a protection mechanism must be added between the isolation circuit and the load circuit. Utility Model Content
[0004] The existing isolation circuit lacks a protection mechanism between the load circuit, so that the electronic components on the load circuit may be damaged by the current output by the isolation circuit. In view of this, the utility model proposes a package component with a protection circuit, including:
[0005] A packaging body;
[0006] An isolation circuit is disposed in the package body, and an output end of the isolation circuit is a first end;
[0007] A chip is disposed in the package body, and the chip comprises:
[0008] a logic circuit, an input terminal of the logic circuit being connected to the first terminal;
[0009] a field effect transistor, wherein a drain, a gate and a source of the field effect transistor are electrically connected to a second terminal, the output terminal of the logic circuit and the ground respectively;
[0010] an overvoltage protection circuit electrically connected between the drain of the field effect transistor and the logic circuit;
[0011] an overcurrent protection circuit electrically connected between the source of the field effect transistor and the logic circuit; and
[0012] an over-temperature protection circuit electrically connected to the logic circuit and sensing the temperature of the field effect transistor;
[0013] When the drain and source of the field effect transistor are connected, the second end receives a sink current.
[0014] According to the connection relationship of each component of the utility model, the logic circuit can control whether the drain and the source of the field effect transistor are connected according to the electrical signals output by the isolation circuit, the overvoltage protection circuit, the overcurrent protection circuit and the overtemperature protection circuit. When the drain and the source of the field effect transistor are connected, the field effect transistor receives the injection current, and the injection current can be output through a load circuit connected to the package component, that is, the load circuit will output the injection current to the second end only when the field effect transistor acts within a normal current, voltage and temperature range, thereby ensuring that the load circuit acts within an appropriate working range to avoid damage to the electronic components on the load circuit and extend their life. BRIEF DESCRIPTION OF THE DRAWINGS
[0015] Figure 1 : A circuit block diagram of a packaged component with a protection circuit in the utility model.
[0016] Figure 2 : A circuit block diagram of a packaged component with a protection circuit in the utility model.
[0017] Figure 3 :The utility model has a circuit block diagram of a chip in a package component with a protection circuit.
[0018] Figure 4 :Circuit block diagram of the overvoltage protection circuit in the utility model.
[0019] Figure 5 :Circuit block diagram of the overcurrent protection circuit in the utility model.
[0020] Figure 6 :Circuit block diagram of the over-temperature protection circuit in the utility model. DETAILED DESCRIPTION
[0021] In order to understand the technical features and practical effects of the utility model in detail and to realize the utility model according to the content of the new model, the embodiments shown in the figures are further described in detail as follows:
[0022] See also Figure 1The package component with a protection circuit of the present invention comprises a package body 10, an isolation circuit 20 and a chip 30. The isolation circuit 20 and the chip 30 are respectively arranged in the package body 10, and the isolation circuit 20 is electrically connected to the chip 30. Regarding how the isolation circuit 20 and the chip 30 are packaged in the package body 10, in brief, for example, the electronic components of the isolation circuit 20 and the chip 30 are bonded (die attach) on a two-phase isolated lead frame, and then the output end of the isolation circuit 20 and the input end of the chip 30 are connected to each other through a wire bonding process, and finally packaged (molding) by an insulating material (such as resin). Since the packaging process is common knowledge in the relevant technical field and is not the focus of the present invention, it is not necessary to describe it in detail here. In one embodiment of the present invention, the package body 10 can be one of a dual in-line package (DIP), a single in-line package (SIP) and a surface mount device (SMD).
[0023] Please refer to Figure 2 , the output of the isolation circuit 20 is a first end 21, and the first end 21 is electrically connected to the chip 30. In one embodiment of the utility model, the isolation circuit 20 is a photoelectric coupling element, which includes a light emitting diode 22 and a phototransistor 23. The light emitting diode 22 and the phototransistor 23 can be respectively arranged in two separate areas of the lead frame to achieve an isolation effect. The light emitting diode 22 is used to receive a driving current to emit a driving light signal. The emitter of the phototransistor 23 is the first end 21. Specifically, the anode and the cathode of the light emitting diode 22 receive the driving current and are grounded respectively. The collector of the phototransistor 23 is electrically connected to a power supply voltage VP. When the light emitting diode 22 emits the driving light signal according to the driving current, the base of the phototransistor 23 has a voltage due to the driving light signal, so that the collector and the emitter of the phototransistor 23 are turned on, and the first end 21 will output a first current I1 according to the power supply voltage VP.
[0024] Please refer to Figure 3The chip 30 includes a field-effect transistor (FET) 31, an overvoltage protection circuit 32, an overcurrent protection circuit 33, an overtemperature protection circuit 34 and a logic circuit 36. The input end of the logic circuit 36 is connected to the first end 21. The drain, gate and source of the field-effect transistor 31 are respectively electrically connected to a second end 35, the output end of the logic circuit 36 and the ground. The second end 35 is a connection end of the package component of the utility model for connecting to other circuits.
[0025] The input end of the overvoltage protection circuit 32 is electrically connected to the second end 35, that is, it is also electrically connected to the drain of the field effect transistor 31. The drain of the field effect transistor 31 has a drain voltage VD, and the drain voltage VD corresponds to the voltage of the second end 35. The overvoltage protection circuit 32 is used to detect whether the magnitude of the drain voltage VD is too large. The input end of the overcurrent protection circuit 33 is electrically connected to the source of the field effect transistor 31 to detect whether the current output from the source of the field effect transistor 31 is too large. The overtemperature protection circuit 34 is electrically connected to the logic circuit 36 and senses the temperature of the field effect transistor 31. When the drain and source of the field effect transistor 31 are conductive, the second end 35 receives a current Id, and the second end 35 can be used to connect a load circuit. The circuit operation principle inside the chip 30 will be described later.
[0026] In one embodiment of the present invention, the package component with a protection circuit further includes an amplifier circuit 40, which is also packaged and disposed in the package body 10. The amplifier circuit 40 is used to amplify the first current I1 output by the first end 21. The amplifier circuit 40 includes a bipolar transistor 41 (BJT). The base, collector and emitter of the bipolar transistor 41 are respectively electrically connected to the first end 21 of the isolation circuit 20, the power supply voltage VP and the input end of the logic circuit 36. The first current I1 can drive the bipolar transistor 41 to operate and output a second current I2. The magnitude of the second current I2 is greater than the magnitude of the first current I1, thereby achieving the effect of amplifying the current.
[0027] Specifically, the amplifier circuit 40 also includes a plurality of resistors, which are used to control the amplification degree of the first current I1, that is, to control the size of the second current I2. For example, the plurality of resistors are a first resistor R1, a second resistor R2 and a third resistor R3. The first resistor R1 is connected between the power supply voltage VP and the collector of the phototransistor 23, the second resistor R2 is connected between the power supply voltage VP and the collector of the bipolar transistor 41, and the third resistor R3 is connected to the emitter of the bipolar transistor 41. The amplifier circuit 40 can be regarded as a common collector amplifier circuit, so the size of the second current I2 is greater than the size of the first current I1.
[0028] Regarding the circuit operation principle inside the chip 30, Figure 2 and Figure 3 As shown, the logic circuit 36 is electrically connected between the emitter of the bipolar transistor 41 and the gate of the field effect transistor 31. The logic circuit 36 outputs a control voltage to the gate of the field effect transistor 31, so that the field effect transistor 31 controls the conduction or disconnection between its drain and source according to the size of the control voltage. Specifically, the second current I2 output by the bipolar transistor 41 is divided into a third current I3 and a fourth current I4 before the logic circuit 36. The third current I3 can be used as a current source IS. The current source IS can supply the working current required for the operation of each circuit in the chip 30. The fourth current I4 flows into the logic circuit 36, so that the logic circuit 36 controls the output of the control voltage according to the fourth current I4. When the gate of the field effect transistor 31 receives the control voltage, the drain and source of the field effect transistor 31 will be turned on, so that the second end 35 receives the injection current Id. The logic circuit 36 may include at least one transistor with low on-resistance (Rdson).
[0029] The logic circuit 36 is electrically connected to the overvoltage protection circuit 32, the overcurrent protection circuit 33 and the overtemperature protection circuit 34 respectively. Specifically, Figure 3 As shown, the input end of the overvoltage protection circuit 32 is connected to the drain of the field effect transistor 31 and the second end 35, the output end of the overvoltage protection circuit 32 is connected to the logic circuit 36, the input end of the overcurrent protection circuit 33 is connected to the source of the field effect transistor 31, the output end of the overcurrent protection circuit 33 is connected to the logic circuit 36, the physical position of the overtemperature protection circuit 34 is set next to the field effect transistor 31 and the output end of the overtemperature protection circuit 34 is connected to the logic circuit 36, the overtemperature protection circuit 34 outputs an electrical signal to the logic circuit 36 according to the sensed temperature (i.e., the temperature corresponding to the field effect transistor 31), wherein the input end of the overvoltage protection circuit 32 can be electrically connected to the power supply voltage VP through a load element Z1, and the load element Z1 is selected from a group consisting of at least one resistor and at least one inductor.
[0030] The logic circuit 36 receives a first result signal output by the overvoltage protection circuit 32, a second result signal output by the overcurrent protection circuit 33, and a third result signal output by the overtemperature protection circuit 34, respectively. The logic circuit 36 controls the magnitude of the control voltage according to the first result signal, the second result signal, and the third result signal, wherein the first result signal, the second result signal, and the third result signal may be a current signal or a voltage signal, respectively.
[0031] For example, see Figure 4 The overvoltage protection circuit 32 includes a transistor 320 and a plurality of Zener diodes 321, which are connected in series with each other, and one end of the plurality of Zener diodes 321 connected in series is the input end of the overvoltage protection circuit 32, and is connected to the drain of the field effect transistor 31 (the drain voltage VD) and the second end 35, and the other end of the plurality of Zener diodes 321 connected in series is connected to the drain of the transistor 320 and the output end 322 of the overvoltage protection circuit 32, that is, connected to the logic circuit 36, the gate of the transistor 320 is connected to a first bias voltage VB1 (bias), which is a voltage stably supplied in the package component and is used to control the opening and closing of the transistor 320, and the source of the transistor 320 is grounded, and the plurality of Zener diodes 321 connected in series can be designed to determine the voltage at which the output of the overvoltage protection circuit 32 will be activated.
[0032] The overvoltage protection circuit 32 has a voltage threshold. Specifically, each of the Zener diodes 321 has a reverse breakdown voltage. The Zener diodes 321 are connected in series so that the breakdown voltages are added to form a breakdown voltage sum, and the breakdown voltage sum is the voltage threshold. When the drain voltage VD is greater than or equal to the voltage threshold, the overvoltage protection circuit 32 outputs a first result signal of a first potential to the logic circuit 36, and the logic circuit 36 therefore outputs a low potential control voltage to make the drain of the field effect transistor 31 The circuit between the drain and the source is open, and the second end 35 does not receive the injection current Id. On the contrary, when the drain voltage VD is smaller than the voltage threshold, the overvoltage protection circuit 32 outputs the first result signal of the second potential to the logic circuit 36. The logic circuit 36 therefore outputs the control voltage of the high potential, so that the drain and the source of the field effect transistor 31 are conductive, and the second end 35 receives the injection current Id, thereby preventing the field effect transistor 31 from being damaged due to the excessive drain voltage VD (greater than or equal to the voltage threshold).
[0033] See also Figure 5The overcurrent protection circuit 33 includes a current mirror circuit 330, a transistor 331 and a state latch 332. The current mirror circuit 330 is electrically connected to the input terminal 333 of the overcurrent protection circuit 33 (i.e., connected to the source of the field effect transistor 31) and the gate of the transistor 331. The drain of the transistor 331 is electrically connected to an internal power supply voltage VS and the state latch 332. The source of the transistor 331 is grounded. The output terminal of the state latch 332 is the output terminal 334 of the overcurrent protection circuit 33 and is connected to the logic circuit 36.
[0034] The current mirror circuit 330 outputs a low or high potential signal to the transistor 331 according to the source current of the field effect transistor 31. The specific circuit operation process of the current mirror circuit 330 is common knowledge in the relevant technical field. In short, the current mirror circuit 330 includes a first side sub-circuit 330A and a second side sub-circuit 330B. The first side sub-circuit 330A is electrically connected to the second side sub-circuit 330B. The input end of the second side sub-circuit 330B is the input end 333 of the overcurrent protection circuit 33 mentioned above, and is electrically connected to the field effect transistor The source of the field effect transistor 31 is used to receive its output current, and the output current will generate a comparative voltage drop on the second side sub-circuit 330B. The comparative voltage drop will be compared with a voltage drop threshold of the first side sub-circuit 330A to control the output state of the transistor 331, wherein the size of the voltage drop threshold can be controlled by adjusting the component connection relationship of the first side sub-circuit 330A, that is, the overcurrent protection circuit 33 can determine whether the current output from the source of the field effect transistor 31 exceeds a current threshold, and the current threshold is the basis for determining whether the transistor 331 is turned on or off.
[0035] When the current outputted from the source of the field effect transistor 31 is greater than or equal to the current threshold, the gate of the transistor 331 will receive a first potential to open (cut off) the transistor 331. When the transistor 331 is open, the signal stored and outputted by the state latch 332 is a high potential signal (the internal power supply voltage VS), that is, the overcurrent protection circuit 33 outputs the high potential second result signal to the logic circuit 36. The logic circuit 36 therefore outputs the low potential control voltage to open the drain and source of the field effect transistor 31, so that the second end 35 does not receive the injection current Id. On the contrary, when the field effect transistor 31 is open, the gate of the transistor 331 will receive a first potential to open (cut off) the transistor 331. When the field effect transistor 31 is open, the signal stored and outputted by the state latch 332 is a high potential signal (the internal power supply voltage VS). When the current output from the source of the field effect transistor 31 is smaller than the voltage threshold, the gate of the transistor 331 will receive a second potential to turn on the transistor 331. When the transistor 331 is turned on, the voltage stored and output by the state latch 332 is a low potential signal, that is, the overcurrent protection circuit 33 outputs the second result signal of low potential to the logic circuit 36. The logic circuit 36 therefore outputs the control voltage of high potential to turn on the drain and source of the field effect transistor 31, so that the second end 35 receives the injection current Id, thereby preventing the electronic components on the load circuit (connected to the second end 35) from being damaged by excessive current.
[0036] The status latch 332 can be divided into the following two output conditions according to its internal circuit composition:
[0037] 1. Automatic reset: When the state latch 332 stores a high-level signal, if a low-level signal flows into it, the state latch 332 outputs the second result signal of a low level.
[0038] 2. Manual reset: When the state latch 332 stores a high potential signal, if a low potential signal flows in, the state latch 332 still outputs the second result signal of the high circuit. The state latch 332 needs to be powered off to make the state latch 332 store a low potential signal again.
[0039] See also Figure 6The over-temperature protection circuit 34 includes a first transistor 340 and a second transistor 341. The first transistor 340 can be a bipolar junction transistor (BJT), and the second transistor 341 can be a field effect transistor (FET). The base of the first transistor 340 and the gate of the second transistor 341 are respectively connected to a second bias voltage VB2 and a third bias voltage VB3. The collector of the first transistor 340 is connected to the source of the second transistor 341 and the output terminal 342 of the over-temperature protection circuit 34. The emitter of the first transistor 340 is grounded, and the drain of the second transistor 341 is connected to the internal power supply voltage VS. The second bias voltage VB2 and the third bias voltage VB3 are fixed voltages stably provided in the package component. The first transistor 340 has a turn-on start bias voltage (or turn-on voltage), and the turn-on start bias voltage varies with temperature.
[0040] The over-temperature protection circuit 34 has a temperature threshold. For example, when the temperature of the field effect transistor 31 is 25 (°C), the voltage of the base of the first transistor 340 (the second bias voltage VB2) is 0.4 (V), and the conduction start bias voltage of the first transistor 340 is 0.5 (V). Since the voltage of the base of the first transistor 340 (0.4V) is less than the conduction start bias voltage (0.5V), the emitter and collector of the first transistor 340 are not conducting, and the over-temperature protection circuit 34 outputs the third result signal of low potential to the logic circuit 36. Therefore, the logic circuit 36 outputs the control voltage of high potential, so that the drain and source of the field effect transistor 31 are conducting, and the second end 35 receives the injection current Id. When the temperature of the field effect transistor 31 is 16 0(℃), the second bias voltage VB2 can stably supply the voltage to the first transistor 340, so that the voltage of its base is still 0.4(V), and the turn-on start bias voltage of the first transistor 340 drops to 0.3(V). Since the voltage of the base of the first transistor 340 (0.4V) is greater than the turn-on start bias voltage (0.3V), the emitter and collector of the first transistor 340 are turned on, and the over-temperature protection circuit 34 outputs the third result signal of high potential to the logic circuit 36. The logic circuit 36 therefore outputs the control voltage of low potential, so that the drain and source of the field effect transistor 31 are disconnected, and the second end 35 does not receive the injection current Id, wherein the temperature threshold is the temperature value at which the turn-on start bias voltage of the first transistor 340 drops to turn it on.
[0041] In addition, it should be noted that the first potential and the second potential are relative to each other. When the first potential is a high potential, the second potential is a low potential. Conversely, when the first potential is a low potential, the second potential is a high potential.
[0042] The package element with protection circuit of the utility model is provided with an isolation circuit 20 and a chip 30 in a package body 10. The chip 30 includes a logic circuit 36, a field effect transistor 31, an overvoltage protection circuit 32, an overcurrent protection circuit 33 and an overtemperature protection circuit 34. The logic circuit 36 is electrically connected to the isolation circuit 20, the field effect transistor 31, the overvoltage protection circuit 32, the overcurrent protection circuit 33 and the overtemperature protection circuit 34 respectively. The logic circuit 36 is electrically connected to the isolation circuit 20, the overvoltage protection circuit 32, the overcurrent protection circuit 33 and the overtemperature protection circuit 34 according to the isolation circuit 20, the overvoltage protection circuit 32, the overcurrent protection circuit 33 and the overtemperature protection circuit 34. The electrical signal output by the circuit 33 and the over-temperature protection circuit 34 controls whether the drain and source of the field effect transistor 31 are connected. When the drain and source of the field effect transistor 31 are connected, the field effect transistor 31 receives a current Id, and the current Id can be output through a load circuit connected to the package component, that is, the load circuit will only output when the field effect transistor 31 acts within a normal current, voltage and temperature range, thereby ensuring that the load circuit acts within an appropriate working range to avoid damage to the electronic components on the load circuit and extend their life.
[0043] The above description is only a preferred embodiment of the present invention, and does not constitute any form of limitation to the present invention. Although the present invention has been disclosed as a preferred embodiment as above, it is not intended to limit the present invention. Any technician familiar with the profession can make some changes or modifications to equivalent embodiments of equivalent changes using the technical contents disclosed above without departing from the scope of the technical solution of the present invention. However, any simple modification, equivalent changes and modifications made to the above embodiments based on the technical essence of the present invention without departing from the content of the technical solution of the present invention are still within the scope of the technical solution of the present invention.
Claims
1. A package component with a protection circuit, characterized in that: Include: A packaging body; An isolation circuit is disposed in the package body, and an output end of the isolation circuit is a first end; A chip is disposed in the package body, and the chip comprises: a logic circuit, an input terminal of the logic circuit being connected to the first terminal; a field effect transistor, wherein a drain, a gate and a source of the field effect transistor are electrically connected to a second terminal, the output terminal of the logic circuit and the ground respectively; an overvoltage protection circuit electrically connected between the drain of the field effect transistor and the logic circuit; an overcurrent protection circuit electrically connected between the source of the field effect transistor and the logic circuit; as well as an over-temperature protection circuit electrically connected to the logic circuit and sensing the temperature of the field effect transistor; When the drain and the source of the field effect transistor are connected, the second end receives a sink current.
2. The package component with a protection circuit as claimed in claim 1, characterized in that: The isolation circuit is a photoelectric coupling element, which includes a light emitting diode and a phototransistor. The light emitting diode is used to emit a driving light signal. The base of the phototransistor receives the driving light signal. The emitter of the phototransistor is the first end.
3. The package component with a protection circuit according to claim 1, characterized in that: It further comprises an amplifier circuit, which comprises a bipolar transistor, wherein the base, the collector and the emitter of the bipolar transistor are respectively and correspondingly electrically connected to the first end of the isolation circuit, a power supply voltage and the input end of the logic circuit.
4. The package component with a protection circuit as claimed in claim 3, characterized in that: The logic circuit outputs a control voltage to the gate of the field effect transistor, and the field effect transistor turns on or off the drain and source according to the magnitude of the control voltage.
5. The package component with protection circuit according to claim 4, characterized in that: The logic circuit is electrically connected to the overvoltage protection circuit, the overcurrent protection circuit and the overtemperature protection circuit, respectively. The logic circuit receives a first result signal output by the overvoltage protection circuit, a second result signal output by the overcurrent protection circuit and a third result signal output by the overtemperature protection circuit, respectively. The logic circuit controls the magnitude of the control voltage according to the first result signal, the second result signal and the third result signal.
6. The package component with protection circuit according to claim 4, characterized in that: The logic circuit includes at least one transistor with low on-resistance.
7. The package component with a protection circuit according to claim 1, characterized in that: The package body is one of a dual in-line package, a single in-line package and a surface mounted component.
8. The package component with protection circuit according to claim 1, characterized in that: The overvoltage protection circuit includes a transistor and several Zener diodes, which are connected in series. One end of the several Zener diodes connected in series is connected to the drain of the field effect transistor, and the other end of the several Zener diodes connected in series is connected to the drain of the transistor and the logic circuit. The gate and source of the transistor are respectively connected to a bias voltage and ground.
9. The package component with a protection circuit according to claim 1, characterized in that: The overcurrent protection circuit includes a current mirror circuit, a transistor and a state latch. The current mirror circuit is electrically connected to the source of the field effect transistor and the gate of the transistor, the drain of the transistor is electrically connected to an internal power supply voltage and the input of the state latch, the source of the transistor is grounded, and the output of the state latch is connected to the logic circuit.
10. The package component with protection circuit according to claim 1, characterized in that: The over-temperature protection circuit includes a first transistor and a second transistor, the base of the first transistor and the gate of the second transistor are respectively connected to a bias voltage, the collector of the first transistor is connected to the source of the second transistor and the logic circuit, the emitter of the first transistor is grounded, and the drain of the second transistor is connected to an internal power supply voltage.