Hall chip integrated with fantasy color function

Abstract

The utility model discloses a Hall chip integrated with a fantasy color function, comprising a Hall circuit, the first output end of which is connected with a Hall output port; the color intrigue circuit comprises a second input end, a second output end and a third output end, the second input end is connected with the color intrigue input port, the second output end is connected with three LED lamp beads in parallel, and the third output end is connected with the color intrigue output port; the biasing circuit is arranged on the first branch between the Hall circuit and the colorful circuit; and the reference circuit is arranged on the second branch between the Hall circuit and the colorful circuit. According to the utility model, two functional circuits are integrated in one chip, so that the design and layout of the PCB can be effectively optimized, materials are optimized, and the occupied space of the chip is saved.

Description

Technical Field

[0001] The utility model relates to the technical field of Hall chips, in particular to a Hall chip with an integrated magic color function. Background Art

[0002] In the design of modern electronic products, Hall chips and iridescent chips are increasingly used, and they each have different functions. Hall chips are mainly used to detect magnetic field strength and are widely used in many fields such as position sensing and speed detection. iridescent chips, on the other hand, achieve colorful light effects through current control, adding visual beauty to the product. In the design of some electronic products, such as magnetic axis keyboards and game controllers, Hall chips and iridescent chips are often used simultaneously to achieve more complex functions and more attractive appearance.

[0003] However, these two chips have certain challenges in the design and application process. In the traditional design scheme, the Hall chip and the magic color chip need to be designed and wired separately, which not only increases the design complexity and cost of the PCB (Printed Circuit Board), but also increases the size of the electronic product. Utility Model Content

[0004] The utility model aims to solve at least one of the technical problems existing in the prior art. To this end, the utility model proposes a Hall chip with integrated color illusion function, which can effectively optimize the design and layout of PCB circuit boards in applications such as magnetic axis keyboards and game controllers, optimize materials and save chip space.

[0005] A linear Hall chip with adjustable power consumption according to an embodiment of the utility model includes:

[0006] A Hall circuit, wherein a first output end of the Hall circuit is connected to a Hall output port;

[0007] A magic color circuit, the magic color circuit comprising a first input end, a second output end and a third output end, the first input end is connected to the magic color input port, the second output end is connected in parallel with three LED lamp beads, and the third output end is connected to the magic color output port;

[0008] A bias circuit, the bias circuit is arranged on a first branch between the Hall circuit and the magic color circuit;

[0009] A reference circuit is arranged on a second branch between the Hall circuit and the magic color circuit.

[0010] The Hall chip with integrated color illusion function according to the embodiment of the utility model has at least the following beneficial effects:

[0011] A Hall chip with integrated color illusion function comprises: a Hall circuit, comprising a first input end and a first output end, the first input end is connected to a Hall input port, and the first output end is connected to a Hall output port; a color illusion circuit, comprising a second input end, a second output end and a third output end, the second input end is connected to the color illusion input port, the second output end is connected to three LED lamp beads in parallel, and the third output end is connected to the color illusion output port; a bias circuit, the bias circuit is arranged on a first branch between the Hall circuit and the color illusion circuit; a reference circuit, the reference circuit is arranged on a second branch between the Hall circuit and the color illusion circuit. The utility model can effectively optimize the design and layout of a PCB circuit board, optimize materials and save chip space by integrating two functional circuits into one chip.

[0012] According to some embodiments of the present invention, the Hall circuit includes a Hall disk, a polarity switching circuit, an offset voltage elimination circuit and an output amplifier circuit which are cascaded in sequence.

[0013] According to some embodiments of the present utility model, the polarity switching circuit includes:

[0014] An omnipolar amplifier, a unipolar amplifier and a non-polar amplifier, wherein the omnipolar Hall amplifier, the unipolar amplifier and the non-polar amplifier are connected in parallel between the Hall disk and the polarity control switch;

[0015] The polarity control switch is connected to the offset voltage elimination circuit. The polarity control switch is provided with a polarity control signal input port, and the polarity control signal input port is used to receive the external input polarity control signal and select the corresponding amplifier for output.

[0016] According to some embodiments of the present invention, the output amplifier circuit includes:

[0017] A first array circuit includes a first sensitive resistor array and a first selection switch;

[0018] The second array circuit includes a second sensitivity resistor array and a second selection switch; wherein the first selection switch and the second selection switch are provided with a sensitivity control signal input port, the sensitivity control signal input port is used to receive a sensitivity control signal, and the resistance value of the first sensitivity resistor array or the second sensitivity resistor is selected to be connected to the amplifier input according to the sensitivity control signal to achieve an adjustable amplification factor;

[0019] An output amplifier, wherein the second input terminal of the output amplifier is connected to the first sensitivity resistor array, the third input terminal of the output amplifier is connected to the second sensitivity resistor array, and the fourth output terminal of the output amplifier is connected to the first output terminal of the Hall circuit.

[0020] According to some embodiments of the present utility model, the Hall circuit further includes a power consumption switching circuit, and the power consumption switching circuit includes a power consumption switching switch, a digital logic circuit, a system clock, and a frequency divider;

[0021] The system clock is connected to the frequency divider, the power consumption switching switch is respectively connected to the frequency divider and the system clock, the power consumption switching switch is connected to the low power consumption switching port on the Hall chip, the power consumption switching switch is connected to the Hall disk through a digital logic circuit, and the low power consumption switching port is used to control the power consumption switching switch according to an external signal.

[0022] According to some embodiments of the present utility model, the magic color circuit includes:

[0023] A first port, a second port and a third port, wherein the first port, the second port and the third port are respectively connected to the magic color input port and are used to receive a magic color control signal from an external controller or an upper chip;

[0024] The adjustable current circuit comprises a return-to-zero code circuit and a programmable constant current source circuit, wherein the first port, the second port and the third port are respectively connected to the return-to-zero code circuit, and the return-to-zero code circuit is connected to the programmable constant current source circuit;

[0025] A PWM drive circuit is connected to the programmable constant current source circuit, and the PWM drive circuit is connected to the second output end.

[0026] According to some embodiments of the present utility model, the return-to-zero code circuit includes a serial interface of a return-to-zero code protocol, the first port is directly connected to the serial interface, a first delay circuit is connected in series between the second port and the serial interface, and a second delay circuit is connected in series between the third port and the serial interface;

[0027] According to some embodiments of the present invention, the magic color control signal includes a data signal of a synchronous reset code or a current control code.

[0028] When the control signal includes a synchronous reset code, the serial interface identifies the magic color control signal as flashing mode control data;

[0029] When the control signal includes a current control code, the serial interface recognizes the magic color control signal as control data for setting the LED driving current.

[0030] According to some embodiments of the present invention, the programmable constant current source circuit has a built-in resistor array, and the equivalent resistance of the resistor array is determined by the output code value of the return-to-zero code circuit.

[0031] According to some embodiments of the utility model, the magic color circuit also includes a command decoder and an output shaping circuit. The command decoder is connected to the return-to-zero code circuit and the output shaping circuit to perform waveform shaping on the decoded signal and finally output it to the magic color output port. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the specific implementation of the utility model or the technical solution in the prior art, the following is a brief introduction to the drawings required for the specific implementation or the prior art description. In all the drawings, similar elements or parts are generally identified by similar reference numerals. In the drawings, each element or part is not necessarily drawn according to the actual scale.

[0033] Figure 1 A module block diagram of a Hall chip with integrated color illusion function provided by an embodiment of the utility model;

[0034] Figure 2 A circuit schematic diagram of a Hall circuit in a Hall chip with integrated color illusion function provided by an embodiment of the utility model;

[0035] Figure 3 A circuit schematic diagram of a polarity switching circuit in a Hall circuit provided by an embodiment of the utility model;

[0036] Figure 4 A circuit schematic diagram of an output amplifier circuit in a Hall circuit provided by an embodiment of the utility model;

[0037] Figure 5 A circuit schematic diagram of a power consumption switching circuit in a Hall circuit provided by an embodiment of the utility model;

[0038] Figure 6 A circuit schematic diagram of a color illusion circuit in a Hall chip with an integrated color illusion function provided by an embodiment of the utility model;

[0039] Figure 7 Another circuit schematic diagram of a color illusion circuit in a Hall chip with integrated color illusion function provided by an embodiment of the utility model;

[0040] Figure 8 A schematic diagram of multiple chips connected in series with a Hall chip having an integrated color illusion function provided by an embodiment of the utility model;

[0041] Fig. 9 A schematic diagram of connecting multiple chip pins of a Hall chip with integrated color illusion function provided by an embodiment of the utility model;

[0042] Fig.10 A schematic diagram of signal transmission of a Hall chip with integrated color illusion function provided in an embodiment of the utility model.

[0043] Fig.11 A circuit schematic diagram of a Hall chip with integrated color illusion function provided in an embodiment of the utility model. DETAILED DESCRIPTION

[0044] The following embodiments of the technical solution of the utility model are described in detail in conjunction with the accompanying drawings. The following embodiments are only used to more clearly illustrate the technical solution of the utility model, and are therefore only used as examples, and cannot be used to limit the protection scope of the utility model.

[0045] It should be noted that, unless otherwise specified, the technical terms or scientific terms used in this application should have the common meanings understood by technicians in the field to which the utility model belongs.

[0046] A Hall chip 1000 with integrated color illusion function, comprising:

[0047] The Hall circuit 1100 is used to detect an external magnetic field and output a corresponding electrical signal. The output end of the Hall circuit 1100 is connected to the Hall output port (HALL_OUT) 1610 so as to transmit the magnetic field detection signal to the outside of the chip.

[0048] The magic color circuit 1200 is used to drive the three-color LED (LED_R 1730, LED_G 1740, LED_B 1750) to produce a mixed color lighting effect according to the input control signal. The input end of the magic color circuit 1200 is connected to the magic color input port (RGB_IN) 1720, which is used to receive external color light control instructions; the second output end is connected in parallel to three LED lamp beads; the third output end is connected to the magic color output port (RGB_OUT) 1710, which can output the driving signal to the chip external device or the next level chip.

[0049] The bias circuit 1300 is arranged on the first branch between the Hall circuit 1100 and the magic color circuit 1200, and is used to level-bias and condition the original analog signal from the Hall sensor to make it meet the input requirements of the subsequent circuit.

[0050] The reference circuit 1400 is arranged on the second branch between the Hall circuit 1100 and the magic color circuit 1200, and is used to provide a reference voltage or current as a reference source to ensure the normal operation of the analog and digital circuits inside the chip.

[0051] In addition, the chip 1000 also includes a positive power supply VDD 1510 and a common ground terminal GND 1520 to provide a stable power supply for the entire chip.

[0052] Through the coordinated work of the above modules, the Hall chip 1000 can automatically change the brightness and color mixing ratio of the three-color LED according to the changes in the external magnetic field to achieve intelligent colorful lighting effects, and can also receive external instructions through the input port to program and control the lighting mode. The chip can be widely used in interactive decorative lighting, magnetically controlled game toys, magnetic axis keyboards, game controllers and other fields.

[0053] like Figure 2 As shown, in some embodiments, the Hall circuit 1100 includes a Hall disk 1110 , a polarity switching circuit 1120 , an offset voltage elimination circuit 1130 , and an output amplifier circuit 1140 which are cascaded in sequence.

[0054] Among them, the Hall disk 1110 is the core of the entire Hall circuit 1100, and is a sensor element that can convert magnetic field signals into voltage or current output. When an external magnetic field is applied, the Hall disk 1110 will output an analog electrical signal proportional to the magnetic field strength. The polarity switching circuit 1120 is connected to the output end of the Hall disk 1110, and can select the positive and negative polarity of the Hall disk 1110 output signal according to the control signal. It can include several parallel amplifiers and analog switches, and can select omnipolar, unipolar or non-polar output modes to adapt to different application scenarios. When there is no magnetic field, the Hall disk 1110 will also have a certain offset voltage offset due to factors such as process and temperature. The offset voltage elimination circuit 1130 can effectively eliminate this static offset and ensure that the output is a zero reference voltage when there is no magnetic field. The output amplifier circuit 1140 is the last stage of the Hall circuit, which amplifies the Hall signal conditioned by the previous stage so that its amplitude meets the requirements of the subsequent stage circuit. The output amplifier circuit 1140 can achieve adjustable amplification through a programmable resistor array or the like to improve the sensitivity of detection. Through the design of the above-mentioned cascade structure, the Hall circuit 1100 can efficiently and accurately detect changes in the external magnetic field and output a conditioned high-quality analog signal, providing a reliable input source for the subsequent colorful driving circuit.

[0055] In some embodiments, further, the wire between the output amplifier circuit 1140 and the Hall output port (HALL_OUT) 1610 is grounded through a Schottky diode 1150. The Schottky diode 1150 can prevent the external improper voltage / signal from being reversely injected into the internal circuit of the chip, thereby playing the role of input terminal protection. This can prevent the internal precision circuit of the chip from being damaged by reversely injected overvoltage / overcurrent.

[0056] It should be noted that the Schottky diode 1150 has a small forward conduction voltage drop characteristic, and when working under normal conditions, it will hardly produce a significant voltage drop and attenuation effect on the normal output signal of the linear Hall circuit, so that the original characteristics and accuracy of the output signal can be retained to the greatest extent.

[0057] Therefore, using Schottky diode 1150 for output protection can effectively protect the chip from external misoperation or signal impact. At the same time, due to its own small voltage drop characteristics, it will basically not affect the integrity and accuracy of the output signal of the linear Hall circuit under normal working conditions.

[0058] like Figure 3 As shown, in some embodiments, the polarity switching circuit 1120 includes: an omnipolarity amplifier 1121, a unipolarity amplifier 1122 and a non-polarity amplifier 1123, and the omnipolarity amplifier 1121, the unipolarity amplifier 1122 and the non-polarity amplifier 1123 are connected in parallel between the Hall disk 1110 and the polarity control switch 1124; the polarity control switch 1124 is connected to the offset voltage elimination circuit 1130, and a polarity control signal input port 1125 is provided on the polarity control switch 1124, and the polarity control signal input port 1125 is used to receive an external input polarity control signal, thereby selecting the corresponding amplifier for output.

[0059] Compared with the existing technology, the Hall element is usually designed to detect a single magnetic field direction and the output polarity is fixed. In actual application scenarios, the direction of the magnetic field may change in reverse or in both directions. Through the polarity switching circuit, the appropriate polarity amplification path can be selected according to the control signal, so that the Hall sensor can adapt to a wider range of magnetic field environments.

[0060] In some embodiments, the polarity control signal is a two-bit control signal, and the polarity control signal input port 1125 includes two signal receiving ports.

[0061] When control signal 0 is input to port 1 and control signal 1 is input to port 2, polarity control switch 1124 selects omnipolar Hall amplifier 1121 as the output of voltage operational amplifier circuit, i.e., it is in omnipolar mode at this time: when the magnetic field is zero, the output voltage is half of the power supply voltage, and when the S magnetic pole is close to the chip marking surface, the output voltage will increase linearly with the increase of magnetic field strength; on the contrary, the N magnetic pole will make the output voltage decrease linearly with the increase of magnetic field strength.

[0062] When the control signal 1 is input to port 1 and the control signal 0 is input to port 2, the polarity control switch 1124 selects the unipolar Hall amplifier 1122 as the output of the voltage operational amplifier circuit, that is, it is in unipolar mode at this time: the output voltage is zero when the magnetic field is zero, and when the S pole or N pole chip is marked, the output voltage will increase linearly with the increase of magnetic field strength.

[0063] When control signal 1 is input to port 1 and control signal 1 is input to port 2, the polarity control switch 1124 selects the non-polarity Hall amplifier 1123 as the output of the voltage operational amplifier circuit, that is, it is in non-polarity mode at this time: the output voltage is zero when the magnetic field is zero, and when the S pole and N pole chip marking surfaces are on the surface, the output voltage will increase linearly with the increase of magnetic field strength.

[0064] It should be noted that the above logic relationship is only used as an example. In actual applications, the control selection logic of the polarity control switch 1124 can be set according to actual conditions and is not limited here.

[0065] like Figure 4 As shown, in some embodiments, the output amplifier circuit 1140 includes:

[0066] The first array circuit 1142 includes a first sensitive resistor array 1145 and a first selection switch 1146;

[0067] The second array circuit 1143 includes a second sensitivity resistor array 1147 and a second selection switch 1148; wherein the first selection switch 1146 and the second selection switch 1148 are provided with a sensitivity control signal input port 1144, and the sensitivity control signal input port 1144 is used to receive a sensitivity control signal, and select the resistance value of the first sensitivity resistor array 1145 or the second sensitivity resistor array 1147 to be connected to the amplifier input according to the sensitivity control signal, so as to realize an adjustable amplification factor;

[0068] Output amplifier 1141, the second input terminal of the output amplifier 1141 is connected to the first sensitivity resistor array 1145, the third input terminal of the output amplifier 1141 is connected to the second sensitivity resistor array 1147, and the fourth output terminal of the output amplifier 1141 is connected to the first output terminal of the Hall circuit 1100.

[0069] This design allows the output gain to be programmed via an external control signal, improving the programmable flexibility and applicability of the detection, and is integrated inside the chip, reducing system complexity.

[0070] In some embodiments, the sensitivity control signal is a three-bit control signal, and the sensitivity control signal input port 1144 includes three signal receiving ports. According to the sensitivity control signal, the first sensitivity resistor array 1145 and the second sensitivity resistor array 1147 are short-circuited and open-circuited according to the preset control logic, and a variety of resistor array combinations are provided to adjust the output resistance of the first sensitivity resistor array 1145 and the second sensitivity resistor array 1147, and then adjust the resistance ratio of the output amplifier 1141, so as to adjust the output sensitivity of the Hall circuit 1100. This embodiment takes Table 1 as an example to illustrate the control adjustment results of the first resistor array selection switch 1148 and the second resistor array selection switch 1148:

[0071]

[0072]

[0073] Table 1 Resistor array selector switch truth table

[0074] The advantage of this mechanism is that only a small amount of external digital control signal is needed to realize stepless adjustment of the output sensitivity of the Hall circuit 1100, which greatly improves the accuracy and range of detection. All circuits are integrated inside the chip, avoiding the volume and cost overhead caused by external adjustable resistors, and improving the intelligence level of the system. The microcontroller can dynamically program the optimal sensitivity parameters according to actual needs.

[0075] In actual applications, the polarity control switch 1124, the first resistor array selection switch 1142, and the second resistor array selection switch 1148 are controlled by setting a small PAD with a corresponding number of bits. When the chip package is wired, the corresponding PADs are respectively wired to the power supply or ground, and the output of the analog switch is selected according to the truth table through different voltage combinations.

[0076] like Figure 5 As shown, in some embodiments, the Hall circuit 1100 also includes a power consumption switching circuit 1160, and the power consumption switching circuit 1160 includes a power consumption switching switch 1164, a digital logic circuit 1165, a system clock 1162 and a frequency divider 1163; the system clock 1162 is connected to the frequency divider 1163, and the power consumption switching switch 1164 is respectively connected to the frequency divider 1163 and the system clock 1162, and the power consumption switching switch 1164 is connected to the low power consumption switching port 1620 on the Hall chip 1000, and the power consumption switching switch 1164 is connected to the Hall disk 1110 through the digital logic circuit 1165, and the low power consumption switching port 1620 is used to control the power consumption switching switch 1164 according to an external signal.

[0077] Among them, the system clock 1162 provides a working clock source for the entire Hall circuit 1100; the frequency divider 1163 receives the input of the system clock 1162 and can divide the clock frequency; one end of the power switching switch 1164 receives the divided clock frequency, and the other end receives the original system clock 1162 frequency. According to the control signal input by the low-power switching port 1620, the digital logic circuit 1165 controls the power switching switch 1164 to connect the divided clock or the system clock to the Hall disk 1110. When the external control signal requires a normal working mode, the switch 1164 connects the system clock to the Hall disk 1110, and the chip works in a high-speed full-function state. When the external control requires a low-power mode, the switch 1164 switches to the divided clock output, and the Hall disk 1110 works in a reduced frequency state, and the power consumption is reduced accordingly. Through the controllable clock frequency, the chip can be dynamically switched between high-speed and low-power modes, and the best balance between power consumption and performance can be achieved according to the application scenario.

[0078] For example, if the system clock 1162 is 16MHz, the divider 1163 divides it into 8MHz. During normal operation, the low-power switching port 1620 controls the switch 1164 to connect the 16MHz clock, and the Hall detection works at the highest frequency with the best performance; when entering the energy-saving state, the low-power switching port 1620 controls the switch 1164 to switch to the 8MHz divided clock output, and the Hall detection works at a lower 8MHz frequency, and the power consumption is only half of the original. The power switching circuit 1160 provides hardware support for dynamic power management for system design, and can freely switch between high performance and low power consumption according to actual usage, thereby improving the system's operating efficiency and the endurance of the equipment, and is an effective means to achieve the energy-saving and environmental protection design concept.

[0079] In some embodiments, the Hall circuit 1100 also includes a step-down circuit, which is arranged between the Hall element and the voltage amplifier circuit. The step-down circuit is an LDO (Low Drop Out) step-down circuit. LDO is a linear regulator, which functions to stably reduce the input voltage to a preset output voltage value. It is believed that the output voltage of the Hall element may not match the operating voltage of the subsequent amplifier circuit. LDO can accurately step down the input voltage to the voltage range required by the amplifier circuit to avoid operating point offset or component damage. In addition, LDO can not only stabilize the voltage, but also effectively suppress interference such as ripple and noise at the input end, provide a clean and stable operating voltage for the subsequent sensitive analog circuit, and improve the system's anti-interference ability. The LDO step-down circuit usually adopts the working principle of feedback control, and can accurately adjust and regulate the output voltage. Although its efficiency is slightly lower than that of the switching buck, it has the advantages of strong voltage resistance, small ripple, and small EMI radiation, and is very suitable for powering precision analog and digital circuits with high requirements.

[0080] like Figure 6 As shown, in some embodiments, the fantasy color circuit 1200 includes a first port 1211, a second port 1212 and a third port 1213, and the first port 1211, the second port 1212 and the third port 1213 are respectively connected to the fantasy color input port 1720, and are used to receive the fantasy color control signal of the external controller or the upper chip. The fantasy color control signal usually includes the brightness or color coding value of the three RGB colors, and is used to drive the LED lamp beads to produce different colors.

[0081] The return-to-zero code circuit 1230 and the programmable constant current source circuit 1240, the first port 1211, the second port 1212 and the third port 1213 are respectively connected to the return-to-zero code circuit 1230, the return-to-zero code circuit 1230 is connected to the programmable constant current source circuit 1240, the return-to-zero code circuit 1230 performs decoding operation processing on the received control code, and converts it into an internal code stream that can be recognized by the programmable constant current source circuit 1240, and the programmable constant current source circuit 1240 can provide constant current source drive for the RGB three-color LED paths according to the output of the return-to-zero code circuit 1230. The programmable design allows the constant current value to be adjusted according to the control signal to adjust the LED brightness.

[0082] PWM drive circuit 1250, PWM drive circuit 1250 is connected to programmable constant current source circuit 1240, and PWM drive circuit 1250 is connected to the second output terminal. PWM drive circuit 1250 converts the analog drive of programmable constant current source circuit 1240 into a pulse width modulation (PWM) signal output. When the PWM signal frequency is high enough, the human eye can perceive it as a continuous analog quantity. The second output terminal can transmit the output PWM signal of PWM drive circuit 1250 to the LED lamp array to drive it to produce corresponding brightness and color.

[0083] Through the coordinated work of the above circuits, the fantasy color circuit 1200 can accurately convert simple digital control signals into the analog drive required by the LED, and can program and adjust parameters such as brightness and color in real time according to the control instructions, thereby producing rich fantasy color lighting effects and realizing intelligent colorful lighting.

[0084] In some embodiments, the return-to-zero code circuit 1230 includes a serial interface of the return-to-zero code protocol, the first port 1211 is directly connected to the serial interface, a first delay circuit 1221 is connected in series between the second port 1212 and the serial interface, and a second delay circuit 1222 is connected in series between the third port 1213 and the serial interface.

[0085] The function of the delay circuit is to make the second port 1212 delay one unit time compared with the first port 1211, and the third port 1213 delay one unit time compared with the second port 1212, so as to prevent the three-way signal misalignment and superposition from causing crosstalk. When the signal of the first port 1211 is interrupted, the spare signal line of the second port 1212 will bypass the fault point and continue to transmit. If both the first port 1211 and the second port 1212 are interrupted, the spare signal line of the third port 1213 will skip the two fault points and continue to transmit. The serial interface will preferentially select the highest priority port with signal input as the input source. Only when there is no signal at the high priority port will it switch to the next priority port. The priority is: first port 1211> second port 1212> third port 1213.

[0086] This three-line redundant backup design provides extremely high reliability and fault tolerance. Even if one or two faults occur, the backup line can still ensure continuous transmission of the signal. In general, the return-to-zero code circuit design breaks through the conventional single-line serial transmission mode, improves the anti-interference and reliability of the LED control signal, and provides a strong guarantee for the stable operation of the colorful light display system. At the same time, the delay circuit avoids the crosstalk problem of multi-line superposition, and the overall circuit is reasonable and efficient. This three-line redundant backup design provides extremely high reliability and fault tolerance. Even if one or two faults occur, the backup line can still ensure continuous transmission of the signal.

[0087] In some embodiments, the magic color control signal includes a data signal of a synchronous reset code or a current control code.

[0088] When the control signal includes a synchronous reset code, the serial interface recognizes the colorful control signal as flashing mode control data; this control signal is intended to control the flashing mode of the LED light, such as frequency, duty cycle, etc., to produce different flashing light effects.

[0089] When the control signal includes a current control code, the serial interface identifies the magic color control signal as control data for setting the LED drive current. Through these special current control codes, the programmable constant current source circuit 1240 can be instructed to dynamically adjust the internal resistor array, thereby accurately setting the LED drive current value. Through these two control codes, the magic color circuit can achieve comprehensive programming control of the LED light output: the synchronous reset code controls the flashing mode, giving the LED a dynamic timing light effect; the current control code controls the drive current and adjusts the brightness of the LED. The organic combination of the two enables single-color or multi-color LEDs to achieve intelligent timing / brightness programming at the hardware level, bringing endless light change possibilities to the lighting system. At the same time, this design concept based on digital control codes makes the control method simple and efficient. It only needs to input the corresponding coding instructions at the control end, avoiding the complexity of analog control.

[0090] In some embodiments, a programmable constant current source circuit 1240 integrates a programmable resistor array, and the output current can be adjusted by changing the resistance value. The encoding setting of the resistor array is determined by the serial interface of the return-to-zero code circuit 1230 according to the control signal input from the first port 1211, the second port 1212, and the third port 1213. The return-to-zero code circuit 1230 determines which input signal to use and decodes it into the corresponding resistor array setting value. By inputting a specific return-to-zero code protocol by the controller, the output current can be adjusted steplessly in the range of 1mA to 50mA. This wide adjustment range can meet various application scenarios from high-power LED light strings to low-power electronic devices. A lower current setting value is conducive to reducing power consumption and achieving energy saving and environmental protection. The programmable stepless adjustable design enables the system to dynamically optimize the current value according to actual needs to avoid unnecessary energy loss.

[0091] like Figure 7 As shown, in some embodiments, the magic color circuit 1200 also includes a command decoder 1260 and an output shaping circuit 1270. The command decoder 1260 is connected to the return-to-zero code circuit 1230 and the output shaping circuit 1270 to perform waveform shaping on the decoded signal and finally output it to the magic color output port 1710.

[0092] Among them, the phantom color output port 1710 is used to connect to the phantom color input port 1720 of the next-level chip; the command decoder 1260 can convert the received return-to-zero code data into a signal for controlling the PWM duty cycle pulse, and send it to the output shaping circuit 1270 at the same time. The output shaping circuit 1270 can output the signal received by any pixel point after waveform shaping, limit the high and low level width and amplitude of the transmitted data, ensure the waveform consistency of the output circuit, and prevent the line waveform distortion from accumulating.

[0093] In some embodiments, the connection method of multiple Hall chips 1000 with integrated color illusion function is as follows: Figure 8 and Fig. 9 As shown, when multiple chips are connected, the first port 1211 of the first chip is connected to the external controller, the first port 1211 of the subsequent chips in series is connected to the color output port 1710 of the previous color chip, the second port 1212 of the color chip is connected to the color output ports 1710 of the first two color chips, and the third port 1213 is connected to the color output ports 1710 of the first three color chips. The control signal transmission method when multiple color chips are connected in series is as follows Fig.10As shown, assuming that the control signal D1 has four groups of 24-bit data signals, one group of 24-bit data signals is used when passing through the first chip, and the control signal D2 transmitted to the second chip has three groups of 24-bit data signals left. Similarly, the control signal D3 transmitted to the third chip has two groups of 24-bit data signals left, and so on.

[0094] like Fig.11 As shown, the utility model integrates two functional circuits into one chip, which has a price advantage compared to using two chips separately or in a package. It has less wafer DI E cost and packaging cost. Compared with simple chip sealing, it reduces the wire group and transmission signal loss of the package bonding wire, thereby improving performance and reducing power consumption, and optimizing the layout and connection of the shared circuit. It eliminates external interference and signal attenuation, improves system performance, improves product production consistency and yield, reduces production links and cycles, and improves efficiency. Compared with the use of two chips in separate packaging, it can effectively reduce chip packaging and testing costs, reduce the space occupation and production costs of PCB boards, and in some applications, it can optimize the design of double-sided boards to single-sided boards to further reduce design costs. At the same time, it improves the performance and energy efficiency of product equipment, optimizes the design space and layout wiring of PCBA solutions, saves materials, reduces development costs and design difficulties. At the same time, it provides more upgradeable space and options for PCBA solutions. This integration method optimizes the functions and performance of the entire system, while reducing the need for external connections and components, thereby reducing costs and power consumption.

[0095] By using the solution of the utility model patent, the yield and consistency of wafer chip production can be improved, and the wafer cost and packaging cost can be reduced; in addition, after reducing the layout and devices of the PCB, the double-sided board design can be simplified to a single-sided board design.

[0096] Finally, it should be noted that the above embodiments are only used to illustrate the technical solution of the utility model, rather than to limit it. Although the utility model has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein by equivalents. These modifications or replacements do not make the essence of the corresponding technical solutions deviate from the scope of the technical solutions of the embodiments of the utility model, and they should all be included in the scope of the claims and specification of the utility model.

Claims

1. A Hall chip with integrated color illusion function, characterized in that: include: A Hall circuit, wherein a first output end of the Hall circuit is connected to a Hall output port; A magic color circuit, the magic color circuit comprising a first input end, a second output end and a third output end, the first input end is connected to the magic color input port, the second output end is connected in parallel with three LED lamp beads, and the third output end is connected to the magic color output port; A bias circuit, the bias circuit is arranged on a first branch between the Hall circuit and the magic color circuit; A reference circuit is arranged on a second branch between the Hall circuit and the magic color circuit.

2. The Hall chip according to claim 1, characterized in that: The Hall circuit comprises a Hall disk, a polarity switching circuit, an offset voltage elimination circuit and an output amplification circuit which are cascaded in sequence.

3. The Hall chip according to claim 2, characterized in that: The polarity switching circuit comprises: An omnipolar amplifier, a unipolar amplifier and a non-polar amplifier, wherein the omnipolar Hall amplifier, the unipolar amplifier and the non-polar amplifier are connected in parallel between the Hall disk and the polarity control switch; The polarity control switch is connected to the offset voltage elimination circuit. The polarity control switch is provided with a polarity control signal input port, and the polarity control signal input port is used to receive the external input polarity control signal and select the corresponding amplifier for output.

4. The Hall chip according to claim 2, characterized in that: The output amplifier circuit comprises: A first array circuit includes a first sensitive resistor array and a first selection switch; The second array circuit includes a second sensitivity resistor array and a second selection switch; wherein the first selection switch and the second selection switch are provided with a sensitivity control signal input port, the sensitivity control signal input port is used to receive a sensitivity control signal, and the resistance value of the first sensitivity resistor array or the second sensitivity resistor is selected to be connected to the amplifier input according to the sensitivity control signal to achieve an adjustable amplification factor; An output amplifier, wherein the second input terminal of the output amplifier is connected to the first sensitivity resistor array, the third input terminal of the output amplifier is connected to the second sensitivity resistor array, and the fourth output terminal of the output amplifier is connected to the first output terminal of the Hall circuit.

5. The Hall chip according to claim 2, characterized in that: The Hall circuit further includes a power consumption switching circuit, which includes a power consumption switching switch, a digital logic circuit, a system clock and a frequency divider; The system clock is connected to the frequency divider, the power consumption switching switch is respectively connected to the frequency divider and the system clock, the power consumption switching switch is connected to the low power consumption switching port on the Hall chip, the power consumption switching switch is connected to the Hall disk through a digital logic circuit, and the low power consumption switching port is used to control the power consumption switching switch according to an external signal.

6. The Hall chip according to claim 1, characterized in that: The magic color circuit comprises: A first port, a second port and a third port, wherein the first port, the second port and the third port are respectively connected to the magic color input port and are used to receive a magic color control signal from an external controller or an upper chip; The adjustable current circuit comprises a return-to-zero code circuit and a programmable constant current source circuit, wherein the first port, the second port and the third port are respectively connected to the return-to-zero code circuit, and the return-to-zero code circuit is connected to the programmable constant current source circuit; A PWM drive circuit is connected to the programmable constant current source circuit, and the PWM drive circuit is connected to the second output end.

7. The Hall chip according to claim 6, characterized in that: The return-to-zero code circuit includes a serial interface of the return-to-zero code protocol, the first port is directly connected to the serial interface, a first delay circuit is connected in series between the second port and the serial interface, and a second delay circuit is connected in series between the third port and the serial interface.

8. The Hall chip according to claim 7, characterized in that: The magic color control signal includes a data signal of a synchronous reset code or a current control code; When the control signal includes a synchronous reset code, the serial interface identifies the magic color control signal as flashing mode control data; When the control signal includes a current control code, the serial interface recognizes the magic color control signal as control data for setting the LED driving current.

9. The Hall chip according to claim 6, characterized in that: The programmable constant current source circuit has a built-in resistor array, and the equivalent resistance of the resistor array is determined by the output code value of the return-to-zero code circuit.

10. The Hall chip according to claim 6, characterized in that: The magic color circuit also includes a command decoder and an output shaping circuit. The command decoder is connected to the return-to-zero code circuit and the output shaping circuit to perform waveform shaping on the decoded signal and finally output it to the magic color output port.

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