Chip packaging substrate

Abstract

The utility model belongs to the technical field of chip packaging substrates, and particularly relates to a chip packaging substrate which comprises a substrate body, a chip, a heat dissipation assembly, a supporting and limiting assembly and a fixing assembly. The substrate body comprises a bottom plate and a cover plate, a U-shaped groove is formed in the top side of the bottom plate, a mounting groove is formed in the inner wall of the bottom of the U-shaped groove, the supporting and limiting assembly is arranged in the mounting groove, the chip is arranged in the mounting groove through the supporting and limiting assembly, a plurality of power connection pins are fixedly installed on the two sides of the chip, and the power connection pins are fixedly connected with the power connection pins. The plurality of power connection pins are laid on the inner wall of the bottom of the U-shaped groove in parallel, the heat dissipation assembly is arranged on the bottom plate and makes contact with the chip, and the fixing assembly is arranged on the cover plate. According to the utility model, the design is reasonable, the operation is simple and convenient, the chip can be rapidly and accurately positioned and packaged, the good heat dissipation effect can be provided for the installed chip, and the protection effect is good.

Description

Technical Field

[0001] The utility model relates to the technical field of chip packaging substrates, in particular to a chip packaging substrate. Background Art

[0002] Chips, or integrated circuits, or microcircuit microchips, wafers / chips in electronics are a way to miniaturize circuits (mainly semiconductor devices, but also passive components, etc.), and are often manufactured on the surface of semiconductor wafers. After the chips are manufactured, they need to be packaged. When packaging the chips, a substrate is required. Traditional chips are directly packaged on the substrate, and there is usually a lack of heat dissipation when the chips are packaged on the core board.

[0003] Referring to the existing "A MEMS chip packaging substrate" with authorization announcement number CN 212924401 U, a thermally conductive silicon layer is arranged on the substrate, and the thermally conductive silicon layer is tightly fitted with the chip fixing base. The thermally conductive silicon layer arranged on the inner side of the chip fixing base and the inner side of the protective cover plate has a good thermal conductivity and heat dissipation effect, which effectively improves the actual use effect and actual service life of the MEMS chip, avoids the situation where the MEMS chip temperature is too high during use and cannot be used normally, ensures the effectiveness and continuity of the MEMS chip, and the tight fit can ensure the thermal conductivity of the thermally conductive silicon layer, which solves the problem that the chip packaging substrate on the market is not ideal in terms of heat dissipation, and the long-term use of the chip will affect its actual service life. At the same time, there is no structure to protect the chip, which is prone to damage during use.

[0004] The utility model provides another solution to solve the above problems.

[0005] The information disclosed in this background technology section is only intended to increase the understanding of the overall background of the present invention, and should not be regarded as acknowledging or suggesting in any form that the information constitutes the prior art already known to a person skilled in the art. Utility Model Content

[0006] The purpose of the utility model is to solve the shortcomings mentioned in the above background technology and to propose a chip packaging substrate.

[0007] The above technical purpose of the utility model is achieved through the following technical solutions: a chip packaging substrate, including a substrate body, a chip, a heat dissipation component, a support and limit component and a fixing component;

[0008] The substrate body includes a bottom plate and a cover plate, a U-shaped groove is provided on the top side of the bottom plate, and a mounting groove is provided on the bottom inner wall of the U-shaped groove, the support and limit assembly is arranged in the mounting groove, and the chip is arranged in the mounting groove through the support and limit assembly, a plurality of power connection pins are fixedly installed on both sides of the chip, and the plurality of power connection pins are laid parallel to each other on the bottom inner wall of the U-shaped groove, the heat dissipation assembly is arranged on the bottom plate and in contact with the chip, the fixing assembly is arranged on the cover plate, and the cover plate is connected to the bottom plate through the fixing assembly.

[0009] Preferably, the support and limiting assembly comprises a pad and a limiting frame, the pad is fixedly mounted on the bottom inner wall of the mounting groove, the limiting frame is fixedly mounted on the top side of the pad, and the chip is snap-fitted and mounted in the limiting frame.

[0010] Preferably, the heat dissipation assembly includes a thermally conductive frame, a plurality of thermally conductive strips and two heat sinks. The thermally conductive frame is fixedly mounted on the inner wall of the mounting groove, the thermally conductive frame is clamped in the gap between the pad and the side wall of the mounting groove, a plurality of thermally conductive strips are fixedly mounted on both sides of the thermally conductive frame, heat sinks are fixedly mounted on both sides of the base plate, and the plurality of thermally conductive strips are fixedly connected to corresponding heat sinks, respectively.

[0011] Preferably, the heat dissipation component further comprises thermally conductive silicone, and the gap between the thermally conductive frame and the chip is filled with thermally conductive silicone.

[0012] Preferably, the heat conducting strip is installed in the base plate in an embedded manner.

[0013] Preferably, the fixing assembly includes a plurality of limit screws, the four corners of the cover plate are threadedly installed with limit screws, a plurality of screw holes are opened on the bottom inner wall of the U-shaped groove, and the plurality of screws are respectively matched with the corresponding screw holes.

[0014] Preferably, a rectangular opening is provided on the cover plate, and a same rectangular rubber strip is fixedly installed on the inner wall of the rectangular opening and the bottom side of the cover plate near the rectangular opening. The size of the rectangular opening is smaller than the size of the chip, and the rectangular outer contour size formed by the vertical projection of the rubber strip is larger than the size of the chip.

[0015] Preferably, a plurality of slots are provided at both ends of the bottom side of the cover plate, and the width of the slots corresponds to the width of the power connection pins directly below the slots.

[0016] The beneficial effects of the utility model are as follows: the support and limiting components are provided to facilitate preliminary positioning of the chip to be packaged, while the heat dissipation components are provided to quickly discharge the heat generated during the operation of the chip, and the fixing components are provided to facilitate rapid installation of the cover plate in the U-shaped groove on the bottom plate, thereby enabling rapid packaging of the chip.

[0017] The multiple card slots provided can effectively limit the multiple power pins when the cover plate is installed in the U-shaped groove on the base plate. The rubber strips provided can prevent the top side of the chip from directly colliding with the cover plate when the cover plate is installed in the U-shaped groove on the base plate, thereby preventing the chip from being damaged. At the same time, after the cover plate and the base plate are assembled and installed, they can also provide better protection for the core board.

[0018] In summary, the chip packaging substrate proposed in the present application has a good heat dissipation effect, is convenient for accurate positioning of the chip and realizes rapid packaging operations, has a good protection effect, is simple and convenient to operate, and has good practicality. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.

[0020] Figure 1 This is a schematic diagram of the three-dimensional structure of a chip packaging substrate proposed by the utility model;

[0021] Figure 2 This is a schematic cross-sectional structure diagram of a chip packaging substrate proposed by the utility model;

[0022] Figure 3 This is a partial three-dimensional structural schematic diagram of a chip packaging substrate proposed by the utility model;

[0023] Figure 4 This is a three-dimensional structural schematic diagram of a cover plate, a limiting screw, a rectangular opening, a rubber strip and a card slot in a chip packaging substrate proposed by the utility model;

[0024] Figure 5 This is a three-dimensional structural schematic diagram of a heat-conducting frame, a heat-sweeping strip and a heat sink in a chip packaging substrate proposed by the utility model;

[0025] Figure 6 The present invention is a schematic diagram of the three-dimensional structure of a support and limit assembly part in a chip packaging substrate.

[0026] In the figure: 1. bottom plate; 2. cover plate; 21. rubber strip; 22. limit screw; 23. slot; 3. pad; 31. limit frame; 4. chip; 41. power pin; 5. thermal conductive frame; 51. thermal conductive strip; 52. heat sink. DETAILED DESCRIPTION

[0027] The technical solution of the utility model will be described clearly and completely below in conjunction with specific embodiments. Obviously, the described embodiments are only part of the embodiments of the utility model, not all of them. Based on the embodiments of the utility model, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the utility model.

[0028] Reference Figure 1-6 A chip packaging substrate comprises a substrate body and a chip 4. The substrate body comprises a bottom plate 1 and a cover plate 2. A U-shaped groove is provided on the top side of the bottom plate 1, and a mounting groove is provided on the bottom inner wall of the U-shaped groove. A pad 3 is fixedly installed on the bottom inner wall of the mounting groove. A limit frame 31 is fixedly installed on the top side of the pad 3. The chip 4 is clamped and installed in the limit frame 31, which can provide support and limit for the chip 4, so as to ensure the accuracy of the packaging position of the chip 4. A plurality of power connection pins 41 are fixedly installed on both sides of the chip 4. The plurality of power connection pins 41 are parallel to each other and flatly laid on the bottom inner wall of the U-shaped groove. A heat conduction frame 5 is fixedly installed on the inner wall of the mounting groove. The heat conduction frame 5 is clamped in the gap between the pad 3 and the side wall of the mounting groove. A plurality of thermally conductive strips 51 are fixedly installed on both sides of the thermally conductive frame 5, and a heat sink 52 is fixedly installed on both sides of the base plate 1. The plurality of thermally conductive strips 51 are fixedly connected to the corresponding heat sinks 52, respectively, and can discharge the heat transferred from the mounting groove to the thermally conductive frame 5. The gap between the thermally conductive frame 5 and the chip 4 is filled with thermally conductive silicone, which can more efficiently transfer the heat generated on the chip 4 to the thermally conductive frame 5, while ensuring better electrical insulation. The four corners of the cover plate 2 are threadedly installed with limit screws 22, and a plurality of screw holes are provided on the bottom inner wall of the U-shaped groove, and the plurality of screws are respectively matched with the corresponding screw holes, so that the cover plate 2 can be clamped in the U-shaped groove on the base plate 1, so that the positioned chip 4 can be quickly packaged.

[0029] In this embodiment, in order to reduce the space occupied by the installation groove and the U-shaped groove on the bottom plate 1, the heat conducting strip 51 is installed in the bottom plate 1 in an embedded manner.

[0030] In this embodiment, in order to ensure that the cover plate 2 will not directly come into frictional contact with the chip 4 when installed in the U-shaped groove on the base plate 1, and at the same time enable the cover plate 2 to stably package and limit the chip 4 with the cooperation of the rubber strip 21, a rectangular opening is opened on the cover plate 2, and the inner wall of the rectangular opening and the bottom side of the cover plate 2 near the rectangular opening are fixedly installed with the same rectangular rubber strip 21, the size of the rectangular opening is smaller than the size of the chip 4, and the rectangular outer contour size formed by the vertical projection of the rubber strip 21 is larger than the size of the chip 4.

[0031] In this embodiment, in order to facilitate the effective limitation of multiple power pins 41 after the cover plate 2 is stuck in the U-shaped groove on the base plate 1, multiple slots 23 are opened at both ends of the bottom side of the cover plate 2, and the width of the slots 23 corresponds to the width of the power pins 41 thereunder.

[0032] Working principle: When in use, first place the chip 4 to be installed in the limiting frame 31, then lay its power pins 41 parallel to each other on the inner wall at the bottom of the U-shaped groove, then inject thermal conductive silicone into the gap between the thermal conductive frame 5 and the chip 4, and then install the cover 2 in the U-shaped groove. During this process, the power pins 41 of the chip 4 can be quickly limited and fixed under the action of the card slot 23. After the cover 2 is installed, the cover 2 is fixed by the limiting screws 22 and the screw holes to complete the rapid packaging of the chip 4.

[0033] The heat generated by the chip 4 when working is transferred to the heat-conducting frame 5 through the thermally conductive silica gel, and then quickly transferred to the heat sink 52 through multiple thermally conductive strips 51 and discharged outward by the heat sink 52, thereby effectively improving the heat dissipation effect of the chip 4.

[0034] The above is a detailed introduction to a chip packaging substrate provided by the present invention. This article uses specific embodiments to illustrate the principles and implementation methods of the present invention. The description of the above embodiments is only used to help understand the method and core idea of ​​the present invention. It should be pointed out that for ordinary technicians in this technical field, without departing from the principle of the present invention, the present invention can also be improved and modified, and these improvements and modifications also fall within the scope of protection of the claims of the present invention.

Claims

1. A chip packaging substrate, characterized in that: It comprises a substrate body, a chip (4), a heat dissipation component, a support and limit component and a fixing component; The substrate body comprises a bottom plate (1) and a cover plate (2); a U-shaped groove is provided on the top side of the bottom plate (1), and a mounting groove is provided on the bottom inner wall of the U-shaped groove; the support and limit assembly is arranged in the mounting groove, and the chip (4) is arranged in the mounting groove through the support and limit assembly; a plurality of power connection pins (41) are fixedly installed on both sides of the chip (4); the plurality of power connection pins (41) are laid parallel to each other on the bottom inner wall of the U-shaped groove; the heat dissipation assembly is arranged on the bottom plate (1) and in contact with the chip (4); the fixing assembly is arranged on the cover plate (2), and the cover plate (2) is connected to the bottom plate (1) through the fixing assembly.

2. The chip packaging substrate according to claim 1, characterized in that: The support and limiting assembly comprises a pad (3) and a limiting frame (31); the pad (3) is fixedly mounted on the bottom inner wall of the mounting groove; the limiting frame (31) is fixedly mounted on the top side of the pad (3); and the chip (4) is snap-fitted and mounted in the limiting frame (31).

3. The chip packaging substrate according to claim 2, characterized in that: The heat dissipation assembly comprises a heat conduction frame (5), a plurality of heat conduction strips (51) and two heat sinks (52); the heat conduction frame (5) is fixedly mounted on the inner wall of the mounting groove; the heat conduction frame (5) is clamped in the gap between the backing plate (3) and the side wall of the mounting groove; the plurality of heat conduction strips (51) are fixedly mounted on both sides of the heat conduction frame (5); the heat sinks (52) are fixedly mounted on both sides of the bottom plate (1); and the plurality of heat conduction strips (51) are fixedly connected to corresponding heat sinks (52) respectively.

4. The chip packaging substrate according to claim 3, characterized in that: The heat dissipation component also includes thermally conductive silica gel, and the gap between the thermally conductive frame (5) and the chip (4) is filled with the thermally conductive silica gel.

5. The chip packaging substrate according to claim 3, characterized in that: The heat conducting strip (51) is installed in the bottom plate (1) in an embedded manner.

6. The chip packaging substrate according to claim 1, characterized in that: The fixing assembly comprises a plurality of limit screws (22), the four corners of the cover plate (2) are threadedly mounted with the limit screws (22), a plurality of screw holes are provided on the bottom inner wall of the U-shaped groove, and the plurality of screws are respectively matched with the corresponding screw holes.

7. The chip packaging substrate according to claim 1, characterized in that: The cover plate (2) is provided with a rectangular opening, and a same rectangular rubber strip (21) is fixedly installed on the inner wall of the rectangular opening and the bottom side of the cover plate (2) near the rectangular opening, the size of the rectangular opening is smaller than the size of the chip (4), and the size of the rectangular outer contour formed by the vertical projection of the rubber strip (21) is larger than the size of the chip (4).

8. The chip packaging substrate according to claim 1, characterized in that: A plurality of slots (23) are provided at both ends of the bottom side of the cover plate (2), and the width of the slots (23) corresponds to the width of the power connection pins (41) directly below the slots (23).

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