Multi-chip packaging structure with W-band receiving function
By integrating the waveguide probe into a plastic-sealed tube and packaging it in a multi-chip packaging structure with W-band reception function, the high insertion loss problem is solved, the chip RF index is improved and the chip stability is enhanced.
Patent Information
- Application Number
- CN202421322379.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-06-11
- Publication Date
- 2025-02-18
- Estimated Expiration
- 2034-06-11
AI Technical Summary
The prior art has high insertion loss problem in the design of multifunction chips with W-band reception functions, which affects the improvement of chip index.
By integrating the waveguide probes on the outside of the edge of the dielectric substrate, and encapsulating the W-band receiver chip and the frequency multiplier chip in a plastic-sealed tube shell, additional losses are minimized and the internal bare chip is protected.
It achieves the minimization of insertion loss, improves the chip RF index of multi-chip packaging structure, and enhances the stability of the chip through the protection of plastic-sealed tube shells.
Smart Images
Figure CN222509309U_ABST
Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of W-band multi-chip packaging, in particular to a multi-chip packaging structure with a W-band receiving function. Background Art
[0002] Because terahertz band multifunctional chips are difficult to design, complex to manufacture, and have a low yield rate. At present, there are relatively few complex multifunctional chips in the high-frequency band that can be used for W-band reception. When a multifunctional chip module with complex functions is required, it is necessary to use multiple single-function chips or simple multifunctional chips for packaging. At the same time, in order to minimize unnecessary insertion loss, low-loss transition methods such as waveguide probes are often used (other methods have large losses and will deteriorate chip indicators). However, the terahertz frequency die or chip re-packaging currently used for W-band reception requires the production of corresponding waveguide probes for transition, which still brings large insertion losses, affecting the further improvement of chip indicators.
[0003] Therefore, it is necessary to provide a technical solution that can further reduce insertion loss to improve chip indicators of a multifunctional chip with W-band receiving function. Utility Model Content
[0004] In order to solve the above technical problems, the utility model provides a multi-chip packaging structure with W-band receiving function.
[0005] The utility model provides a multi-chip packaging structure with a W-band receiving function, comprising a waveguide probe, a W-band receiving chip, a frequency multiplier chip, a dielectric substrate, and a plastic-sealed tube shell;
[0006] The waveguide probe is integrated and arranged outside the edge of the dielectric substrate, and its output end is electrically connected to the radio frequency input end of the W-band receiving chip;
[0007] The W-band receiving chip and the frequency multiplier chip are both arranged in the main body of the dielectric substrate;
[0008] The LO input terminal of the W-band receiving chip is electrically connected to the RF output terminal of the frequency multiplier chip, and the intermediate frequency output terminal is used to output the intermediate frequency signal;
[0009] The radio frequency input end of the frequency multiplier chip is used to receive a radio frequency input signal;
[0010] The W-band receiving chip and the frequency multiplier chip arranged on the main body of the dielectric substrate are packaged in the plastic package shell.
[0011] In a possible implementation manner, the waveguide probe is integrally connected to the substrate of the dielectric substrate in the same plane.
[0012] In a possible implementation, the main body of the dielectric substrate is separately provided with a sunken hollow area;
[0013] The W-band receiving chip and the frequency multiplier chip are both arranged in the sunken hollow area.
[0014] In a possible implementation, the sunken hollow area is provided with a plurality of first grounding holes;
[0015] The plurality of first grounding holes in the sunken hollow area are evenly distributed to form a grounding hole array.
[0016] In a possible implementation manner, the first grounding hole is a solid grounding setting.
[0017] In a possible implementation, the frequency multiplier chip is a double frequency chip.
[0018] In a possible implementation manner, the waveguide probe is a coplanar waveguide probe.
[0019] In a possible implementation manner, a TaN absorption layer is plated inside the plastic package shell.
[0020] In a possible implementation, the edge of the main body of the dielectric substrate is further provided with a first power supply interface, a second power supply interface, a radio frequency input interface, an intermediate frequency output interface, and a tube shell ground interface;
[0021] The voltage input terminal of the W-band receiving chip is electrically connected to the first power supply interface, the ground terminal thereof is electrically connected to the shell ground interface, and the intermediate frequency output terminal thereof is electrically connected to the intermediate frequency output interface;
[0022] The voltage input terminal of the frequency multiplier chip is electrically connected to the second power supply interface, and the RF input terminal of the frequency multiplier chip is electrically connected to the RF input interface.
[0023] In a possible implementation, the main body of the dielectric substrate is further provided with chip capacitors near the voltage input terminal of the W-band receiving chip, the ground terminal, and the voltage input terminal of the frequency multiplier chip;
[0024] The voltage input terminal, the ground terminal, and the voltage input terminal of the W-band receiving chip are electrically connected to the chip capacitors close to them respectively;
[0025] A second grounding hole is arranged around the chip capacitor;
[0026] The chip capacitor is electrically connected to the second grounding holes around it for grounding filtering.
[0027] The technical solution provided by the utility model has at least the following beneficial effects:
[0028] By integrating the waveguide probe on the outside of the edge of the dielectric substrate, the additional loss outside the chip can be minimized, and the chip RF index of the multi-chip packaging structure with W-band receiving function can be guaranteed to the maximum extent; at the same time, the W-band receiving chip and the multiplier chip are packaged in a plastic tube shell to protect the internal bare chip to the maximum extent. BRIEF DESCRIPTION OF THE DRAWINGS
[0029] Figure 1 A schematic diagram of the assembly layout of a multi-chip package structure with W-band receiving function provided by an embodiment of the utility model;
[0030] Figure 2 A structural diagram of a dielectric substrate in a multi-chip packaging structure with a W-band receiving function provided by an embodiment of the utility model;
[0031] Figure 3 A schematic diagram of the metal layer areas on the front and back sides of the dielectric substrate in the multi-chip packaging structure with W-band receiving function provided by an embodiment of the utility model;
[0032] Figure 4 A structural diagram of a plastic package shell in a multi-chip packaging structure with W-band receiving function provided by an embodiment of the utility model;
[0033] In the attached drawings, 11, waveguide probe; 12, W-band receiving chip; 13, frequency multiplier chip; 14, dielectric substrate; 15, plastic-encapsulated tube shell; 16, sunken hollow area; 17, first grounding hole; 18, first power supply interface; 19, second power supply interface; 20, RF input interface; 21, intermediate frequency output interface; 22, tube shell ground interface; 23, chip capacitor; 24, second grounding hole. DETAILED DESCRIPTION
[0034] In order to deepen the understanding of the present invention, the present invention will be further described in detail below with reference to the accompanying drawings and embodiments. The embodiments are only used to explain the present invention and do not limit the protection scope of the present invention.
[0035] Please refer to Figures 1 to 4 The utility model provides a multi-chip packaging structure with a W-band receiving function, comprising a waveguide probe 11, a W-band receiving chip 12, a frequency multiplier chip 13, a dielectric substrate 14, and a plastic package shell 15;
[0036] The waveguide probe 11 is integrated and disposed on the outer side of the edge of the dielectric substrate 14, and its output end is electrically connected to the RF input end of the W-band receiving chip 12;
[0037] The W-band receiving chip 12 and the frequency multiplier chip 13 are both arranged in the main body of the dielectric substrate 14;
[0038] The LO input terminal of the W-band receiving chip 12 is electrically connected to the RF output terminal of the frequency multiplier chip 13, and the intermediate frequency output terminal is used to output the intermediate frequency signal;
[0039] The RF input end of the frequency multiplier chip 13 is used to receive a RF input signal;
[0040] The W-band receiving chip 12 and the frequency multiplier chip 13 disposed on the main body of the dielectric substrate 14 are packaged in the plastic package shell 15 .
[0041] In this embodiment, the waveguide probe 11 can adopt a W-band coplanar waveguide probe. The W-band receiving chip 12 adopts a conventional model, and its radio frequency input terminal RFin can input a 90-97GHz signal, which is processed by a low noise amplifier LNA and output to the mixer MIXER. Its LO input terminal can input a 30-32.3GHz signal, which is processed by 3 times and output to the mixer MIXER after driving and amplifying. After the mixer MIXER processes the two received signals, it can output a DC-5GHz intermediate frequency signal through the intermediate frequency output terminal IFout of the W-band receiving chip 12. The frequency multiplier chip 13 can adopt a conventional frequency multiplication chip, such as a double frequency chip. The dielectric substrate 14 and the plastic package tube shell 15 are both conventional models. The dielectric substrate 14 can adopt an AIN substrate, and its main body can adopt a rectangular design, and the part of the outer side of its edge for integrating the waveguide probe 11 can be designed as a small-sized rectangle.
[0042] In specific implementation, the relevant electrical connections can be realized by gold wires, for example, the output end of the waveguide probe 11 and the RF input end RFin of the W-band receiving chip 12, and the LO input end of the W-band receiving chip 12 and the RF output end RFout of the frequency multiplier chip 13 can be electrically connected by gold wires. A solid grounding hole can be set around the output end of the waveguide probe 11. Figure 1 The shaded area in the figure is the bonding alignment area of the plastic package tube shell 15. Figure 4 The plastic package tube shell 15 in the bonding area bonds the dielectric substrate 14 to the fixed area of the plastic package tube shell 15 through epoxy resin, so that the W-band receiving chip 12 and the frequency multiplier chip 13 can be protected, so that the multi-chip packaging structure has certain three-proof functions.
[0043] It should be pointed out that the waveguide probe 11 and the dielectric substrate 14 are designed as one body, which can maximize the integration and facilitate the subsequent waveguide cavity integration. The technical solution provides an improved multi-chip packaging structure, which combines multiple single-function chips to obtain a multi-chip module with functions such as reception and down-conversion. When the W-band receiving chip 12 adopts 3 times the frequency and the frequency multiplier chip 13 adopts 2 times the frequency, the multi-chip packaging structure also has a 6-times frequency function. At the same time, the multi-chip packaging structure implements tube shell protection through the plastic tube shell 15, which can protect the internal bare chips (such as the W-band receiving chip 12 and the frequency multiplier chip 13) to the maximum extent.
[0044] In a possible implementation, the waveguide probe 11 and the substrate of the dielectric substrate 14 are integrally connected in the same plane.
[0045] In this embodiment, the waveguide probe 11 can adopt a W-band coplanar waveguide probe. The W-band coplanar waveguide probe is integrated with the substrate of the dielectric substrate 14, which can minimize the additional loss outside the chip and maximize the RF indicators of the chip. At the same time, it can further facilitate waveguide integration, greatly improve the subsequent design efficiency, and facilitate product iteration.
[0046] In a possible implementation, the main body of the dielectric substrate 14 is separately provided with a sunken hollow area 16;
[0047] The W-band receiving chip 12 and the frequency multiplier chip 13 are both disposed in the sunken hollow area 16 .
[0048] In this embodiment, Figure 2 The upper figure is a top view of the dielectric substrate 14, and the lower figure is Figure 2 The cross-sectional view based on the AA direction in the above figure. The sunken hollow area 16 is obtained by sunken hollowing of the dielectric substrate 14. In the specific implementation, the specific size of the dielectric substrate 14 can be adjusted according to actual needs. For example, the thickness of the dielectric substrate 14 can be 0.127 mm, the width can be 3.4 mm, and the sunken hollow area 16 is a chip welding area sunken by 0.03 mm.
[0049] In a possible implementation, the sunken hollow area 16 is provided with a plurality of first grounding holes 17;
[0050] The plurality of first grounding holes 17 in the sunken hollow area 16 are evenly distributed to form a grounding hole array.
[0051] In this embodiment, Figure 2 The first grounding hole 17 is a conventional grounding hole with a diameter of 0.12 mm, which is used for chip heat dissipation and grounding.
[0052] In a possible implementation, the first grounding hole 17 is a solid grounding setting.
[0053] In this embodiment, Figure 3 The upper figure is the metal layer area on the front side of the dielectric substrate 14, and the lower figure is the metal layer area on the back side of the dielectric substrate 14. The first grounding hole 17 penetrates from the front side of the dielectric substrate 14 to connect to the metal layer area on the back side of the dielectric substrate 14 to achieve grounding.
[0054] In a possible implementation, the frequency multiplier chip 13 is a double frequency chip.
[0055] In this embodiment, the frequency multiplier chip 13 is a double frequency chip, and its RF input terminal RFin can input a 12-20 GHz signal, and through double frequency processing and drive amplification, it can output a 24-40 GHz signal through its RF output terminal RFout.
[0056] In a possible implementation, the waveguide probe 11 is a coplanar waveguide probe.
[0057] In this embodiment, the coplanar waveguide probe adopts a standard coplanar waveguide probe.
[0058] In a possible implementation, a TaN absorption layer is plated inside the plastic package tube shell 15 .
[0059] In this embodiment, the TaN absorption layer is used to absorb electromagnetic waves. Figure 4 The upper figure is a top view of the plastic package tube shell 15 , and the lower figure is a cross-sectional view based on the CC direction in the top view. A 0.004 mm TaN absorption layer can be uniformly plated inside the plastic package tube shell 15 .
[0060] In a possible implementation, the edge of the main body of the dielectric substrate 14 is further provided with a first power supply interface 18, a second power supply interface 19, a radio frequency input interface 20, an intermediate frequency output interface 21, and a tube shell ground interface 22;
[0061] The voltage input terminal of the W-band receiving chip 12 is electrically connected to the first power supply interface 18, the ground terminal thereof is electrically connected to the shell ground interface 22, and the intermediate frequency output terminal thereof is electrically connected to the intermediate frequency output interface 21;
[0062] The voltage input terminal of the frequency multiplier chip 13 is electrically connected to the second power supply interface 19 , and the RF input terminal thereof is electrically connected to the RF input interface 20 .
[0063] In this embodiment, the first power supply interface 18, the second power supply interface 19, the RF input interface 20, the IF output interface 21, and the shell-to-ground interface 22 are interfaces provided by the multi-chip packaging structure. The first power supply interface 18 and the second power supply interface 19 are both conventional power supply interfaces. In a specific implementation, the IF output terminal of the W-band receiving chip 12 and the IF output interface 21, and the RF input terminal of the frequency multiplier chip 13 and the RF input interface 20 can be electrically connected by gold wire.
[0064] In a possible implementation, the main body of the dielectric substrate 14 is further provided with chip capacitors 23 near the voltage input terminal of the W-band receiving chip 12, the ground terminal, and the voltage input terminal of the frequency multiplier chip 13;
[0065] The voltage input terminal and the ground terminal of the W-band receiving chip 12 and the voltage input terminal of the frequency multiplier chip 13 are electrically connected to the chip capacitor 23 close to them respectively;
[0066] A second grounding hole 24 is provided around the chip capacitor 23;
[0067] The chip capacitor 23 is electrically connected to the second grounding holes 24 around it for grounding filtering.
[0068] In this embodiment, the chip capacitor 23 is a conventional type and is used for power supply filtering. The second grounding hole 24 is a conventional grounding hole and is a solid grounding setting. Figure 1 , two first power supply interfaces 18, two second power supply interfaces 19, and a tube shell ground interface 22 are electrically connected to a corresponding chip capacitor 23 through gold wires, and the corresponding chip capacitor 23 is electrically connected to the voltage input terminal VD, the ground terminal VG, and the voltage input terminal VD of the W-band receiving chip 12 and the frequency multiplier chip 13 through gold wires. At the same time, a corresponding second grounding hole 24 is set in a suitable area of the corresponding chip capacitor 23, and the chip capacitor 23 and the second grounding hole 24 are electrically connected by conventional design, which is used for grounding filtering of the chip capacitor 23. Figure 3 The upper figure in the figure is the metal layer area on the front side of the dielectric substrate 14, and the lower figure is the metal layer area on the back side of the dielectric substrate 14. The second grounding hole 24 penetrates from the front side of the dielectric substrate 14 to the metal layer area on the back side of the dielectric substrate 14 to achieve grounding. It should be pointed out that the metal layer area on the front side of the dielectric substrate 14 needs to be printed with circuits according to the actual deployment of the W-band receiving chip 12, the frequency multiplier chip 13, the chip capacitor 23, the second grounding hole 24, etc. to meet the realization of the overall function of the multi-chip packaging structure, and the circuit printing can adopt conventional means.
[0069] The multi-chip packaging structure of the W-band receiving function in the utility model includes a plurality of chips with different functions (such as a W-band receiving chip 12 and a frequency multiplier chip 13). According to the functions and indicators of each chip, and in combination with the system indicator requirements under most scene applications, the plurality of chips with different functions are combined into one. Combined with the standard coplanar waveguide probe on the same plate (i.e., the dielectric substrate 14), the traditional micro-assembly technology is used to maximize the small package volume and reduce the loss introduced by the additional. The same plate is synchronously equipped with a corresponding chip capacitor 23 for filtering, and finally all components are uniformly packaged in a plastic package shell 15. The multi-chip packaging structure of the W-band receiving function can be used as a multi-chip module suitable for the terahertz band, so that the multi-chip module can receive terahertz band signals and convert them into low-frequency intermediate frequency signals. In the multi-chip module, the coplanar waveguide probe is integrated with the AlN substrate on which the multi-chip is installed. This method can minimize the probe, integrate it, minimize the size and reduce the insertion loss. At the same time, multiple chips with different functions are integrated in this solution, and multiple chips are combined and assembled on the same substrate in the form of micro-assembly. At the same time, all chips with different functions and all chip capacitors 23 are within the bonding alignment area of the plastic package tube shell 15, so that the chip capacitors 23 can also be protected by the plastic package tube shell 15, and the three-proof function of the multi-chip module can be further improved. By integrating the probe chip, the multi-chip module can make the chip module as small as possible, which is convenient for downstream users to miniaturize subsequent products.
[0070] The above embodiments should not limit the present invention in any way, and any technical solutions obtained by equivalent replacement or equivalent conversion shall fall within the protection scope of the present invention.
Claims
1. A multi-chip package structure with W-band receiving function, characterized in that: Including waveguide probe, W-band receiving chip, frequency multiplier chip, dielectric substrate, plastic package shell; The waveguide probe is integrated and arranged outside the edge of the dielectric substrate, and its output end is electrically connected to the radio frequency input end of the W-band receiving chip; The W-band receiving chip and the frequency multiplier chip are both arranged in the main body of the dielectric substrate; The LO input terminal of the W-band receiving chip is electrically connected to the RF output terminal of the frequency multiplier chip, and the intermediate frequency output terminal is used to output the intermediate frequency signal; The radio frequency input end of the frequency multiplier chip is used to receive a radio frequency input signal; The W-band receiving chip and the frequency multiplier chip arranged on the main body of the dielectric substrate are packaged in the plastic package shell.
2. The multi-chip package structure according to claim 1, characterized in that: The waveguide probe is integrally connected with the substrate of the dielectric substrate in the same plane.
3. The multi-chip package structure according to claim 1, characterized in that: The main body of the dielectric substrate is separately provided with sunken hollow areas; The W-band receiving chip and the frequency multiplier chip are both arranged in the sunken hollow area.
4. The multi-chip package structure according to claim 3, characterized in that: The sunken hollow area is provided with a plurality of first grounding holes; The plurality of first grounding holes in the sunken hollow area are evenly distributed to form a grounding hole array.
5. The multi-chip package structure according to claim 4, characterized in that: The first grounding hole is a solid grounding setting.
6. The multi-chip package structure according to claim 1, characterized in that: The frequency multiplier chip is a double frequency chip.
7. The multi-chip package structure according to claim 1, characterized in that: The waveguide probe is a coplanar waveguide probe.
8. The multi-chip package structure according to claim 1, characterized in that: The interior of the plastic package tube shell is plated with a TaN absorption layer.
9. The multi-chip package structure according to claim 1, characterized in that: The edge of the main body of the dielectric substrate is also provided with a first power supply interface, a second power supply interface, a radio frequency input interface, an intermediate frequency output interface, and a tube shell ground interface; The voltage input terminal of the W-band receiving chip is electrically connected to the first power supply interface, the ground terminal thereof is electrically connected to the shell ground interface, and the intermediate frequency output terminal thereof is electrically connected to the intermediate frequency output interface; The voltage input terminal of the frequency multiplier chip is electrically connected to the second power supply interface, and the RF input terminal of the frequency multiplier chip is electrically connected to the RF input interface.
10. The multi-chip package structure according to claim 9, characterized in that: The main body of the dielectric substrate is also provided with chip capacitors respectively near the voltage input terminal of the W-band receiving chip, the ground terminal, and the voltage input terminal of the frequency multiplier chip; The voltage input terminal, the ground terminal, and the voltage input terminal of the W-band receiving chip are electrically connected to the chip capacitors close to them respectively; A second grounding hole is arranged around the chip capacitor; The chip capacitor is electrically connected to the second grounding holes around it for grounding filtering.