Low-power-consumption Bluetooth chip based on SIP technology and intelligent ring
By adopting low-power Bluetooth chips based on SIP technology, the problems of false soldering, line breaking and material dissipation caused by limited space in PCBA boards in smart ring production are solved, and the yield of finished products is improved.
Patent Information
- Application Number
- CN202421266394.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Utility models(China)
- Current Assignee / Owner
- Filing Date
- 2024-06-04
- Publication Date
- 2025-02-28
- Estimated Expiration
- 2034-06-04
AI Technical Summary
During the production process of existing smart rings, due to the limited space of PCBA boards, it is difficult to avoid problems such as false welding, line breakage and material dissipation, resulting in low production yield.
Low-power Bluetooth chips based on SIP technology are adopted to reduce the number of chips, increase integration and reduce process difficulty through the combination of substrate, Bluetooth bare chip, memory bare chip, PMIC chip and LDO chip.
It effectively reduces the number of chips, improves the yield of the finished product of smart rings, and reduces problems such as false welding, line breakage and material dissipation in production.
Smart Images
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Abstract
Description
Technical Field
[0001] The utility model relates to the technical field of chip packaging, and in particular to a low-power Bluetooth chip and a smart ring based on SIP technology. Background Art
[0002] There are usually more than 70 materials on the existing PCBA, including Bluetooth chips, PPG, NTC, IMU, power supply and crystal oscillator. Due to limited space, the materials can only be packaged in BGA or WLCSP, or 0201. Bending and glue filling in the production process of smart rings will cause cold soldering, PCBA board circuit breakage or material loss, which greatly reduces the production yield of smart rings. Utility Model Content
[0003] In view of this, the embodiments of the present disclosure provide a low-power Bluetooth chip and a smart ring based on SIP technology. The various parts within the low-power Bluetooth chip can replace dozens of original materials, greatly reducing the number of chips, increasing integration, and reducing the difficulty of chip processing, thereby improving the finished product yield of the smart ring.
[0004] In a first aspect, an embodiment of the present disclosure provides a low-power Bluetooth chip based on SIP technology, including:
[0005] substrate;
[0006] A Bluetooth bare chip, which is wire-bonded to the substrate;
[0007] A storage bare chip, stacked on the Bluetooth bare chip;
[0008] A PMIC chip, flip-chip connected to the substrate;
[0009] An LDO chip is welded to the substrate;
[0010] The Bluetooth bare chip, the PMIC chip and the LDO chip do not contact each other.
[0011] According to a specific implementation manner of the embodiment of the present disclosure, the Bluetooth bare chip and the storage bare chip are interconnected by wire bonding.
[0012] According to a specific implementation manner of the embodiment of the present disclosure, the orthographic projection of the storage bare chip falls on the Bluetooth bare chip.
[0013] According to a specific implementation of the embodiment of the present disclosure, the PMIC chip and the LDO chip are both welded to the substrate in a flat manner.
[0014] According to a specific implementation of the embodiment of the present disclosure, the distance between the PMIC chip and the LDO chip is 0.255 mm-0.5 mm.
[0015] According to a specific implementation of the embodiment of the present disclosure, the low-power Bluetooth chip further includes a plurality of resistor and capacitor components, which are soldered to the substrate by solder paste.
[0016] According to a specific implementation of the embodiment of the present disclosure, the packaging form of the LDO chip is WLCSP packaging, and the packaging form of the PMIC chip is DFN packaging.
[0017] In a second aspect, an embodiment of the present disclosure provides a smart ring, including:
[0018] Several soft boards;
[0019] A plurality of hard boards are each provided with the low-power Bluetooth chip as described above; wherein the soft board and the hard board are spaced apart.
[0020] According to a specific implementation of the embodiment of the present disclosure, evenly distributed motion sensor chips, medical sensor chips and charging management chips are also provided on the hard board.
[0021] According to a specific implementation of the embodiment of the present disclosure, the width of each of the soft boards is 2 mm-10 mm.
[0022] The low-power Bluetooth chip and smart ring based on SIP technology in the embodiments of the present disclosure include a substrate, a Bluetooth bare chip bonded to the substrate by wire bonding, a storage bare chip stacked on the Bluetooth bare chip, a PMIC chip flip-chip connected to the substrate, and an LDO chip welded to the substrate, wherein the Bluetooth bare chip. The PMIC chip and the LDO chip do not contact each other. Through the solution of the present disclosure, each part of the low-power Bluetooth chip can replace dozens of original materials, greatly reducing the number of chips, increasing the integration, and reducing the difficulty of chip processing, thereby improving the finished product yield of the smart ring. BRIEF DESCRIPTION OF THE DRAWINGS
[0023] In order to more clearly illustrate the technical solutions of the embodiments of the present disclosure, the drawings required for use in the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present disclosure. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work.
[0024] Figure 1 A schematic diagram of the structure of a low-power Bluetooth chip provided in an embodiment of the present disclosure;
[0025] Figure 2A schematic diagram of the structure of a smart ring provided in an embodiment of the present disclosure. DETAILED DESCRIPTION
[0026] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present application are given in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.
[0027] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application. The term "and / or" used herein includes any and all combinations of one or more of the related listed items.
[0028] It should be understood that when an element or layer is referred to as "on ...", "adjacent to ...", "connected to" or "coupled to" other elements or layers, it can be directly on, adjacent to, connected to or coupled to other elements or layers, or there can be intervening elements or layers. On the contrary, when an element is referred to as "directly on ...", "directly adjacent to ...", "directly connected to" or "directly coupled to" other elements or layers, there are no intervening elements or layers. It should be understood that although the terms first, second, third, etc. can be used to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present application, the first element, component, region, layer or part discussed below can be represented as a second element, component, region, layer or part.
[0029] Spatially relative terms such as "under," "below," "below," "under," "above," "above," etc., may be used herein for ease of description to describe the relationship of an element or feature shown in the figures to other elements or features. It should be understood that in addition to the orientations shown in the figures, the spatially relative terms are intended to include different orientations of the device in use and operation. For example, if the device in the accompanying drawings is flipped, then the elements or features described as "under other elements" or "under" or "under" will be oriented as "on" the other elements or features. Therefore, the exemplary terms "under" and "under" may include both upper and lower orientations. The device may be oriented otherwise (rotated 90 degrees or other orientations) and the spatial descriptors used herein are interpreted accordingly.
[0030] The purpose of the terms used herein is only to describe specific embodiments and is not intended to be limiting of the present application. When used herein, the singular forms "one", "an" and "said / the" are also intended to include plural forms, unless the context clearly indicates otherwise. It should also be understood that the terms "consisting of" and / or "comprising", when used in this specification, determine the presence of the features, integers, steps, operations, elements and / or parts, but do not exclude the presence or addition of one or more other features, integers, steps, operations, elements, parts and / or groups. When used herein, the term "and / or" includes any and all combinations of the relevant listed items.
[0031] Embodiments of the application are described herein with reference to cross-sectional views that are schematic diagrams of ideal embodiments (and intermediate structures) of the application. Thus, variations from the shapes shown due to, for example, manufacturing techniques and / or tolerances can be expected. Therefore, embodiments of the application should not be limited to the specific shapes of the zones shown herein, but rather include shape deviations due to, for example, manufacturing, and the zones shown in the figures are schematic in nature, and their shapes are not intended to display the actual shapes of the zones of the device and are not intended to limit the scope of the application.
[0032] In one embodiment provided in this application, Figure 1 As shown, a low-power Bluetooth chip 100 based on SIP technology is provided, including: a substrate 5, a Bluetooth bare chip 1, a storage bare chip 2, a PMIC chip 3 and a LDO chip 4; specifically, the Bluetooth bare chip 1 is bonded to the substrate 5 by wire bonding; the storage bare chip 2 is stacked on the Bluetooth bare chip 1; the PMIC chip 3 is flip-chip connected to the substrate 5; the LDO chip 4 is welded to the substrate 5; wherein the Bluetooth bare chip 1, the PMIC chip 3 and the LDO chip 4 do not contact each other, that is, the storage bare chip 2, the PMIC chip 3 and the LDO chip 4 do not contact each other.
[0033] In one embodiment, the low-power Bluetooth chip 100 is a SIP chip (System In a Package) with a size of about 4 mm*4 mm, and the entire SIP chip is packaged in an LGA (land grid array) manner. The substrate 5 may be a PCB substrate.
[0034] In one embodiment, please continue to refer to Figure 1 The Bluetooth bare chip 1 and the memory bare chip 2 are interconnected by wire bonding. The electrical surfaces of the Bluetooth bare chip 1 and the memory bare chip 2 are both facing upwards and are placed on the substrate 5 in a stacked manner, which further saves substrate area and reduces chip preparation costs.
[0035] For details, please continue to refer to Figure 1 , the orthographic projection of the storage bare chip 2 falls on the Bluetooth bare chip 1 , that is, the area of the storage bare chip 2 is smaller than the area of the Bluetooth bare chip 1 .
[0036] Furthermore, the distance between the upper edge of the storage bare chip 2 and the upper edge of the Bluetooth bare chip 1 is 0.326mm-0.4mm, for example, the distance between the upper edge of the storage bare chip 2 and the upper edge of the Bluetooth bare chip 1 is 0.326mm, 0.35mm, 0.38mm or 0.4mm, etc.; the distance between the left edge of the storage bare chip 2 and the left edge of the Bluetooth bare chip 1 is 0.271mm-0.3mm, for example, the distance between the left edge of the storage bare chip 2 and the left edge of the Bluetooth bare chip 1 is 0.271mm, 0.28mm, 0.29mm or 0.3mm, etc.
[0037] As an example, the storage bare chip 2 may include but is not limited to a flash bare chip and the like.
[0038] In one embodiment, the PMIC chip 3 and the LDO chip 4 are both soldered to the substrate 5 in a flat manner.
[0039] As an example, the LDO chip is packaged in a WLCSP packaged finished chip, which is connected to the substrate 5 using an FC flip-chip welding process; the PMIC chip is packaged in a DFN package, which is directly soldered to the substrate 5 using solder paste, and then interconnected through the circuits of the substrate 5.
[0040] In one embodiment, the distance between the PMIC chip 3 and the LDO chip 4 is 0.255 mm-0.5 mm. For example, the distance between the PMIC chip 3 and the LDO chip 4 is 0.255 mm, 0.3 mm, 0.35 mm, 0.4 mm or 0.5 mm, etc.
[0041] In one embodiment, the low-power Bluetooth chip 100 further includes a plurality of resistors and capacitors (not shown in the figure), which are soldered to the substrate 5 through solder paste and then interconnected through the circuits of the substrate 5 .
[0042] It should be noted that the present application does not limit the distance between the Bluetooth bare chip 1 and the PMIC chip 3, nor does it limit the distance between the Bluetooth bare chip 1 and the LDO chip. In order to make the Bluetooth chip structure more compact, while meeting all functional requirements of the chip, the distances between each chip are reduced to further reduce the size of the low-power Bluetooth chip.
[0043] The above-mentioned Bluetooth bare chip 1, storage bare chip 2, PMIC chip 3 and LDO chip 4 can respectively realize the following functions:
[0044] (1) The SPI flash part of Bluetooth bare chip 1 is connected to storage bare chip 2 for data storage, and the related signals are only interconnected internally and are not led out to the outside of the low-power Bluetooth chip;
[0045] (2) The control system of the Bluetooth bare chip 1 is connected to the control pin of the PMIC chip 3 for status monitoring. The relevant signals are only interconnected internally and are not led out to the outside of the low-power Bluetooth chip;
[0046] (3) The control system of the Bluetooth bare chip 1 is connected to the control pin of the PMIC chip 3 to control the current. The relevant signals are not only interconnected internally, but also led out to the outside of the low-power Bluetooth chip for analog data acquisition;
[0047] (4) The power supply part of the PMIC chip 3 is connected to the power supply part of the LDO chip 4 for level conversion. The relevant signals are only interconnected internally and are not led out to the outside of the low-power Bluetooth chip;
[0048] (5) The power supply part of the LDO chip 4 is connected to the power supply part of the Bluetooth bare chip 1 for power supply. It is not only internally interconnected, but also led out to the outside of the low-power Bluetooth chip for powering other modules.
[0049] In the low-power Bluetooth chip based on SIP technology provided in the above embodiment, the low-power Bluetooth chip includes a substrate, a Bluetooth bare chip bonded to the substrate by wire bonding, a storage bare chip stacked on the Bluetooth bare chip, a PMIC chip flip-chip connected to the substrate, and an LDO chip welded to the substrate, wherein the Bluetooth bare chip. The PMIC chip and the LDO chip do not contact each other. Through the solution disclosed in the present invention, each part of the low-power Bluetooth chip can replace dozens of original materials, greatly reducing the number of chips, increasing the integration, and reducing the difficulty of chip processing, thereby improving the finished product yield of the smart ring.
[0050] In one embodiment provided in the present application, a smart ring is also provided, such as Figure 2 As shown, the smart ring 200 includes: a plurality of soft boards and a plurality of hard boards; each of the hard boards is provided with the low-power Bluetooth chip as described above; wherein the soft boards and the hard boards are spaced apart.
[0051] In one embodiment, the hard board is also provided with evenly distributed motion sensor chips, medical sensor chips and charging management chips.
[0052] Specifically, the motion sensor chip includes a three-axis accelerometer chip and several RC discrete devices. All the finished chips and the RC discrete devices are packaged as one through the SIP technology, and are internally integrated into the SIP chip through substrate interconnection. The medical sensor chip includes an optical sensor chip and several RC discrete devices. All the finished chips and the RC discrete devices are packaged as one through the SIP technology, and are internally integrated into the SIP chip through substrate interconnection. The charging management chip includes a charging management chip, several MOS tubes and several RC discrete devices. All the finished chips, MOS tubes and RC discrete devices are packaged as one through the SIP technology, and are internally integrated into the SIP chip through substrate interconnection.
[0053] In one embodiment, the width of each soft board is 2 mm-10 mm, for example, the width of the soft board is 2 mm, 4 mm, 6 mm, 8 mm, 9 mm or 10 mm; the width of each soft board can be the same or different, depending on the actual situation. The size of each hard board can be the same or different.
[0054] In this embodiment, the smart ring can also measure human heart rate, blood oxygen, sleep time, step counting, body temperature and gesture interaction recognition.
[0055] The above is only a specific implementation of the present disclosure, but the protection scope of the present disclosure is not limited thereto. Any changes or substitutions that can be easily thought of by a person skilled in the art within the technical scope disclosed in the present disclosure should be included in the protection scope of the present disclosure. Therefore, the protection scope of the present disclosure should be based on the protection scope of the claims.
Claims
1. A low-power Bluetooth chip based on SIP technology, characterized in that: include: substrate; A Bluetooth bare chip, which is wire-bonded to the substrate; A storage bare chip, stacked on the Bluetooth bare chip; A PMIC chip, flip-chip connected to the substrate; An LDO chip is welded to the substrate; The Bluetooth bare chip, the PMIC chip and the LDO chip do not contact each other.
2. The low-power Bluetooth chip based on SIP technology according to claim 1, characterized in that: The Bluetooth bare chip and the storage bare chip are interconnected by wire bonding.
3. The low-power Bluetooth chip based on SIP technology according to claim 1, characterized in that: The orthographic projection of the storage bare chip falls on the Bluetooth bare chip.
4. The low-power Bluetooth chip based on SIP technology according to claim 1, characterized in that: The PMIC chip and the LDO chip are both welded to the substrate in a flat manner.
5. The low-power Bluetooth chip based on SIP technology according to claim 1, characterized in that: The distance between the PMIC chip and the LDO chip is 0.255 mm-0.5 mm.
6. The low-power Bluetooth chip based on SIP technology according to claim 1, characterized in that: The low-power Bluetooth chip also includes a plurality of resistor and capacitor components, which are soldered to the substrate through solder paste.
7. The low-power Bluetooth chip based on SIP technology according to claim 1, characterized in that: The packaging form of the LDO chip is WLCSP packaging, and the packaging form of the PMIC chip is DFN packaging.
8. A smart ring, characterized in that: include: Several soft boards; A plurality of hard boards, each of which is provided with a low-power Bluetooth chip as described in any one of claims 1 to 7; wherein the soft board and the hard board are spaced apart.
9. The smart ring according to claim 8, characterized in that: The hard board is also provided with uniformly distributed motion sensor chips, medical sensor chips and charging management chips.
10. The smart ring according to claim 8, characterized in that: The width of each soft board is 2mm-10mm.