Efficient and parallel CABAC decoding method and device

A decoding method and technology of a decoding device are applied in the field of binary arithmetic decoding methods and devices, which can solve the problem of low parallelism and achieve the effect of ensuring real-time decoding.

Active Publication Date: 2008-07-02
BEIJING SPREADTRUM HI TECH COMM TECH CO LTD
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  • Claims
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Problems solved by technology

Most of them are based on serial bit processing, or not very parallel

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  • Efficient and parallel CABAC decoding method and device
  • Efficient and parallel CABAC decoding method and device
  • Efficient and parallel CABAC decoding method and device

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Embodiment Construction

[0017] The present invention will be further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0018] figure 1 The overall structure of a parallel arithmetic decoding system is described. As shown in the figure, the system is divided into header information decoding and data information decoding. The data information decoding module includes the four local context register modules shown in the figure, the intra prediction mode probability module, the motion vector probability module, and non-zero coefficients. Position probability modulus block and non-zero coefficient probability modulo block, and multi-bit arithmetic decoding block. Header information decoding and data information decoding share a set of context RAM. The header information decoding module uses a serial binary decoding method to perform binary decoding on the header information, and data information decoding uses a parallel binary multi-bit decoding method. ...

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Abstract

The invention relates to a method for decoding high efficient and concurrent CABAC (adaptive binary arithmetic coding based on context) and a device thereof. The method and the device is in particular used for realizing novel VLSI (Very Large Scale Integrated circuits) with video decoding standard H.264 as well as aims at the CABAC decoding process regulated in main grade. The invention includes a method for decoding variable arithmetic, a device for decoding the concurrent binary arithmetic as well as a device for generating and updating concurrent probability. The decoding device can guarantees real time decoding of a video image with high definition (1080i system 30Mbps) in the worst situation.

Description

technical field [0001] The invention relates to an adaptive arithmetic coding and decoding method and device in digital video decoding, in particular to a parallel binary arithmetic decoding method and device in a video decoding chip. Background technique [0002] H.264 is a new-generation video coding standard jointly developed by the International Telecommunications Union (ITU) and the International Organization for Standardization (ISO). Context-based adaptive binary arithmetic coding is adopted by H.264 as a core technology, but context-based adaptive binary arithmetic coding greatly improves coding efficiency, but also brings extremely high computational complexity. [0003] Arithmetic coding is an efficient digital coding method based on interval division, which is widely used in data compression fields such as digital images and digital videos. Usually, its data compression capability is significantly better than other variable-length coding methods such as Huffman c...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04N7/26H04N7/30H04N7/50H04N19/436
Inventor 张鹏
Owner BEIJING SPREADTRUM HI TECH COMM TECH CO LTD
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