Single-phase clock pass transistor adiabatic logic circuit, full adder and 5-2 compressor

Abstract

The invention discloses a single-phase clock pass transistor adiabatic logic circuit. The circuit is characterized by comprising a logic assignment circuit and an energy regeneration circuit, wherein the energy regeneration circuit consists of two pMOS transistors, namely a first pMOS transistor and a second pMOS transistor; the source of the first pMOS transistor and the source of the second pMOS transistor are connected in parallel with a power clock end; and the logic assignment circuit consists of four nMOS pass transistors, namely, a fifth nMOS pass transistor, a sixth nMOS pass transistor, a seventh nMOS pass transistor and an eighth nMOS pass transistor. The circuit has the advantages of combining the advantages of the single-phase power clock adiabatic logic (CAL) and complementary pass transistor logic (CPL), only one power clock CLK is needed, an auxiliary clock (CX and CX') alternately controls each stage of logic circuit, and the frequency of the circuit is half that of the power clock CLK; the single-phase power clock is used by a full adder on the basis, so that complexity of the clock circuit is reduced, the clock circuit is easier to generate, and the area of the circuit is greatly reduced; and a 5-2 compressor only consists of the full adder and has a simple and normative circuit structure and can compress more digits at one time.

Description

technical field [0001] The invention relates to a 5-2 compressor, in particular to a single-phase clock transmission tube adiabatic logic circuit, a full adder and a 5-2 compressor. Background technique [0002] At present, the VLSI design process has entered the nanometer stage. Regardless of the performance and cost of the chip itself or the electronic product market, power consumption has gradually become a key indicator of integrated circuit performance. Low-power integrated circuit design has become a hot and difficult point in current integrated circuit design. Traditional CMOS circuits are powered by a DC power supply, and its energy is converted from electrical energy to thermal energy in an irreversible form. Although power consumption can be reduced by reducing power supply voltage, node capacitance, and switch redundancy jumps, the power consumption savings are limited. . Energy recovery circuit, also known as adiabatic circuit, is a new low-power technology tha...

AI Technical Summary

Problems solved by technology

These circuits have very good low power consumption characteristics, but these circuits require multi-phase AC power clock

The multi-phase AC power clock generation circuit needs to generate multiple sinusoidal power clocks with fixed phase difference, the circuit structure is complex, which increases the power consumption of the circuit

In addition, the adiabatic circuit using multi-phase AC power clock needs to insert many buffers in the circuit to achieve correct pipeline operation, which undoubtedly increases the power consumption of the circuit, and the circuit area will also increase accordingly.

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