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Arithmetic processing device and method for controlling the arithmetic processing device

A technology of an arithmetic processing device and a control method, which is applied in the fields of electrical digital data processing, computing, instruments, etc., can solve problems such as the reduction of memory throughput, and achieve the effect of improving throughput and reducing memory access.

Active Publication Date: 2016-08-31
FUJITSU LTD
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

The write-back of the directory information in the directory cache at the time of replacement is the write-back of the directory information that should be C (consistent), so it becomes an unnecessary memory access and causes a decrease in memory throughput.

Method used

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  • Arithmetic processing device and method for controlling the arithmetic processing device
  • Arithmetic processing device and method for controlling the arithmetic processing device
  • Arithmetic processing device and method for controlling the arithmetic processing device

Examples

Experimental program
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Embodiment Construction

[0027] In this embodiment, when directory cache failure occurs and the directory information of the memory directory is registered in the directory cache, L flag information indicating whether the directory information of the memory directory is L (local) is registered in the directory cache as additional information. .

[0028] Also, when the directory information of the directory cache is updated to L (local), if the L flag information is "1" (when the directory information of the memory directory is L (local)), the inconsistency information of the directory cache is Changed to C (consistent).

[0029] According to the above, it can be known whether the directory information of the storage directory corresponding to each item of the directory cache is L (local), so even if the inconsistency information of the directory cache is D (inconsistent), the directory information of the directory cache can be compared with the memory When both of the directory information of the dir...

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Abstract

A processor includes a directory cache provided with a data cache, a memory directory to hold directory information, to hold dirty information indicating if held directory information is the same as that held in the memory directory, and local information indicating that the directory information of the memory directory is not held in a data cache of a different processor when the directory information from the memory directory is registered, and makes a setting such that the directory information of the memory directory is the same as directory information held in a data cache of a different processor as dirty information of the directory cache when the directory information of the directory cache and the local information of the directory cache indicate that the directory information of the memory directory is not held in the data cache of the different processor.

Description

technical field [0001] The present invention relates to an arithmetic processing device and a control method of the arithmetic processing device. Background technique [0002] figure 1 It is a block diagram of a shared-memory computer as an information processing device provided as a node of a directory-based arithmetic processing device. [0003] The plurality of nodes 10 - 1 to 10 - 4 are connected to each other through the interconnection network 11 . CPU (Central Processing Unit: central processing unit) cores 12 - 1 to 12 - n are provided in each of the nodes 10 - 1 to 10 - 4 as a computing unit. In this way, a configuration in which a plurality of CPU cores are installed in one node is called a multi-core configuration. Each CPU core 12 - 1 to 12 - n is connected to a data cache 16 via a cache controller 13 . In addition, the cache controller 13 is also connected to the directory cache 14 and the memory controller 15 . The cache controller 13 controls the CPU core...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): G06F12/0817G06F12/0895
CPCG06F12/0895G06F12/0817
Inventor 本藤干雄
Owner FUJITSU LTD