Sharing on-chip cache dividing device

Abstract

The invention discloses a sharing on-chip cache dividing device which comprises an on-chip cache module, a plurality of reconfigurable arrays, a plurality of first monitoring modules, a plurality of second monitoring modules and a dividing module. The plurality of first monitoring modules are used for tracking cache use ratio information of execution application programs on the plurality of reconfigurable arrays. The plurality of second monitoring modules are used for monitoring overlapping data amount among the plurality of reconfigurable arrays. The dividing module is used for determining corresponding shared cache channel number of each reconfigurable array according to the cache use ratio information and the overlapping data amount among the plurality of reconfigurable arrays. The dividing device solves the problem that the cache use ratio is reduced due to the overlapping data among the plurality of reconfigurable arrays, is favorable for reducing the total cache loss, improves cache use rate, and is simple in structure and convenient to operate.

Description

technical field [0001] The invention relates to the field of dynamic reconfigurable technology, in particular to a shared on-chip cache division device. Background technique [0002] One of the current challenges facing computing systems consisting of multiple reconfigurable arrays is the growing gap between increasing memory bandwidth requirements and limited off-chip memory access speeds. And on-chip cache has been used as a very effective method to reduce the bandwidth requirement of off-chip memory. Such as figure 1 As shown, the figure shows a general architecture of multiple reconfigurable arrays sharing on-chip cache, which is similar to the chip multiprocessor (chip multiprocessor) architecture, in which each reconfigurable array is equivalent to a processing device. Among them, one of the keys to achieve high performance through shared on-chip cache is to effectively manage the shared cache, thereby reducing the number of accesses to off-chip memory. The on-chip...

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Problems solved by technology

[0005] 1. The existing shared cache partitioning method independently monitors the resource utilization of each reconfigurable array to the shared cache without distinguishing overlapping data between reconfigurable arrays

[0006] 2. For overlapping data, the existing shared cache partitioning method will repeatedly collect the cache utilization information of overlapping data for each reconfigurable array using overlapping data

[0007] 3. When there is data overlap, the existing shared cache partitioning method is equivalent to increasing the total data volume of the application, which will reduce the utilization rate of the shared cache and lead to a decline in the overall performance of the system

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