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A hardware circuit of a high-speed real-time image processing system

A real-time image and processing system technology, which is applied to TV system components, image communication, color TV components, etc., can solve problems such as not being able to meet high-speed processing

Active Publication Date: 2020-02-07
BEIJING INST OF COMP TECH & APPL
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

At present, the image processing circuit of the conventional Camera Link interface can no longer meet the requirements of high-speed processing

Method used

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  • A hardware circuit of a high-speed real-time image processing system
  • A hardware circuit of a high-speed real-time image processing system
  • A hardware circuit of a high-speed real-time image processing system

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Embodiment Construction

[0022] In order to make the purpose, content, and advantages of the present invention clearer, the specific implementation manners of the present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments.

[0023] figure 1 Shown is a block diagram of a high-speed real-time image processing system of the present invention, figure 2 Shown is a schematic diagram of a hardware circuit of a high-speed real-time image processing system. The high-speed real-time image processing system includes: a main control processing circuit 1 , an image decoding circuit 2 , a data storage circuit 3 , an analog display circuit 4 and a serial port communication circuit 5 . Wherein the main control processing circuit 1 is realized by two DSPs 12 and 13 of FPGA 11 . The image decoding circuit 2 uses 5 dedicated image decoding chips together with capacitor DC blocking filter and resistor termination to form a video decoding chipset 21 , and co...

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Abstract

The invention discloses a high-speed real-time image processing system, which includes: a main control processing circuit, an image decoding circuit, a data storage circuit, an analog display circuit and a serial port communication circuit; wherein the main control processing circuit includes: using FPGA and two DSPs, The FPGA is used to coordinate and control the work of each circuit and the preprocessing of image data, and the two DSPs are used to run the image algorithm; the image decoding circuit is used to decode the image information of the external camera and send it to the FPGA; the data storage circuit is used to perform Data storage of FPGA11 and two DSPs; analog display circuit, used to output and display the video signal of FPGA; serial port communication circuit, used for serial port communication between FPGA and the outside; FPGA11 receives image data after activating the camera, and the control of FPGA Arbitration sets the highest priority for the storage of image decoding data to ensure that frames cannot be lost; the interface of the DSP chip is set as the second priority, and the analog display circuit is set as the third priority; the line gap and frame gap of image storage , respond to the second and third priority read data requests.

Description

technical field [0001] The invention relates to a high-speed real-time image processing system circuit, which is a high frame frequency image processing circuit based on a Camera Link interface and a dual DSP+FPGA architecture. Background technique [0002] In modern warfare, image processing technology has greatly improved military combat capabilities, and plays a very important role in object recognition, target positioning, real-time tracking, rapid destruction, terrain detection, and intelligence acquisition. With the rapid development of science and technology and the rapid progress of information technology, people's requirements for the speed and quality of image processing are increasing. Industrial digital cameras using CCD devices as photosensitive devices are developing rapidly. At this stage, CCD devices are developing in the direction of high frame bandwidth viewing angle. As a result, the amount of data continues to increase, which is embodied in the improvemen...

Claims

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Application Information

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Patent Type & Authority Patents(China)
IPC IPC(8): H04N5/232H04N5/77H04N19/423
CPCH04N5/77H04N19/423H04N23/60
Inventor 石国帅刘广东邓超徐静雯宋峙峰刘璐杨徐川
Owner BEIJING INST OF COMP TECH & APPL