Wireless wakeup receiver for logarithmic power detector architecture based on bit sampling

A power detector and wireless receiver technology, applied in the field of Internet of Things, can solve the problems of low receiver dynamic range, slow fading interference, etc., and achieve the effect of low receiving sensitivity and fast power-on response speed

Inactive Publication Date: 2017-11-03
XIDIAN UNIV
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  • Abstract
  • Description
  • Claims
  • Application Information

AI Technical Summary

Problems solved by technology

However, the dynamic range of the receiver is not high, and it is susceptible to slow fading interference

Method used

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  • Wireless wakeup receiver for logarithmic power detector architecture based on bit sampling
  • Wireless wakeup receiver for logarithmic power detector architecture based on bit sampling
  • Wireless wakeup receiver for logarithmic power detector architecture based on bit sampling

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Embodiment Construction

[0024] In order to make the objects and advantages of the present invention clearer, the present invention will be further described in detail below in conjunction with the examples. It should be understood that the specific embodiments described here are only used to explain the present invention, not to limit the present invention.

[0025] Such as image 3 As shown, the embodiment of the present invention provides a wireless wake-up receiver based on a bit sampling logarithmic power detector architecture, including a wake-up wireless receiver with extremely low power consumption and a main wireless receiver for receiving data; in general state, the main wireless receiver of the receiving node is off, and the wake-up wireless receiver is on; when the sending node sends data, it first sends a request packet to the wake-up receiver; the wake-up receiver receives the request packet and wakes up the node microprocessor, and then the microprocessor starts the main wireless trans...

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Abstract

The invention discloses a wireless wakeup receiver for logarithmic power detector architecture based on bit sampling. The wireless wakeup receiver comprises a wakeup wireless receiver with ultra-low power consumption and a master wireless receiver for receiving data. In a general state, the master wireless receiver of a receiving node is in a switch-off state and the wakeup wireless receiver is in a switch-on state; when a sending node sends data, a request packet is sent to the wakeup receiver; the wakeup receiver receives the request packet and wakes up a microprocessor of the node; and the microprocessor starts a master wireless transceiver to communicate with the sending node. The architecture of the receiver is the power detector architecture. Compared with tunable radio frequency receiver architecture, the wireless wakeup receiver has the advantages that the lower receiving sensitivity is achieved under the same power consumption, so the communication distance is longer. Compared with the receiver with superheterodyne architecture, the wireless wakeup receiver has the advantages that the electrification response speed is faster due to the fact that no high frequency oscillator is employed, so the wireless wakeup receiver is more adaptive to the application of the bit sampling technology.

Description

technical field [0001] The invention relates to the field of the Internet of Things, in particular to a wireless wake-up receiver based on a logarithmic power detector architecture of bit sampling. Background technique [0002] Because the wireless wake-up receiver can provide ultra-low power consumption and fast communication function at the same time, it has attracted extensive attention from academia and industry, and many schemes of wireless wake-up receiver have been proposed. According to the idea of ​​reducing the power consumption of wireless receivers, the existing wireless wake-up receivers can be divided into two categories: 1) wake-up receivers that reduce power consumption at the expense of increasing receiving sensitivity, 2) reduce the transmission rate for Wake-up receiver with reduced power consumption [0003] 1) A wake-up receiver that reduces power consumption at the expense of increased receiver sensitivity [0004] In order to reduce the power consump...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): H04B1/00H04B1/08H04W52/26
CPCH04B1/0007H04B1/08H04W52/267
Inventor 马涛
Owner XIDIAN UNIV
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