Method and a device for accessing a cache

A cache and buffer area technology, applied in the field of information processing, can solve the problems of low data communication efficiency and concurrent access cannot be performed simultaneously, and achieve the effect of improving data communication efficiency

Active Publication Date: 2019-04-19
NEUSOFT CORP
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  • Summary
  • Abstract
  • Description
  • Claims
  • Application Information

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Problems solved by technology

Although this can avoid access conflicts between different processes on the same buffer, it will cause other accesses to the buffer while the buffer is being accessed must wait for the ongoing access of the buffer to end, and also That is to say, the concurrent accesses initiated by different processes to the same buffer cannot be carried out at the same time, therefore, the data communication efficiency between processes is not high

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  • Method and a device for accessing a cache

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Embodiment Construction

[0046] In order to enable those skilled in the art to better understand the solutions of the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only It is a part of embodiments of the present invention, but not all embodiments. Based on the embodiments of the present invention, all other embodiments obtained by persons of ordinary skill in the art without making creative efforts belong to the protection scope of the present invention.

[0047]At present, when the shared buffer area implements data communication between processes, in order to avoid access conflicts between the process that provides data to the buffer area and the process that reads data from the buffer area, resulting in data communication errors, usually in the process of Buffers accessed by the process are lock...

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Abstract

The invention discloses a method and a device for accessing a cache. The method comprises the following steps of dividing a cache region of the first process for providing data to the second process into a plurality of cache blocks, when a target process initiates an access request to the cache region; selecting a target cache block from a plurality of cache blocks of the cache region, judging whether the target cache block is in a locked state or not; if the target cache block is in the locked state, executing the step 2; if so, the target cache region does not need to be switched to the non-locked state all the time; another cache block can be selected from a plurality of other cache blocks to serve as a target cache block; and returning to execute the step of judging whether the obtained target cache block is in the locked state or not until the target cache block which is not in the locked state currently is found from the cache blocks, so that a plurality of processes respectivelyaccess different cache blocks in the same cache region at the same time, and the inter-process data communication efficiency is improved.

Description

technical field [0001] The present invention relates to the technical field of information processing, in particular to a method and device for accessing a cache. Background technique [0002] At present, data communication between processes is usually realized through a shared buffer area. For example, when process A needs to provide data to process B, process A first stores the data in the buffer shared by both, and then process B retrieves the data from the buffer, thereby completing the data communication between the two. However, since the buffer is shared by process A and process B, their access to the buffer may conflict. For example, when process A stores data into the buffer area, process B retrieves data from the buffer area, thus causing an error in the data communication between the two processes. [0003] In order to avoid this access conflict, when a certain process accesses the buffer, the state of the buffer can be set to a locked state, so that the buffer ...

Claims

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Application Information

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Patent Type & Authority Applications(China)
IPC IPC(8): G06F9/54G06F12/14
CPCG06F9/544G06F12/1466
Inventor 于明光吴擒龙
Owner NEUSOFT CORP
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