A low interface thermal resistance diamond-based wafer and low temperature bonding method thereof

Abstract

The present invention provides a low-interface thermal resistance diamond-based wafer and a low-temperature bonding method thereof, belonging to the technical field of diamond and gallium nitride bonding; the method comprises: S1, performing surface activation on diamond and semiconductor wafers respectively through plasma etching treatment; S2, then depositing nano-sized gradient layers respectively; S3, then inverting one of the wafers obtained in step S2 so that the gradient layers on the two wafers contact each other; S4, then bonding under bonding conditions; wherein the gradient layer has an initial layer, a transition layer, and an end layer in sequence, the initial layer is selected from at least one of Ti, Ta, Cr, Ni, W, and Mo, and the end layer is Ag; the thickness of the initial layer does not exceed 5nm, the thickness of the transition layer does not exceed 10nm, and the thickness of the end layer does not exceed 15nm. The present invention can have a low interfacial thermal resistance, high bonding strength, and low requirements for the bonding environment.

Description

Technical Field

[0001] The invention relates to the technical field of diamond and gallium nitride bonding, in particular to a low-interface thermal resistance diamond-based wafer and a low-temperature bonding method thereof. Background Art

[0002] Due to the self-heating effect of GaN-based power devices and the low thermal conductivity of the original substrate, the power output capacity is reduced, affecting the stability and reliability of the device, causing serious degradation of device performance. Diamond has ultra-high thermal conductivity and a very small thermal expansion coefficient, so diamond has become the preferred substrate material. However, the large lattice mismatch and the difference in thermal expansion coefficients between materials make high-quality integration of GaN and diamond quite difficult. Diamond-GaN bonding is a feasible method. Its principle is to combine two or more materials into a whole through van der Waals forces, molecular forces, or even atomic forces, thereby improving the integration of wafers. It is an indispensable and important link in the field of semiconductor manufacturing. The bonding of GaN and diamond is a parallel process. GaN layers and diamond substrates can be prepared separately. Low-temperature bonding technology can avoid the lattice mismatch and thermal expansion coefficient differences caused by high-temperature growth of GaN, while avoiding the problem of low thermal conductivity of the nucleation layer. Metal bonding is a promising technology. It deposits nanocrystalline metal films on two wafers to be bonded, then brings the wafer surfaces into contact with each other, applies a certain temperature and pressure, promotes the diffusion of metal atoms and the growth of grains, and forms metal bonds between metal atoms at the bonding interface. Metal bonding can ensure a high bonding strength at the bonding interface, and the thermal conductivity of metal materials is relatively high, which is conducive to reducing the thermal resistance of the interface. Metal bonding can achieve low-temperature bonding, avoiding damage to the device under high temperature conditions.

[0003] Generally speaking, bonding diamond and GaN through a metal intermediate layer needs to meet the requirements of high bonding strength, low interface thermal resistance and low bonding temperature. For example, a diamond-based gallium nitride high electron mobility transistor heterogeneous integration method reported in patent CN 109860049 A uses W and Au as intermediate layers, has high bonding strength and good heat dissipation effect, simple process and does not require harsh conditions such as ultra-high vacuum, high flatness and high temperature annealing, and has been successfully applied to the preparation of diamond-based GaN HEMT.

[0004] However, the above-mentioned traditional metal bonding method has a multi-layer structure of the bonding middle layer, which may produce more interface thermal resistance; in addition, it is difficult to ensure the bonding strength when Au bonding is performed at room temperature, and the wafer bonding efficiency is significantly affected by the substrate processing state. Therefore, it is of great significance to develop a bonding system that minimizes the bonding interface and has low requirements for the bonding environment for semiconductor material integration processes suitable for heat dissipation systems. Summary of the invention

[0005] The technical problem to be solved by the present invention is to provide a low interface thermal resistance diamond-based wafer and a low temperature bonding method thereof, which can have a low interface thermal resistance, high bonding strength and low bonding environment requirements. The method of the present invention is particularly suitable for the application requirements of some temperature-sensitive devices in the field of semiconductor material integration. Since the bonding temperature of this method is low and the thermal conductivity of the bonding interface is high, it is suitable for integrating semiconductor materials with large differences in thermal expansion coefficients.

[0006] In order to solve the above technical problems, the present invention provides the following technical solutions:

[0007] In a first aspect, a low temperature bonding method for diamond-based wafers with low interface thermal resistance is provided, comprising the following steps:

[0008] S1, performing surface activation on diamond and semiconductor wafers by plasma etching respectively;

[0009] S2, depositing nanometer-sized gradient layers on the surfaces of the diamond and semiconductor wafer activated in step S1;

[0010] S3, then inverting one of the wafers obtained in step S2 so that the gradient layers on the two wafers are in contact with each other;

[0011] S4. Then, bonding is performed under bonding conditions.

[0012] Diamond is a material with ultra-high thermal conductivity. Using diamond as a heat dissipation substrate for power devices such as GaN can effectively improve the heat dissipation capacity of the device near the junction area, thereby reducing the peak temperature and greatly improving the maximum output power and reliability of the device.

[0013] Preferably, the thickness of the diamond is 400-600 μm, and the thickness of the semiconductor wafer is 1-3 μm. This preferred solution is more suitable for matching with a specific gradient layer.

[0014] The semiconductor wafer may include or not include a substrate, and may be, for example, a semiconductor wafer or a silicon-based semiconductor wafer.

[0015] The gradient layer has an initial layer, a transition layer, and an end layer in sequence, the initial layer is selected from at least one of Ti, Ta, Cr, Ni, W, and Mo, and the end layer is Ag. It can be understood that the transition layer is a layer with a gradual change in the composition of the initial layer element and the end layer Ag.

[0016] The thickness of the gradient layer of the present invention is below 30nm.

[0017] Preferably, the thickness of the initial layer does not exceed 5 nm, the thickness of the transition layer does not exceed 10 nm, and the thickness of the final layer does not exceed 15 nm. Under this preferred solution, the influence of the intermediate layer on the performance of the semiconductor material after bonding can be minimized.

[0018] Preferably, the diamond and semiconductor wafer in step S1 both meet the following conditions: surface flatness < 3 μm, roughness Rq ≤ 2 nm. In this preferred embodiment, the semiconductor substrate material is more suitable for the deposition of the following specific gradient layer, thereby being more conducive to improving the interface bonding strength.

[0019] Preferably, the semiconductor wafer is selected from one or more semiconductor materials of GaN, Si, Ge, GaAs, InP, GaO, SiC, and AlN.

[0020] The plasma etching process in step S1 may be ICP, RIE or other low temperature plasma processing methods. Preferably, the plasma etching process in step S1 is specifically to bombard the surface of the bonded wafer with ICP Ar plasma.

[0021] Preferably, the surface activation conditions in step S1 include: -3 Pa or less, the RF power is 40-60W, the processing atmosphere is an oxygen-free protective atmosphere, and the processing time is 40-80s. This preferred solution is more conducive to removing the adsorbed gas and natural oxide layer, removing the oxygen atom adsorption on the bonding surface, while not significantly changing the surface roughness of the bonding surface, increasing the bonding strength and bonding efficiency, cleaning the wafer surface and increasing the activation energy, and making the surface of the wafer have suitable flatness and roughness, which is conducive to the bonding of the specific gradient layer. The plasma treatment time should not be too long, and the energy should not be too high, otherwise the surface roughness will increase.

[0022] The oxygen-free protective atmosphere may be, for example, a non-O atmosphere such as Ar, N2, and H2.

[0023] Among them, preferably, the low-temperature bonding method also includes a wafer surface cleaning step before performing step S1: first ultrasonic cleaning with acetone or isopropanol for 10-30 minutes, then ultrasonic cleaning with anhydrous ethanol for 10-20 minutes, and finally ultrasonic cleaning with deionized water for 10-20 minutes. After cleaning, take out and blow dry with protective gas.

[0024] The protective gas includes but is not limited to nitrogen and inert gas.

[0025] In some specific embodiments, the cleaning step specifically includes: first ultrasonic cleaning with acetone or isopropanol for 15 minutes, then ultrasonic cleaning with anhydrous ethanol for 10 minutes, and finally ultrasonic cleaning with deionized water for 10 minutes. After cleaning, take out and blow dry with nitrogen for later use.

[0026] The deposition in step S2 may be sputtering or evaporation. Preferably, the deposition in step S2 is performed by physical vapor deposition.

[0027] The deposition is preferably performed by multi-target reactive magnetron sputtering to prepare the gradient layer.

[0028] In the present invention, since the gradient layer including the transition layer is provided, the transition layer has no obvious interface and the stress is gradually released, the bonding force can be significantly improved and the stress mismatch between the film layer and the substrate can be reduced.

[0029] The deposition process must meet the conditions of low temperature, low power and short time to ensure that the deposited gradient layer is of suitable nanometer size. Preferably, the deposition process in step S2 includes:

[0030] At a vacuum of 5×10 -4 Pa, firstly pre-sputtering is performed, the sputtering power is 90-110W, the Ar gas flow rate is 40-60sccm, and the pre-sputtering time is 10-20min;

[0031] Then, the initial layer deposition process was started, the argon gas flow rate was adjusted to 20-30 sccm, the sputtering power was adjusted to 90-110 W, the chamber pressure was 0.2-0.4 Pa, the deposition time was 30-50 s, and the initial layer deposition process was completed;

[0032] Then, the Ag target was turned on to start co-sputtering, and the Ag target power was gradually increased from 9-12W to 90-110W, and the initial layer target power was gradually reduced from 90-110W to 0W. The co-sputtering time was 50-70s to complete the deposition of the transition layer;

[0033] After the co-sputtering is completed, the end layer Ag is deposited, the chamber pressure and the argon gas flow rate are kept unchanged, and sputtering is continued for 80-200s at 90-110W to complete the deposition of the end layer. Under this preferred scheme, it is more conducive to making each layer uniformly deposited on the entire wafer surface, and a deposited layer with a suitable grain size and a suitable thickness can be obtained, which is more conducive to achieving low-temperature bonding.

[0034] In the above deposition method, the precipitated nano-Ag layer has a grain size of less than 10 nm, which is more conducive to low-temperature bonding.

[0035] Step S3 of the present invention is used for lamination, and the specific operation may be: the sides of the wafers coated with the metal layer are bonded face to face, placed in a template corresponding to the wafer size, and then the template is placed in a bonding device for fixing, and the upper and lower wafers are aligned using the template.

[0036] Preferably, the bonding conditions in step S4 include: the degree of vacuum of the environment is 1×10 -3 Pa, gradually apply pressure to the top wafer to reach 0.1-0.3MPa within 30s; then heat the upper and lower wafers at the same time, the heating temperature is 200-250℃, and keep it for 10-20min.

[0037] After the bonding of the present invention is completed, the interface of the middle layer is reduced, forming a gradient transition, wherein the concentration of the element is higher closer to the initial layer of the wafer, and the concentration of the Ag element is higher closer to the middle.

[0038] The specific bonding operation can be: after placing the wafer into the bonding equipment, design the parameters such as pressure, temperature and time according to the thickness of the gradient layer. Apply pressure on the top of the wafer. During bonding, the inside of the equipment is kept in a vacuum state, and the upper and lower wafers are heated at the same time. After the bonding is completed, the sample is naturally cooled with the equipment. After the sample is taken out, the bonding is completed, forming a low-temperature metal bonding of the semiconductor material.

[0039] Preferably, the low temperature bonding method further comprises performing pre-bonding before the bonding in step S4:

[0040] Under room temperature and atmospheric conditions, a pressure of 0.1-0.2MPa is applied to the top wafer and maintained for 8-12 minutes. The pressure gradually drops to 0 and the pre-bonding is completed.

[0041] The method of the present invention can be extended to the bonding of various semiconductor materials, such as Si / Si bonding, Si / diamond bonding, Si / GaN bonding, etc., and the conditions can be optimized according to the specific materials. The period and thickness of the gradient layer can be adjusted according to the stress and lattice mismatch to form a gradient transition of structure and stress.

[0042] In a second aspect, a diamond-based wafer with low interface thermal resistance produced by the low-temperature bonding method described in the first aspect is provided.

[0043] The bonding strength of the diamond-based wafer of the present invention is above 5MPa, and the interface bonding rate is greater than 95%.

[0044] The beneficial effects of the above technical solution of the present invention are as follows:

[0045] 1. The gradient layer of the specific thickness mentioned above is used as the middle layer, which has good thermal conductivity and can play the role of a thermal conductive layer. The thermal conductivity of Ag in the metal is very high (429W / m·K), which can realize Si / diamond, GaN / diamond and other integrated processes suitable for heat dissipation systems.

[0046] 2. A gradient layer with a transition layer of appropriate thickness is used as a transition between the surface layer and the bottom metal, which reduces the introduction of multiple interfaces and prevents interface scattering during phonon / electron coupling transmission. At the same time, stress gradient changes are achieved, significantly improving the bonding strength and interface thermal conductivity.

[0047] 3. The gradient layer used for bonding contains nano-Ag. The melting point of the deposited nano-Ag with a suitable thickness is very low, which can achieve low-temperature bonding from room temperature to 250°C. The low-temperature bonding method can minimize the mismatch of thermal expansion coefficients between different materials, avoid defects caused by high-temperature processes, and increase in stress causing wafer warping and other problems.

[0048] 4. The process is simple, the conditions are easy to obtain, and no subsequent high temperature annealing or ultra-high vacuum environment is required. The requirements for the surface roughness of the bonded wafer are low, and the surface does not require complex treatment.

[0049] 5. Compared with Au-Au bonding, this method has lower cost and higher interface thermal conductivity. BRIEF DESCRIPTION OF THE DRAWINGS

[0050] Figure 1 The original semiconductor substrate material with a smooth surface is shown;

[0051] Figure 2 It shows that Ti is plated on the smooth original substrate surface;

[0052] Figure 3 It shows that a gradient layer is plated on the Ti surface;

[0053] Figure 4 It shows that Ag is plated on the surface of the gradient layer;

[0054] Figure 5 Shows the semiconductor material after bonding is completed. DETAILED DESCRIPTION

[0055] In order to make the technical problems, technical solutions and advantages to be solved by the present invention more clear, a detailed description will be given below with reference to the accompanying drawings and specific embodiments.

[0056] Example 1

[0057] 1) Silicon-based gallium nitride and single crystal diamond are used as the original substrate wafer, the original substrate size is 5×5mm, the diamond thickness is 500μm, the surface flatness is less than 3μm, and the surface roughness Rq=0.4nm. Silicon-based gallium nitride is prepared on a silicon substrate using metal organic chemical vapor deposition (MOCVD) technology, wherein the gallium nitride layer thickness is 2μm, the surface flatness is less than 3μm, and the surface roughness Rq=0.8nm. First, the wafer surface is cleaned by ultrasonic cleaning with isopropanol for 15 minutes, then transferred to anhydrous ethanol for ultrasonic cleaning for 10 minutes, and finally transferred to deionized water for ultrasonic cleaning for 10 minutes, and blown dry with nitrogen for use. Figure 1 As shown;

[0058] 2) ICP argon plasma treatment. The cleaned wafer is placed in the ICP equipment and the equipment is evacuated to 3×10 -3 Pa below, RF power is 50W, treatment atmosphere is argon, treatment time is 50s;

[0059] 3) Use magnetron sputtering to deposit Ti (5nm), Ti / Ag (10nm), and Ag (10nm) thin films on the surface of diamond and GaN, respectively. Place two wafers in the equipment for sputtering; evacuate the equipment to 5×10 -4 Pa or less; firstly, pre-sputter the target, set the sputtering power to 100W, the Ar gas flow rate to 50sccm, and the pre-sputtering time to 15min; firstly, deposit Ti, adjust the Ar gas flow rate to 23.5sccm, the sputtering power to 100W, the chamber pressure to 0.3Pa, and the deposition time to 40s to complete the Ti plating process, such as Figure 2 As shown; at this time, the Ag target is turned on to start co-sputtering, and the Ag target power is gradually increased from 10W to 100W, and the Ti target power is gradually reduced from 100W to 0W. The co-sputtering time is 60s, and the transition film deposition is completed, as shown Figure 3 As shown; after the co-sputtering is completed, Ag is deposited, the above parameters remain unchanged, and the sputtering is performed at 100W for 100s to complete the deposition of the Ag film, as shown Figure 4 As shown;

[0060] 4) Pre-bonding: put the sides of the wafers with thin films deposited face to face, with diamond at the bottom and GaN at the top, and put them into the bonding equipment. Fix the wafers with the mold and align the upper and lower wafers. Then fix the mold in the equipment. Apply 0.1MPa pressure to the top of the wafer at room temperature and keep it for 10 minutes. The pressure gradually drops to 0 and the pre-bonding is completed.

[0061] 5) Bonding. After pre-bonding, the equipment is evacuated to 1×10 -3Pa or less; gradually apply pressure to the top wafer, reaching 0.15MPa within 30s; heat the upper and lower wafers simultaneously, the temperature is 250℃; maintain the above temperature and pressure conditions for 15 minutes;

[0062] 6) After bonding is completed, stop heating and gradually reduce the pressure. The sample is taken out after cooling to 80°C with the equipment. A gradient transition is formed in the middle layer, such as Figure 5 shown.

[0063] The bonding strength of the obtained diamond-based semiconductor wafer is 6 MPa, and the bonding rate is 97%.

[0064] Example 2

[0065] 1) Silicon and polycrystalline diamond are used as the original substrate wafers, the original substrate size is 10×10mm, the diamond thickness is 500μm, the surface flatness is less than 3μm, and the surface roughness Rq=0.8nm. The silicon wafer thickness is 625μm, the surface flatness is less than 3μm, and the surface roughness Rq=0.9nm. First, the wafer surface is cleaned by ultrasonic cleaning with isopropanol for 15 minutes, then transferred to anhydrous ethanol for ultrasonic cleaning for 10 minutes, and finally transferred to deionized water for ultrasonic cleaning for 10 minutes, and blown dry with nitrogen for use;

[0066] 2) ICP argon plasma treatment. The cleaned wafer is placed in the ICP equipment and the equipment is evacuated to 3×10 -3 Pa below, RF power is 50W, treatment atmosphere is argon, treatment time is 50s;

[0067] 3) Use magnetron sputtering to deposit Ti (5nm), Ti / Ag (10nm), and Ag (15nm) thin films on the surface of diamond and silicon wafers respectively. Place the two wafers in the equipment for sputtering; evacuate the equipment to 5×10 -4 Pa or less; firstly, pre-sputter the target material, set the sputtering power to 100W, the Ar gas flow rate to 50sccm, and the pre-sputtering time to 15min; firstly, deposit Ti, adjust the Ar gas flow rate to 23.5sccm, the sputtering power to 100W, the chamber pressure to 0.3Pa, and the deposition time to 40s to complete the Ti plating process; at this time, open the Ag target and start co-sputtering, gradually increase the Ag target power from 10W to 100W, and gradually reduce the Ti target power from 100W to 0W, and the co-sputtering time is 60s to complete the transition film deposition; after the co-sputtering is completed, deposit Ag, keep the above parameters unchanged, and sputter for 140s at 100W to complete the deposition of the Ag thin film;

[0068] 4) Pre-bonding: put the sides of the wafers with thin films deposited face to face together and put them into the bonding equipment, fix the wafers with the mold and align the upper and lower wafers, and then fix the mold in the equipment; apply 0.15MPa pressure to the top of the wafer under room temperature and atmospheric conditions, keep it for 10 minutes, and then the pressure gradually drops to 0, and the pre-bonding is completed;

[0069] 5) Bonding. After pre-bonding, the equipment is evacuated to 1×10 -3 Pa or less; gradually apply pressure to the top wafer, reaching 0.2MPa within 30s; heat the upper and lower wafers simultaneously, the temperature is 250℃; maintain the above temperature and pressure conditions for 15 minutes;

[0070] 6) After bonding is completed, stop heating and gradually reduce the pressure. The sample is taken out after cooling to 80°C with the equipment, and a gradient transition is formed in the middle layer.

[0071] The bonding strength of the obtained composite wafer is 5.2 MPa, and the bonding rate is 97%.

[0072] Comparative Example 1

[0073] The process was carried out in accordance with Example 1, except that the deposition conditions were adjusted to deposit Ti / Ag (50 nm) and the other layers remained unchanged; the co-deposition conditions were: gradually increasing the Ag target power from 10 W to 100 W, and gradually decreasing the Ti target power from 100 W to 0 W, and the co-sputtering time was 540 s.

[0074] The bonding strength of the obtained composite wafer is 4.7 MPa, and the bonding rate is 93%.

[0075] Comparative Example 2

[0076] The process was carried out in accordance with Example 1, except that Ni was used as the initial layer with a thickness of 5 nm, the transition layer was Ni / Ag (50 nm), and the other layers remained unchanged; the deposition conditions were the same as those in Comparative Example 1.

[0077] The bonding strength of the obtained composite wafer is 2.8 MPa, and the bonding rate is 88%.

[0078] The above is a preferred embodiment of the present invention. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present invention. These improvements and modifications should also be regarded as the scope of protection of the present invention.

Claims

1. A low temperature bonding method for diamond-based wafers with low interface thermal resistance, characterized in that: The following steps are involved: S1, performing surface activation on diamond and semiconductor wafers by plasma etching respectively; The surface activation conditions in step S1 include: -3 Pa or less, RF power is 40-60W, treatment atmosphere is oxygen-free protective atmosphere, treatment time is 40-80s; S2, depositing nanometer-sized gradient layers on the surfaces of the diamond and semiconductor wafer activated in step S1; The deposition process in step S2 includes: At a vacuum of 5×10 -4 Pa, firstly pre-sputtering is performed, the sputtering power is 90-110W, the Ar gas flow rate is 40-60sccm, and the pre-sputtering time is 10-20min; Then, the initial layer deposition process was started, the argon gas flow rate was adjusted to 20-30 sccm, the sputtering power was adjusted to 90-110 W, the chamber pressure was 0.2-0.4 Pa, the deposition time was 30-50 s, and the initial layer deposition process was completed; Then, the Ag target was turned on to start co-sputtering, and the Ag target power was gradually increased from 9-12W to 90-110W, and the initial layer target power was gradually reduced from 90-110W to 0W. The co-sputtering time was 50-70s to complete the deposition of the transition layer; After the co-sputtering is completed, the end layer Ag is deposited, the chamber pressure and the argon gas flow rate are kept unchanged, and sputtering is continued at 90-110W for 80-200s to complete the deposition of the end layer; S3, then inverting one of the wafers obtained in step S2 so that the gradient layers on the two wafers are in contact with each other; S4, then bonding under bonding conditions; The gradient layer comprises an initial layer, a transition layer and an end layer in sequence, the initial layer is selected from at least one of Ti, Ta, Cr, Ni, W and Mo, and the end layer is Ag; the thickness of the initial layer does not exceed 5 nm, the thickness of the transition layer does not exceed 10 nm, and the thickness of the end layer does not exceed 15 nm; The bonding conditions in step S4 include: the ambient vacuum degree is 1×10 -3 Pa, gradually apply pressure to the top wafer to reach 0.1-0.3MPa within 30s; then heat the upper and lower wafers at the same time, the heating temperature is 200-250℃, and maintain for 10-20min.

2. The low temperature bonding method according to claim 1, characterized in that: The diamond and semiconductor wafer in step S1 both meet the following conditions: surface flatness < 3 μm, roughness Rq ≤ 2 nm.

3. The low temperature bonding method according to claim 1, characterized in that: The plasma etching process in step S1 specifically involves bombarding the surface of the bonded wafer with ICPAr plasma.

4. The low temperature bonding method according to claim 1, characterized in that: The low temperature bonding method further comprises a wafer surface cleaning step before performing step S1: First, use acetone or isopropanol for ultrasonic cleaning for 10-30 minutes, then use anhydrous ethanol for ultrasonic cleaning for 10-20 minutes, and finally use deionized water for ultrasonic cleaning for 10-20 minutes. After cleaning, take out and blow dry with protective gas.

5. The low temperature bonding method according to claim 1, characterized in that: The semiconductor wafer is selected from one or more semiconductor materials of GaN, Si, Ge, GaAs, InP, GaO, SiC, and AlN.

6. The low temperature bonding method according to claim 1, characterized in that: The low temperature bonding method further comprises performing pre-bonding before the bonding in step S4: Under room temperature and atmospheric conditions, a pressure of 0.1-0.2MPa is applied to the top wafer and maintained for 8-12 minutes. The pressure gradually drops to 0 and the pre-bonding is completed.

7. A diamond-based wafer with low interface thermal resistance produced by the low temperature bonding method according to any one of claims 1 to 6.

8. The diamond-based wafer according to claim 7, characterized in that The bonding strength of the diamond-based wafer is above 5 MPa, and the interface bonding rate is greater than 95%.

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