Solar cell and method for manufacturing the same

Abstract

The present application provides a solar cell and a method for preparing the same. The solar cell comprises: a silicon substrate, the silicon substrate comprises a first surface and a second surface arranged opposite to each other along its thickness direction; a phosphorus-doped polysilicon layer and a first passivation layer, the phosphorus-doped polysilicon layer and the first passivation layer are sequentially stacked and arranged on the first surface of the silicon substrate, the first passivation layer comprises a silicon oxynitride layer, the silicon oxynitride layer comprises amorphous silicon oxynitride and polycrystalline silicon oxynitride. The present application solves the blistering problem in the annealing and crystallization preparation process of the phosphorus-doped polysilicon layer, and has the characteristics of good passivation effect and high conversion efficiency.

Description

Technical Field

[0001] The present application relates to the technical field of photovoltaic devices, and in particular to a solar cell and a method for preparing the same. Background Art

[0002] In the process of preparing solar cells, plasma enhanced chemical vapor deposition (PECVD) is used to prepare an amorphous silicon layer, and then a polycrystalline silicon layer is prepared by annealing and crystallization. This method has a fast deposition rate and low deposition temperature, and can be directly doped in situ, which simplifies many processes and achieves significant cost reduction. However, the amorphous silicon film deposited by PECVD is easily affected by poor physical contact, and bubbling usually occurs during the annealing process, causing the polycrystalline silicon film to easily explode (commonly known as film explosion), resulting in a significant decrease in device performance. Summary of the invention

[0003] Based on this, an embodiment of the present application provides a solar cell and a method for manufacturing the same, so as to solve the blistering problem during the annealing and crystallization process of the phosphorus-doped polysilicon layer.

[0004] In a first aspect, the present application provides a solar cell, the solar cell comprising:

[0005] A silicon substrate, the silicon substrate comprising a first surface and a second surface arranged opposite to each other along a thickness direction thereof;

[0006] A phosphorus-doped polysilicon layer and a first passivation layer are sequentially stacked on the first surface of the silicon substrate, and the first passivation layer includes a silicon oxynitride layer, and the silicon oxynitride layer contains amorphous silicon oxynitride and polycrystalline silicon oxynitride.

[0007] In some embodiments, the silicon oxynitride layer has a thickness of 10 nm to 15 nm.

[0008] In some embodiments, the first passivation layer further includes a first silicon nitride layer, and the first silicon nitride layer is disposed on a surface of the silicon oxynitride layer that is away from the silicon substrate.

[0009] In some embodiments, the first silicon nitride layer contains polycrystalline silicon nitride and amorphous silicon nitride.

[0010] In some embodiments, the first silicon nitride layer has a thickness of 10 nm to 15 nm.

[0011] In some embodiments, the solar cell further includes a second passivation layer and a first electrode, and the second passivation layer and the first electrode are sequentially stacked on a surface of the first passivation layer in a direction away from the silicon substrate.

[0012] In some embodiments, the second passivation layer includes a first aluminum oxide layer and a first anti-reflection layer, and the first aluminum oxide layer and the first anti-reflection layer are sequentially stacked on a surface of the first passivation layer away from the silicon substrate in a direction away from the silicon substrate.

[0013] In some embodiments, the thickness of the first aluminum oxide layer is 4 nm to 5 nm.

[0014] In some embodiments, the thickness of the first anti-reflection layer is 60 nm to 90 nm.

[0015] In some embodiments, the solar cell further includes a P-type emitter layer, a third passivation layer, and a second electrode, and the P-type emitter layer, the third passivation layer, and the second electrode are sequentially stacked on the second surface of the solar cell in a direction away from the silicon substrate.

[0016] In some embodiments, the third passivation layer includes a second aluminum oxide layer and a second anti-reflection layer which are sequentially stacked in a direction away from the silicon substrate.

[0017] In some embodiments, the second aluminum oxide layer has a thickness of 10 nm to 15 nm.

[0018] In some embodiments, the second anti-reflection layer has a thickness of 10 nm to 15 nm.

[0019] In some embodiments, the solar cell is a TOPcon cell, a PERC cell, or an IBC cell.

[0020] In a second aspect, the present application provides a method for preparing a solar cell as described in the first aspect, the method comprising:

[0021] providing a silicon substrate;

[0022] forming a phosphorus-doped amorphous silicon layer and a passivation pre-layer in sequence on the first surface of the silicon substrate, wherein the passivation pre-layer comprises an amorphous silicon oxynitride layer;

[0023] The phosphorus-doped amorphous silicon layer and the amorphous silicon nitride oxide layer are annealed to form a phosphorus-doped polysilicon layer from the phosphorus-doped amorphous silicon layer, and the passivation pre-layer forms a first passivation layer, wherein the amorphous silicon nitride oxide layer forms a layer containing amorphous silicon nitride oxide and polycrystalline silicon nitride oxide.

[0024] In some embodiments, the annealing treatment is performed at a temperature of 880° C. to 920° C. for a time of 6000 s to 6500 s.

[0025] In some embodiments, before the annealing process, the method further includes: forming an amorphous silicon nitride layer on a surface of the amorphous silicon nitride oxide layer away from the silicon substrate;

[0026] After the annealing process is performed, the amorphous silicon nitride layer forms a first silicon nitride layer including amorphous silicon nitride and polycrystalline silicon nitride.

[0027] Optionally, it also includes:

[0028] After forming the first silicon nitride layer, a first aluminum oxide layer and a first anti-reflection layer are formed on a side of the first silicon nitride layer away from the silicon substrate to form a second passivation layer.

[0029] In some embodiments, the preparation method further comprises:

[0030] forming a P-type emitter layer on the second surface of the silicon substrate;

[0031] A second aluminum oxide layer and a second anti-reflection layer are formed on the surface of the P-type emitter layer away from the silicon substrate to form a third passivation layer.

[0032] In some embodiments, the phosphorus-doped amorphous silicon layer is formed by at least one of chemical vapor deposition and physical vapor deposition.

[0033] In some embodiments, the amorphous silicon oxynitride layer is formed by at least one of chemical vapor deposition and physical vapor deposition.

[0034] In some embodiments, the amorphous silicon oxynitride layer is formed by chemical vapor deposition, and the volume ratio of nitrogen source, oxygen source and silicon source used in the chemical vapor deposition method is (5-7):(2-3):1.

[0035] In some embodiments, the first anti-reflection layer and the second anti-reflection layer are formed by chemical vapor deposition, and the volume ratio of nitrogen source and silicon source used in the chemical vapor deposition method is (6-12):1.

[0036] Compared with the traditional technology, this application has at least the following beneficial effects:

[0037] The present application covers the phosphorus-doped polysilicon layer with a silicon oxynitride layer. During the annealing process, not only can the interface stress of the phosphorus-doped polysilicon layer be reduced, the defects caused by the interface stress be reduced, and the problems such as bubbles be avoided; but also the crystallization rate of the phosphorus-doped polysilicon can be increased through annealing. In addition, the silicon oxynitride layer of the present application contains polycrystalline silicon oxynitride, which can reduce parasitic absorption, increase current, reduce film defects, and increase film electron transmission. BRIEF DESCRIPTION OF THE DRAWINGS

[0038] Figure 1This is a schematic diagram of the structure of a solar cell provided in a specific embodiment of the present application.

[0039] Figure 2 A partial schematic diagram of the location of a phosphorus-doped polysilicon layer in a conventional solar cell provided in a specific embodiment of the present application.

[0040] Figure 3 A partial schematic diagram of the location of phosphorus-doped polysilicon in a solar cell provided in a specific embodiment of the present application.

[0041] Among them, 100 is a solar cell; 101 is a silicon substrate; 102 is a tunneling oxide layer; 103 is a phosphorus-doped polysilicon layer; 104 is a silicon oxynitride layer; 105 is a silicon nitride layer; 106 is a first aluminum oxide layer; 107 is a first anti-reflection layer; 108 is a first electrode; 109 is a P-type emitter layer; 110 is a second aluminum oxide layer; 111 is a second anti-reflection layer; 112 is a second electrode. DETAILED DESCRIPTION

[0042] Below in conjunction with the embodiments and examples, the present application is further described in detail. These embodiments and examples are only used to illustrate the present application and are not used to limit the scope of the present application. The purpose of providing these embodiments and examples is to make the understanding of the disclosure of the present application more thorough and comprehensive. It should also be understood that the present application can be implemented in many different forms, and is not limited to the embodiments and examples described herein. Those skilled in the art can make various changes or modifications without violating the connotation of the present application, and the equivalent form obtained also falls within the protection scope of the present application. In addition, in the description below, a large number of specific details are given in order to provide a more comprehensive understanding of the present application. It should be understood that the present application can be implemented without one or more of these details.

[0043] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0044] In this application, "optionally", "optional", and "optional" mean optional or dispensable, that is, any one of the two parallel schemes of "yes" or "no". If multiple "options" appear in a technical solution, unless otherwise specified and there is no contradiction or mutual restriction, each "optional" is independent.

[0045] In this application, the terms "first", "second", etc. in "the first aspect", "the second aspect", etc. are used only for descriptive purposes and cannot be understood as indicating or implying relative importance or quantity, nor can they be understood as implicitly indicating the importance or quantity of the indicated technical features. Moreover, "first", "second", etc. only serve the purpose of non-exhaustive enumeration and description, and it should be understood that they do not constitute a closed limitation on quantity.

[0046] In the present application, the technical features described in an open manner include closed technical solutions composed of the listed features, and also include open technical solutions containing the listed features.

[0047] In the present application, when it comes to a numerical interval (i.e., a numerical range), unless otherwise specified, the distribution of the optional numerical values ​​in the numerical interval is considered to be continuous, and includes the two numerical endpoints (i.e., the minimum and maximum values) of the numerical interval, and each numerical value between the two numerical endpoints. Unless otherwise specified, when the numerical interval only refers to an integer in the numerical interval, it includes the two endpoint integers of the numerical range, and each integer between the two endpoints, which is equivalent to directly listing each integer. When multiple numerical ranges are provided to describe features or characteristics, these numerical ranges can be merged. In other words, unless otherwise specified, the numerical range disclosed in the present application should be understood to include any and all sub-ranges included therein. The "numerical value" in the numerical interval can be any quantitative value, such as a number, a percentage, a ratio, etc. "Numerical interval" allows for broadly including quantitative intervals such as percentage intervals, ratio intervals, and ratio intervals.

[0048] All documents mentioned in this application are cited as references in this application, just as each document is cited as reference separately. Unless they conflict with the invention purpose and / or technical solution of this application, the cited documents involved in this application are cited with all contents and all purposes. When the cited documents are involved in this application, the definitions of relevant technical features, terms, nouns, phrases, etc. in the cited documents are also cited. When the cited documents are involved in this application, the examples and preferred methods of the cited relevant technical features can also be incorporated into this application as references, but are limited to the implementation of this application. It should be understood that when the cited content conflicts with the description in this application, the present application shall prevail or be modified adaptively according to the description of this application.

[0049] In the conventional technology, a phosphorus-doped amorphous silicon layer is prepared by PECVD, and then a phosphorus-doped polysilicon layer is obtained after annealing. However, due to the accumulation of interface stress and the rapid release of hydrogen during the annealing process, the phosphorus-doped polysilicon layer may burst, affecting the conversion efficiency of the solar cell. A large amount of evidence shows that the accumulation of interface stress and the rapid release of hydrogen during the annealing and crystallization process are the causes of bubbles and film burst. In the present application, a silicon oxynitride layer containing amorphous silicon oxynitride and polycrystalline silicon oxynitride is formed on the surface of the phosphorus-doped amorphous silicon layer during the preparation of the phosphorus-doped polysilicon layer. The interface stress of the doped polysilicon layer can be released during the annealing process to avoid bubbling. In addition, due to the presence of polycrystalline silicon oxynitride, light absorption can be reduced, current can be increased, film defects can be reduced, and film electron transmission can be increased.

[0050] In a first aspect, the present application provides a solar cell, the solar cell comprising:

[0051] A silicon substrate, the silicon substrate comprising a first surface and a second surface arranged opposite to each other along a thickness direction thereof;

[0052] A phosphorus-doped polysilicon layer and a first passivation layer are sequentially stacked on the first surface of the silicon substrate, and the first passivation layer includes a silicon oxynitride layer, and the silicon oxynitride layer contains amorphous silicon oxynitride and polycrystalline silicon oxynitride.

[0053] The present application covers the phosphorus-doped polysilicon layer with a silicon oxynitride layer, and during the annealing process, the interface stress of the phosphorus-doped polysilicon layer can be reduced, the defects caused by the interface stress can be reduced, and the occurrence of bubbles and other problems can be avoided; and the crystallization rate of the phosphorus-doped polysilicon can be increased by annealing. In addition, the silicon oxynitride layer of the present application contains polycrystalline silicon oxynitride, which can reduce parasitic absorption, increase current, reduce film defects, and increase film electron transmission.

[0054] In some embodiments, the silicon oxynitride layer has a thickness of 10 nm to 15 nm, for example, 10.0 nm, 10.5 nm, 11.0 nm, 11.5 nm, 12.0 nm, 12.5 nm, 13.0 nm, 13.5 nm, 14.0 nm, 14.5 nm or 15.0 nm.

[0055] The present application controls the thickness of the silicon oxynitride layer, thereby being able to effectively block the contact between electrons in Si and the negative charges of aluminum oxide, thereby avoiding carrier recombination.

[0056] In some embodiments, the first passivation layer further includes a first silicon nitride layer, and the first silicon nitride layer is disposed on a surface of the silicon oxynitride layer that is away from the silicon substrate.

[0057] In some embodiments, the first silicon nitride layer contains polycrystalline silicon nitride and amorphous silicon nitride.

[0058] In some embodiments, the thickness of the first silicon nitride layer is 10 nm to 15 nm, for example, 10.0 nm, 10.5 nm, 11.0 nm, 11.5 nm, 12.0 nm, 12.5 nm, 13.0 nm, 13.5 nm, 14.0 nm, 14.5 nm or 15.0 nm.

[0059] In some embodiments, the solar cell further includes a second passivation layer and a first electrode, and the second passivation layer and the first electrode are sequentially stacked on a surface of the first passivation layer in a direction away from the silicon substrate.

[0060] In some embodiments, the second passivation layer includes a first aluminum oxide layer and a first anti-reflection layer, and the first aluminum oxide layer and the first anti-reflection layer are sequentially stacked on a surface of the first passivation layer away from the silicon substrate in a direction away from the silicon substrate.

[0061] Traditional technologies such as Figure 2 As shown, it can be seen that the first aluminum oxide layer 106 is in direct contact with the phosphorus-doped polysilicon layer 103, and the negative charges in the first aluminum oxide layer 106 will attract holes to move and recombine, thereby deteriorating the passivation effect of the aluminum oxide layer. Figure 3 As shown, the present application adds a first passivation layer between the first aluminum oxide layer 106 and the phosphorus-doped polysilicon layer 103. The first passivation layer includes a silicon oxynitride layer 104 and / or a silicon nitride layer 105. Both silicon oxynitride and silicon nitride have rich positive charges, which can suppress the enrichment of minority carriers on the back side and avoid the passivation loss caused by direct contact between the first aluminum oxide layer 106 and the phosphorus-doped polysilicon layer 103.

[0062] In some embodiments, the thickness of the first aluminum oxide layer is 4 nm to 5 nm, for example, 4.0 nm, 4.1 nm, 4.2 nm, 4.3 nm, 4.4 nm, 4.5 nm, 4.6 nm, 4.7 nm, 4.8 nm, 4.9 nm or 5.0 nm.

[0063] In some embodiments, the thickness of the first anti-reflection layer is 60 nm to 90 nm, for example, 60 nm, 63 nm, 66 nm, 69 nm, 72 nm, 75 nm, 78 nm, 81 nm, 84 nm, 87 nm or 90 nm.

[0064] In some embodiments, the material of the first anti-reflection layer is silicon nitride.

[0065] In some embodiments, the solar cell further includes a P-type emitter layer, a third passivation layer and a second electrode, and the P-type emitter layer, the third passivation layer and the second electrode are sequentially stacked on the second surface of the solar cell in a direction away from the silicon substrate.

[0066] In some embodiments, the third passivation layer includes a second aluminum oxide layer and a second anti-reflection layer which are sequentially stacked in a direction away from the silicon substrate.

[0067] In some embodiments, the thickness of the second aluminum oxide layer is 10 nm to 15 nm, for example, 10.0 nm, 10.5 nm, 11.0 nm, 11.5 nm, 12.0 nm, 12.5 nm, 13.0 nm, 13.5 nm, 14.0 nm, 14.5 nm or 15.0 nm.

[0068] In some embodiments, the thickness of the second anti-reflection layer is 10 nm to 15 nm, for example, 10.0 nm, 10.5 nm, 11.0 nm, 11.5 nm, 12.0 nm, 12.5 nm, 13.0 nm, 13.5 nm, 14.0 nm, 14.5 nm or 15.0 nm.

[0069] In some embodiments, the material of the second anti-reflection layer is silicon nitride.

[0070] In some embodiments, the solar cell is a TOPcon cell, a PERC cell or an IBC cell.

[0071] In some embodiments, the first surface of the silicon substrate is further provided with a tunneling oxide layer;

[0072] The tunneling oxide layer is disposed between the silicon substrate and the phosphorus-doped polysilicon layer.

[0073] In some embodiments, the thickness of the tunnel oxide layer is 1.5 nm to 2.5 nm, for example, 1.5 nm, 1.6 nm, 1.7 nm, 1.8 nm, 1.9 nm, 2.0 nm, 2.1 nm, 2.2 nm, 2.3 nm, 2.4 nm or 2.5 nm.

[0074] In some embodiments, the materials of the first electrode and the second electrode each independently include at least one of silver, aluminum, gold, and copper.

[0075] In some embodiments, Figure 1As shown, the solar cell 100 includes a silicon substrate 101, and a tunneling oxide layer 102, a phosphorus-doped polysilicon layer 103, a silicon oxynitride layer 104, a first silicon nitride layer 105, a first aluminum oxide layer 106, a first anti-reflection layer 107 and a first electrode 108 are stacked in sequence on the first surface of the silicon substrate 101 in a direction away from the silicon substrate 101; a P-type emitter layer 109, a second aluminum oxide layer 110, a first anti-reflection layer 111 and a second electrode 112 are stacked in sequence on the second surface of the silicon substrate 101 in a direction away from the silicon substrate 101.

[0076] A second aspect of the present application provides a method for preparing a solar cell as described in the first aspect, the method comprising:

[0077] providing a silicon substrate;

[0078] forming a phosphorus-doped amorphous silicon layer and a passivation pre-layer in sequence on the first surface of the silicon substrate, wherein the passivation pre-layer comprises an amorphous silicon oxynitride layer;

[0079] The phosphorus-doped amorphous silicon layer and the amorphous silicon nitride oxide layer are annealed to form a phosphorus-doped polysilicon layer from the phosphorus-doped amorphous silicon layer, and the passivation pre-layer forms a first passivation layer, wherein the amorphous silicon nitride oxide layer forms a layer containing amorphous silicon nitride oxide and polycrystalline silicon nitride oxide.

[0080] In some embodiments, the annealing temperature is 880°C to 920°C, for example, 880°C, 885°C, 890°C, 895°C, 900°C, 905°C, 910°C, 915°C or 920°C.

[0081] The present invention controls the temperature of the annealing process, which can promote crystallization and phosphorus activation and avoid excessive diffusion of doping elements. In addition, the silicon oxynitride layer formed by the present invention contains amorphous components and polycrystalline components.

[0082] In some embodiments, the annealing treatment time is 6000s to 6500s, for example, it can be 6000s, 6050s, 6100s, 6150s, 6200s, 6250s, 6300s, 6350s, 6400s, 6450s or 6500s.

[0083] In some embodiments, before the annealing process, the method further includes: forming an amorphous silicon nitride layer on the surface of the amorphous silicon nitride oxide layer away from the silicon substrate;

[0084] After the annealing process is performed, the amorphous silicon nitride layer forms a first silicon nitride layer including amorphous silicon nitride and polycrystalline silicon nitride.

[0085] Optionally, it also includes:

[0086] After forming the first silicon nitride layer, a first aluminum oxide layer and a first anti-reflection layer are formed on a side of the first silicon nitride layer away from the silicon substrate to form a second passivation layer.

[0087] The present application uses a one-step annealing process. Due to the inhibitory effect of nitrogen on crystallization, the first silicon nitride layer formed contains some amorphous silicon nitride components. Amorphous silicon nitride has disorder, which can slow down the free transmission of carriers and has a better passivation effect. In addition, the first polycrystalline silicon nitride layer and the silicon oxynitride layer have abundant positive charges. When applied to the back passivation of the battery, it can effectively avoid the passivation loss caused by the direct contact between the aluminum oxide layer and the polysilicon layer, solve the problem that the back aluminum oxide is not conducive to passivation, and can use tubular ALD to prepare double-sided aluminum oxide to avoid plating.

[0088] In some embodiments, the preparation method further comprises:

[0089] forming a P-type emitter layer on the second surface of the silicon substrate;

[0090] A second aluminum oxide layer and a second anti-reflection layer are formed on the surface of the P-type emitter layer away from the silicon substrate to form a third passivation layer.

[0091] In some embodiments, the first aluminum oxide layer and the second aluminum oxide layer are prepared simultaneously. The present application forms aluminum oxide layers on both sides of the silicon substrate simultaneously, thereby effectively avoiding aluminum oxide wrap-around plating.

[0092] In some embodiments, the phosphorus-doped amorphous silicon layer is formed by at least one of chemical vapor deposition and physical vapor deposition.

[0093] In some embodiments, the amorphous silicon oxynitride layer is formed by at least one of chemical vapor deposition and physical vapor deposition.

[0094] In some embodiments, the amorphous silicon nitride oxide layer is formed by chemical vapor deposition, and the volume ratio of the nitrogen source, oxygen source and silicon source used in the chemical vapor deposition method is (5-7):(2-3):1, for example, the volume ratio can be 5:3:1, 6:2.5:1 or 7:2:1.

[0095] In some embodiments, the first anti-reflection layer and the second anti-reflection layer are formed by chemical vapor deposition, and the volume ratio of the nitrogen source and the silicon source used in the chemical vapor deposition method is (6-12):1, for example, 6:1, 7:1, 8:1, 9:1, 10:1, 11:1 or 12:1. It can be understood that the anti-reflection layer can be composed of multiple layers with different refractive indices.

[0096] Optionally, the phosphorus source includes phosphine, the nitrogen source includes ammonia, the silicon source includes silane, and the oxygen source includes N2O.

[0097] The embodiments of the present application will be described in detail below in conjunction with examples and comparative examples. It should be understood that these examples are only used to illustrate the present application and are not intended to limit the scope of the present application. The experimental methods for which specific conditions are not specified in the following examples are preferably referred to the guidance provided in the present application, and can also be based on the experimental manual or normal conditions in this area, can also be based on the conditions recommended by the manufacturer, or refer to experimental methods known in the art.

[0098] Example 1

[0099] S1. The second surface of the 130 mm thick N-type single crystal silicon substrate is textured to form an inverted pyramid structure, and boron diffusion is performed on the textured surface to form a P-type emitter layer with a square resistance of 190 Ω / sqr;

[0100] S2. Perform PECVD deposition on the first surface of the silicon substrate, using silane + laughing gas as a gas source to deposit a tunneling oxide layer with a thickness of 2 nm, using silane and phosphine with a volume ratio of 1.5:1 as a gas source to deposit a phosphorus-doped amorphous silicon layer with a thickness of 100 nm, using silane, ammonia and phosphine with a volume ratio of 1.5:1:1 as a gas source to deposit an amorphous silicon nitride layer with a thickness of 10 nm, and using silane and ammonia with a volume ratio of 1.5:1 as a gas source to deposit an amorphous silicon nitride layer with a thickness of 10 nm; then perform annealing at 900° C. for 6300 s to form a phosphorus-doped polysilicon layer, a silicon nitride oxide layer and a silicon nitride layer on the surface of the tunneling oxide layer;

[0101] S3, using HF and KOH to clean and remove the surrounding plating and borosilicate glass;

[0102] S4. A 4 nm aluminum oxide layer is deposited on the surface of the P-type emitter layer and the silicon nitride layer by ALD using TMA and water in a volume ratio of 1.1:1 as source gases; then, silane and ammonia in a volume ratio of 1:6 are deposited on the surface of the aluminum oxide layer on both sides for 200 s, silane and ammonia in a volume ratio of 1:9 are deposited for 160 s, and silane and ammonia in a volume ratio of 1:12 are deposited for 220 s to form a silicon nitride layer with a total thickness of 80 nm. After printing silver electrodes on both sides, the solar cell is prepared.

[0103] Example 2

[0104] A solar cell was prepared according to the method of Example 1, except that in step S2, the thickness of the amorphous silicon oxynitride layer was 15 nm, the thickness of the amorphous silicon nitride layer was 15 nm, the annealing temperature was 880° C., and the time was 6500 s.

[0105] In step S4, the thickness of the aluminum oxide layer is 5 nm.

[0106] Example 3

[0107] A solar cell was prepared according to the method of Example 1, except that in step S2, the thickness of the amorphous silicon oxynitride layer was 12 nm, the thickness of the amorphous silicon nitride layer was 12 nm, the annealing temperature was 920° C., and the time was 6000 s.

[0108] In step S4, the thickness of the aluminum oxide layer is 4.5 nm, and the thickness of the amorphous silicon nitride layer is 90 nm.

[0109] Example 4

[0110] A solar cell was prepared according to the method of Example 1, except that the thickness of the amorphous silicon oxynitride layer in step S2 was 5 nm.

[0111] Example 5

[0112] A solar cell was prepared according to the method of Example 1, except that the thickness of the amorphous silicon oxynitride layer in step S2 was 20 nm.

[0113] Example 6

[0114] A solar cell was prepared according to the method of Example 1, the only difference being that the temperature of the annealing treatment in step S2 was 850°C.

[0115] Example 7

[0116] A solar cell was prepared according to the method of Example 1, except that the temperature of the annealing treatment in step S2 was 950°C.

[0117] Comparative Example 1

[0118] A solar cell is prepared according to the method of Example 1, except that step S2 comprises:

[0119] S1. The second surface of the 130 mm thick N-type single crystal silicon substrate is textured to form an inverted pyramid structure, and boron diffusion is performed on the textured surface to form a P-type emitter layer with a square resistance of 190 Ω / sqr;

[0120] S2, performing PECVD deposition on the first surface of the silicon substrate, using nitrous oxide as a gas source to deposit a tunneling oxide layer with a thickness of 2 nm, using silane and phosphine with a volume ratio of 1.5:1 as gas sources to deposit a phosphorus-doped amorphous silicon layer with a thickness of 100 nm, and annealing at 900° C. for 6300 s to form a phosphorus-doped polysilicon layer;

[0121] Then, a silicon nitride layer with a thickness of 20 nm is deposited on the surface of the phosphorus-doped polysilicon layer;

[0122] S3, using HF and KOH to clean and remove the surrounding plating and borosilicate glass;

[0123] S4. A 4 nm aluminum oxide layer is deposited on the surface of the P-type emitter layer and the amorphous silicon nitride layer respectively using ALD with TMA and water in a volume ratio of 1.1:1 as the gas source; then, silane and ammonia in a volume ratio of 1:6 are deposited on the surface of the aluminum oxide layer on both sides for 200 s, silane and ammonia in a volume ratio of 1:9 are deposited for 160 s, and silane and ammonia in a volume ratio of 1:12 are deposited for 220 s to form a silicon nitride layer with a thickness of 80 nm. After printing silver electrodes on both sides, the solar cell is prepared.

[0124] The solar cells prepared in the above examples and comparative examples were tested for cell efficiency. The test method included: 2 ), using steady-state test on IV tester, test parameters include photoelectric conversion efficiency (Eta / %), open circuit voltage (U oc / mV), short-circuit current (I sc / A) and filling factor (FF / %), the test results are shown in Table 1.

[0125] Table 1

[0126] serial number Eta / % Uoc / mV Isc / A FF / % Example 1 25.978 0.7198 18.475 86.14 Example 2 25.952 0.7196 18.468 86.11 Example 3 25.98 0.7201 18.471 86.13 Example 4 25.934 0.7189 18.465 86.15 Example 5 25.936 0.7193 18.469 86.09 Example 6 25.945 0.7195 18.466 86.11 Example 7 25.949 0.7194 18.469 86.12 Comparative Example 1 25.857 0.7173 18.466 86.08

[0127] From the above table we can see that:

[0128] (1) Compared with Examples 4-5, it can be seen that the present application controls the thickness of the silicon oxynitride layer, thereby effectively blocking the contact between the electrons in Si and the negative charges of aluminum oxide, and avoiding carrier recombination. If the thickness is relatively thin, the passivation effect may be poor, and there may be a slight burn-through during the metallization process to form the electrode. When the thickness is relatively thick, the slurry may not be easy to burn through during the metallization process to form the electrode.

[0129] (2) Compared with Examples 6-7, it can be seen that the present application controls the temperature of the annealing treatment, which can promote crystallization and phosphorus activation and avoid excessive diffusion of doped elements. In addition, the silicon oxynitride layer formed by the present application contains amorphous components and polycrystalline components. If the annealing temperature is relatively low, it may cause incomplete crystallization and the doped phosphorus is not properly activated; if the annealing temperature is relatively high, it may cause excessive crystallization, thereby generating blistering, and excessive diffusion of phosphorus may cause destruction of the tunneling layer, resulting in a poor passivation effect.

[0130] (3) Compared with Comparative Example 1, it can be seen that the present application covers the phosphorus-doped polysilicon layer with a silicon oxynitride layer. During the annealing process, it can not only reduce the interface stress of the phosphorus-doped polysilicon layer, reduce the defects caused by the interface stress, and avoid the occurrence of bubbles and other problems; but also improve the crystallization rate of the phosphorus-doped polysilicon through annealing. In addition, the silicon oxynitride layer of the present application contains polycrystalline silicon oxynitride, which can reduce parasitic absorption, increase current, reduce film defects, and increase film electron transmission.

[0131] The technical features of the above-described embodiments may be arbitrarily combined. To make the description concise, not all possible combinations of the technical features in the above-described embodiments are described. However, as long as there is no contradiction in the combination of these technical features, they should be considered to be within the scope of this specification.

[0132] The above-mentioned embodiments only express several implementation methods of the present application, and the descriptions thereof are relatively specific and detailed, but they cannot be understood as limiting the scope of the invention patent. It should be pointed out that, for a person of ordinary skill in the art, several variations and improvements can be made without departing from the concept of the present application, and these all belong to the protection scope of the present application. Therefore, the protection scope of the patent of the present application shall be subject to the attached claims.

Claims

1. A solar cell, It is characterized in that The solar cell comprises: A silicon substrate, the silicon substrate comprising a first surface and a second surface arranged opposite to each other along a thickness direction thereof; A phosphorus-doped polysilicon layer and a first passivation layer, wherein the phosphorus-doped polysilicon layer and the first passivation layer are sequentially stacked on the first surface of the silicon substrate, wherein the first passivation layer comprises a silicon oxynitride layer, wherein the silicon oxynitride layer contains amorphous silicon oxynitride and polycrystalline silicon oxynitride; wherein the thickness of the silicon oxynitride layer is 10 nm to 15 nm; The method for preparing the solar cell comprises: sequentially forming a phosphorus-doped amorphous silicon layer and a passivation prefabricated layer on the first surface of the silicon substrate, wherein the passivation prefabricated layer comprises an amorphous silicon oxynitride layer; The phosphorus-doped amorphous silicon layer and the amorphous silicon nitride oxide layer are annealed to form a phosphorus-doped polysilicon layer from the phosphorus-doped amorphous silicon layer, and the passivation pre-layer forms a first passivation layer, wherein the amorphous silicon nitride oxide layer forms a layer containing amorphous silicon nitride oxide and polycrystalline silicon nitride oxide; the annealing temperature is 880°C to 920°C, and the time is 6000s to 6500s.

2. The solar cell according to claim 1, It is characterized in that The first passivation layer further includes a first silicon nitride layer, and the first silicon nitride layer is disposed on a surface of the silicon oxynitride layer that is away from the silicon substrate.

3. The solar cell according to claim 2, It is characterized in that The silicon nitride layer satisfies at least one of the following conditions: (1) The first silicon nitride layer contains polycrystalline silicon nitride and amorphous silicon nitride; (2) The thickness of the first silicon nitride layer is 10 nm to 15 nm.

4. The solar cell according to any one of claims 1 to 3, It is characterized in that The solar cell further comprises a second passivation layer and a first electrode, wherein the second passivation layer and the first electrode are sequentially stacked on the surface of the first passivation layer in a direction away from the silicon substrate; The second passivation layer includes a first aluminum oxide layer and a first anti-reflection layer, and the first aluminum oxide layer and the first anti-reflection layer are sequentially stacked on a surface of a side of the first passivation layer away from the silicon substrate in a direction away from the silicon substrate.

5. The solar cell according to claim 4, It is characterized in that The second passivation layer satisfies at least one of the following conditions: (1) The thickness of the first aluminum oxide layer is 4 nm to 5 nm; (2) The thickness of the first anti-reflection layer is 60 nm to 90 nm.

6. The solar cell according to claim 4, It is characterized in that The solar cell further includes a P-type emitter layer, a third passivation layer and a second electrode. The P-type emitter layer, the third passivation layer and the second electrode are sequentially stacked on the second surface of the solar cell in a direction away from the silicon substrate.

7. The solar cell according to claim 6, It is characterized in that The third passivation layer includes a second aluminum oxide layer and a second anti-reflection layer which are sequentially stacked in a direction away from the silicon substrate.

8. The solar cell according to claim 7, It is characterized in that The third passivation layer satisfies at least one of the following conditions: (1) The thickness of the second aluminum oxide layer is 10 nm to 15 nm; (2) The thickness of the second anti-reflection layer is 10 nm to 15 nm.

9. The solar cell according to claim 1, It is characterized in that The solar cell is a TOPcon cell, a PERC cell or an IBC cell.

10. A method for preparing the solar cell according to any one of claims 1 to 9, It is characterized in that The preparation method comprises: providing a silicon substrate; A phosphorus-doped amorphous silicon layer and a passivation prefabricated layer are sequentially formed on the first surface of the silicon substrate, wherein the passivation prefabricated layer comprises an amorphous silicon oxynitride layer; a method for preparing the amorphous silicon oxynitride layer comprises: forming the amorphous silicon oxynitride layer by chemical vapor deposition, wherein the volume ratio of nitrogen source, oxygen source and silicon source used in the chemical vapor deposition method is (5-7):(2-3):1; The phosphorus-doped amorphous silicon layer and the amorphous silicon nitride oxide layer are annealed to form a phosphorus-doped polysilicon layer from the phosphorus-doped amorphous silicon layer, and the passivation pre-layer forms a first passivation layer, wherein the amorphous silicon nitride oxide layer forms a layer containing amorphous silicon nitride oxide and polycrystalline silicon nitride oxide.

11. The preparation method according to claim 10, It is characterized in that Before the annealing treatment, the method further includes: forming an amorphous silicon nitride layer on a surface of the amorphous silicon nitride oxide layer away from the silicon substrate; After the annealing process is performed, the amorphous silicon nitride layer forms a first silicon nitride layer including amorphous silicon nitride and polycrystalline silicon nitride.

12. The preparation method according to claim 11, It is characterized in that Before the annealing treatment, the method further comprises: After forming the first silicon nitride layer, a first aluminum oxide layer and a first anti-reflection layer are formed on a side of the first silicon nitride layer away from the silicon substrate to form a second passivation layer.

13. The preparation method according to claim 10, It is characterized in that The preparation method further comprises: forming a P-type emitter layer on the second surface of the silicon substrate; A second aluminum oxide layer and a second anti-reflection layer are formed on the surface of the P-type emitter layer away from the silicon substrate to form a third passivation layer.

14. The preparation method according to any one of claims 10 to 13, It is characterized in that Forming the phosphorus-doped amorphous silicon layer by at least one of chemical vapor deposition and physical vapor deposition; The amorphous silicon oxynitride layer is formed by at least one of chemical vapor deposition and physical vapor deposition.

15. The preparation method according to claim 12, It is characterized in that The first anti-reflection layer and the second anti-reflection layer are formed by chemical vapor deposition, wherein the volume ratio of nitrogen source to silicon source used in the chemical vapor deposition is (6-12):1.

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