High-quality silicon carbide substrate, preparation method thereof and semiconductor device

By controlling the growth characteristic surface to be fixed at the edge of the silicon carbide substrate, the problems of defects and uneven doping distribution in the silicon carbide crystal are solved, and the preparation of high-quality silicon carbide substrates is realized, which improves the performance and reliability of the device. Suitable for industrial production of semiconductor devices.

CN119121384APending Publication Date: 2024-12-13SICC CO LTD
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Patent Information

Application Number
CN202411279470.6
Authority / Receiving Office
CN · China
Patent Type
Applications(China)
Current Assignee / Owner
Priority Date
2023-09-28
Filing Date
2024-05-13
Publication Date
2024-12-13

AI Technical Summary

Technical Problem

Silicon carbide crystals face quality and cost problems, especially the uneven distribution of defects and uneven doping caused by growth characteristic surfaces, which affect the yield and reliability of the device and limit its large-scale use.

Method used

When preparing silicon carbide substrates in PVT method, the movement trend of the growth characteristic surface is controlled, so that it moves toward the edge of the crystal, eliminates the growth characteristic surface, and achieves defects and doping uniformity in the full area, and uses a negative diameter Move the movement of the edges of the growth feature plane towards a temperature gradient and a continuous positive temperature gradient.

Benefits of technology

It achieves high uniformity of silicon carbide substrates, reduces the production cost of devices, improves the yield and reliability of semiconductor devices, and is suitable for large-scale promotion and use.

✦ Generated by Eureka AI based on patent content.

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Abstract

The invention provides a high-quality silicon carbide substrate, a preparation method thereof and a semiconductor device, and relates to the technical field of silicon carbide wafers. The preparation method of the crystal comprises a stable growth stage of the crystal, and the growth process conditions of the stable growth stage of the crystal comprise the following steps: S1, a limiting edge exists close to the growth edge of the crystal, the distance between the limiting edge and the growth edge of the crystal is not greater than 5mm, and a negative radial temperature gradient of-5 DEG C / mm-0. 1 DEG C / mm is set within the range of the limiting edge and the growth edge of the crystal; setting a continuous positive temperature gradient less than or equal to 3 DEG C / cm from the limiting edge to the center of the crystal; s2, seed crystals with the diameter larger than that of the target growth silicon carbide crystals are used for crystal growth, the diameter of the seed crystals is at least 5 mm larger than that of the target crystals and the substrate, and the high-quality silicon carbide substrate is obtained after the target crystals are treated. The silicon carbide substrate has high-quality uniformity, and the reliability of the device is remarkably improved.
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Description

[0001] This application is a divisional application with application number CN202410586417.4. The application date of the original application is May 13, 2024, the priority date is September 28, 2023, and the name of the invention is a high-quality silicon carbide substrate, a preparation method thereof, and a semiconductor device. Technical Field

[0002] The present invention relates to the technical field of silicon carbide wafers, and in particular to a high-quality silicon carbide substrate and a preparation method thereof, and a semiconductor device. Background Art

[0003] At present, silicon carbide crystals face two major problems: 1. Quality issues, which affect the yield, performance and reliability of silicon carbide devices; 2. Cost issues, which affect the application of silicon carbide in the terminal. Among them, the loss of material and device yield caused by material quality is also the main reason for the high cost and difficulty in application of silicon carbide crystals.

[0004] Furthermore, the quality problems of silicon carbide substrates include two categories: one is the explicit quality problems such as material quality and yield caused by defects, which can be better reflected in the substrate material indicators; the other is the material yield and device performance reliability problems caused by quality consistency problems, which are often difficult to reflect in the substrate material indicators, thus bringing greater risks to the reliability of subsequent device applications.

[0005] Specifically, in conductive silicon carbide crystals, the consistency problem is mainly reflected in two aspects: on the one hand, defect distribution. Defect aggregation will cause visible black spots "birthmarks" on the silicon carbide substrate, causing large fluctuations in the density of defects such as transmittance and dislocations. Although the crystal defects in silicon carbide crystals have been greatly improved, there are still problems such as unstable defect control and uneven distribution, resulting in low overall defect density and high local density. These local defect aggregations lead to reduced device yield and performance in specific areas. On the other hand, quality distribution, such as resistivity distribution, although the low on-resistance characteristics of power devices hope that the material resistivity is as low as possible, an overly broad distribution of electrical properties will lead to excessive differences in device performance; the resistivity of specific areas such as growth feature surfaces is too low, which will lead to defects such as dislocations and stacking faults in this area, and may also cause problems such as stacking fault expansion during subsequent use of the device, which seriously threatens the reliability of the device.

[0006] At present, such "facets" exist on SiC crystals and substrates prepared by conventional physical vapor transport (PVT for short). This "facet" refers to the growth characteristic surface, which is collectively referred to as the growth characteristic surface in the present invention. The growth characteristic surface is an inherent property of SiC crystals prepared by sublimation. There are many names for growth characteristic surfaces in China. Among them, the growth characteristic surface is commonly known as "small face", "growth small face", "characteristic growth surface" and so on in this field. Due to the existence of the growth characteristic surface, defects will be concentrated in this area. During the element doping process, the elements will be induced to gather and increase at the growth characteristic surface, which will show uneven doping, making the resistivity at the growth characteristic surface higher than other areas. The carrier uniformity of the overall substrate is poor, which will limit the large-scale use of silicon carbide substrates. In addition, the growth characteristic surface in the present invention does not refer to the growth interface.

[0007] Improving quality and reducing costs are the goals of the sustainable development of silicon carbide crystal materials. Especially at the stage where the silicon carbide industry is rapidly entering large-scale production and application, the stability, consistency and reliability of silicon carbide material performance will play a vital role in the development of the industry. Summary of the invention

[0008] In order to solve the above problems, the first aspect of the present invention provides a high-quality silicon carbide substrate, which is conductive and does not contain any one or more of the growth feature surface, high doping area and defect aggregation area within its entire area; the silicon carbide substrate is prepared by the PVT method.

[0009] The growth characteristic surface is an inherent property of SiC crystals prepared by the PVT method. The high-quality silicon carbide substrate in this application can change the movement trend of the growth characteristic surface during PVT growth, so that it moves to the edge of the crystal and is fixed within 5 mm from the edge of the crystal. When the crystal is actually used, the edge is cut. Therefore, after the crystal is cut, ground, polished and other processes, a silicon carbide substrate without a growth characteristic surface can be obtained.

[0010] Due to the existence of the growth feature surface in the original substrate, defects will be concentrated in this area. The element doping process will induce the elements to gather and increase at the growth feature surface, thus showing uneven doping. The resistivity at the growth feature surface is also higher than that in other areas, and the overall substrate has poor light transmittance uniformity. The above limits the large-scale use of silicon carbide substrates.

[0011] The high-quality silicon carbide substrate in the present application has no growth feature surface, and the substrate as a whole is uniformly distributed in both radial and axial directions. Therefore, it is possible to fundamentally curb the generation and aggregation of defects, avoid element aggregation during the doping process, and achieve uniform element doping, thereby improving the doping uniformity, resistivity uniformity and transmittance uniformity of the substrate. Therefore, the devices produced using the silicon carbide substrate not only have good performance themselves, but also have good consistency in mass production, which is conducive to industrial promotion and use.

[0012] Optionally, the silicon carbide substrate is N-type doped, and the N-type element doping concentration is greater than 1e 18 cm -3 , the properties of the silicon carbide substrate over the entire area satisfy any one or two of the following conditions;

[0013] a. The in-plane resistivity difference is not higher than 2.0mΩ·cm;

[0014] b. The transmittance difference is not higher than 3%.

[0015] Optionally, the in-plane resistivity difference is not higher than 1.0 mΩ·cm.

[0016] Optionally, the doping concentration is 2e 18 ~7e 18 cm -3 , the in-plane resistivity difference is 0.62 to 0.86 mΩ·cm.

[0017] Optionally, the transmittance difference is 0.5% to 1.6%.

[0018] Optionally, the N-type element doping is N2 doping, and the in-plane resistivity difference is 0.62 to 0.86 mΩ·cm; the transmittance difference is 0.5% to 1.6%.

[0019] The in-plane resistivity difference is “the maximum in-plane resistivity - the minimum in-plane resistivity”; the transmittance difference is “the maximum transmittance - the minimum transmittance”.

[0020] The above N-type element doping concentration is greater than 1e 18 cm -3 , which belongs to medium to high nitrogen doping. For those skilled in the art, the higher the doping concentration, the more likely it is that there will be uneven doping, and therefore the greater the difference in in-plane resistivity. In the process of controlling the movement trend of the growth feature surface, the present application fixes the growth feature surface at the edge of the crystal, thereby improving the doping uniformity during the doping process and making the light transmittance of the substrate more uniform.

[0021] The transmittance is related to the doping concentration and uniformity in the crystal. The transmittance difference of the silicon carbide substrate of the present application is no more than 3%, which can represent that the transmittance of the silicon carbide substrate is uniform, which is beneficial to improving the quality of the downstream device-end lithography process and thus improving device performance.

[0022] Optionally, the TDV of the silicon carbide substrate is less than 200 cm -2 .

[0023] Optionally, the TDV of the silicon carbide substrate is less than 100 cm -2 .

[0024] Preferably, the TDV of the silicon carbide substrate is less than 10 cm -2 .

[0025] The total density variation (TDV) is defined as: a number of squares with specific areas are divided in the substrate, such as n squares with areas of 1mmx1mm, 2mmx2mm, 5mmx5mm, and 10mmx10mm, and the edge dislocation (TED) or screw dislocation (TSD) density in the square is d1, d2, d3...dn. TDV is the difference between the maximum TED or TSD density and the minimum TED or TSD density, dmax-dmin.

[0026] Since the growth feature surface is eliminated in the silicon carbide substrate of the present application, the TED and TSD distribution can be made more uniform, so the TDV value is relatively low, which means that the dislocation distribution of the entire substrate is relatively uniform, eliminating the problem of low overall defect density but high local density in the current substrate.

[0027] When the above substrate is used to prepare power electronic devices, due to the characteristics of low in-plane resistivity difference and low transmittance difference, it is possible to ensure that the device has excellent electrical performance and reliability during the device production process.

[0028] Optionally, the size of the silicon carbide substrate is 4 inches, 6 inches, 8 inches or 10 inches.

[0029] A second aspect of the present invention provides a method for preparing a high-quality silicon carbide substrate, wherein the silicon carbide substrate is obtained by at least cutting a crystal, and the preparation method includes a crystal stable growth stage, and the growth process conditions of the crystal stable growth stage include the following steps:

[0030] S1: There is a limiting edge near the crystal growth edge, the distance between the limiting edge and the crystal growth edge is not more than 5mm, a negative radial temperature gradient of -5℃ / mm--0.1℃ / mm is set between the limiting edge and the crystal growth edge; a continuous positive temperature gradient is set from the limiting edge to the crystal center, and the continuous positive temperature gradient value is ≤3℃ / cm;

[0031] S2: using a seed crystal larger than the diameter of the target silicon carbide crystal to be grown for crystal growth, wherein the seed crystal diameter is at least 5 mm larger than the target crystal and the substrate diameter, and the high-quality silicon carbide substrate is obtained by processing the target crystal.

[0032] Optionally, the distance between the limiting edge and the crystal growth edge is no more than 3 mm.

[0033] Optionally, in step S1: taking 5 mm from the crystal growth edge as the boundary, a negative radial temperature gradient of -5°C / mm to 0.1°C / mm is set within a range less than 5 mm from the crystal growth edge; a continuous positive temperature gradient is set within a range greater than 5 mm from the crystal growth edge, and the continuous positive temperature gradient value is ≤3°C / cm.

[0034] Optionally, in step S1, a negative radial temperature gradient of -3°C / mm to 1°C / mm is set within a range of less than 5 mm from the crystal growth edge.

[0035] The radial temperature gradient is calculated as the ratio of the temperature difference (T2-T1) between the temperature T1 at a point closer to the center of the wafer and the temperature T2 at a point farther from the center of the wafer, and the distance d between the two points in the radial direction radiating outward from the center of the wafer. The positive (positive) temperature gradient ΔT = (T2-T1) / d; otherwise, it is a negative temperature gradient, ΔT = (T1-T2) / d.

[0036] The preparation method adopted in this application is to drive the growth feature surface to move toward the edge of the crystal and fix it within 5mm of the edge of the crystal under the setting of step S1 to obtain a high-quality silicon carbide substrate. However, it can be understood by those skilled in the art that the movement trend of the growth feature surface may also be controlled by other methods to obtain the silicon carbide substrate of this application. Therefore, this application only illustrates the preparation method of the high-quality silicon carbide substrate prepared this time, and other methods for controlling the trend of the growth feature surface are not within the scope of research of this application.

[0037] The radial temperature gradient of crystal growth in step S1 can be set by conventional technical means in the industry, such as adjusting the temperature or pressure in the growth chamber or the thickness of the insulation layer material for overall adjustment. The discontinuous temperature gradient setting can be achieved by structurally improving the crystal growth chamber and optimizing the temperature distribution of the crystal growth interface, so as to achieve controllable adjustment of the temperature gradient, such as placing a material with lower thermal conductivity than the central area at the edge of the crystal growth chamber to reduce the heat loss at the edge, thereby achieving a temperature distribution jump at the crystal growth interface; conversely, such as placing a material with higher thermal conductivity at the edge of the crystal growth or reducing the thickness of the edge insulation layer, etc., a reverse temperature gradient distribution can be set; in addition, different thermal field structures or new materials can be set in the growth chamber to adjust the temperature distribution, such as setting a TaC coating material coated with high reflectivity on the graphite ring at the edge of the crystal growth, so that the heat radiation in the growth chamber is concentrated to the edge of the crystal growth, thereby achieving a temperature gradient jump. Through the above more common technical means used in the industry, the scheme can be configured according to actual needs to achieve the purpose of adjusting the temperature gradient in the crystal growth chamber.

[0038] Optionally, during the stable crystal growth stage, the temperature in the growth chamber is first raised to above 2200°C at a rate of 10-50°C / min, and the pressure in the growth chamber is simultaneously reduced to 1-100 mbar, and then the crystal growth is maintained for more than 50 hours under the settings of steps S1 and S2.

[0039] Optionally, during the stable crystal growth stage, the temperature in the growth chamber is first increased to above 2200°C at a rate of 10-30°C / min, while the pressure is reduced to 5-50 mbar, and then the crystal growth is maintained for more than 50 hours under the settings of steps S1 and S2.

[0040] In the present invention, the PVT method is used to prepare silicon carbide crystals, isostatic graphite is used as the raw material of the growth chamber (crucible) for crystal growth, and SiC powder is used as the raw material for crystal growth. In order to ensure the excellent and stable electrical properties of silicon carbide, the present invention preferably uses a silicon carbide synthetic powder with a certain purity, and the total impurity content of the silicon carbide powder is not higher than 1E 19 cm -3 More preferably, the total impurity content in the silicon carbide powder is not higher than 1E 17 cm -3 .

[0041] In the present invention, when silicon carbide crystals grow, SiC powder is loaded into a graphite crucible chamber and a SiC seed crystal is placed on the top of the growth chamber, the crucible is sealed, the crucible is wrapped in a thermal insulation material made of graphite soft felt or hard felt, and then moved into the chamber of a crystal growth device for crystal growth.

[0042] Optionally, before the crystal stable growth stage, a crystal nucleation stage is also included, and the growth process conditions of the crystal nucleation stage include the following steps:

[0043] After the crystal growth chamber is sealed, the growth chamber is evacuated to 10 -3 Pa, after the vacuum stage is stable for a period of time, inert gas is introduced to gradually increase the pressure in the growth chamber to 100-1000mbar and then stabilize it. At the same time, nitrogen is introduced into the chamber at 1ml / min-100ml / min.

[0044] Optionally, while the pressure in the growth chamber is increased during the crystal nucleation stage, the temperature in the growth chamber is gradually increased from room temperature to 1600-2100°C and then kept constant, and then the crystal stable growth stage is carried out after maintaining the constant temperature and pressure for 5-50 hours.

[0045] Optionally, during the crystal nucleation stage, the temperature in the growth chamber is kept constant at 1800-2100° C., and the pressure in the growth chamber is kept constant at 300-800 mbar. After maintaining the constant temperature and pressure for 30-50 hours, the crystal stable growth stage is performed.

[0046] In the crystal nucleation stage, the silicon carbide powder sublimates to form a crystal nucleus. In the subsequent stable crystal growth stage, the silicon carbide powder can be fully sublimated and transferred to the seed crystal for stable growth, and finally a silicon carbide crystal is obtained. Since the diameter of the seed crystal in step S2 is at least 5 mm larger than the target crystal and the substrate diameter, the prepared SiC crystal has an edge processing allowance, and high-quality silicon carbide crystals can be obtained by cutting the edges. For example, the seed crystal diameter is 160 mm, the substrate diameter is 150 mm, or the seed crystal diameter is 210 mm, and the substrate diameter is 200 mm, so it can not only ensure the smooth preparation of large-size silicon carbide substrates, but also improve the quality of the prepared silicon carbide substrates.

[0047] A third aspect of the present invention provides a semiconductor device including the above-mentioned silicon carbide substrate.

[0048] Compared with the prior art, the present invention achieves at least one of the following beneficial effects:

[0049] (1) The silicon carbide substrate prepared by the present invention does not contain a growth feature surface, and the resistivity difference over the entire area is not higher than 2.0 mΩ·cm, and the transmittance difference is not higher than 3%. This indicates that the silicon carbide substrate has a high degree of uniformity, and semiconductor devices prepared using the silicon carbide substrate have higher yield, performance, and reliability.

[0050] (2) The TDV of the silicon carbide substrate prepared by the present invention is less than 200 cm over the entire area -2, which eliminates the problem of low overall defect density but high local density in the current substrate, and there are almost no defects such as dislocations and stacking faults, so it is more suitable for large-scale promotion and use.

[0051] (3) The preparation method of the present invention can control the movement trend of the growth feature surface by regulating step S1 during the growth of the crystal, and lock it within 5 mm of the crystal edge area. After the crystal is cut, ground, polished, etc., the target silicon carbide substrate can be obtained.

[0052] (4) The silicon carbide substrate prepared by the present invention has high electrical uniformity (for example, resistivity uniformity), high transmittance uniformity and high defect distribution uniformity. When the substrate is cut for use in preparing semiconductor devices, the effective area utilization rate can be improved. Compared with other substrates of the same area, the semiconductor devices prepared therefrom not only have good performance, but also are larger in number, which can reduce the production cost of semiconductor devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0053] The drawings described herein are used to provide a further understanding of the present invention and constitute a part of the present invention. The exemplary embodiments of the present invention and their descriptions are used to explain the present invention and do not constitute an improper limitation of the present invention. In the drawings:

[0054] Figure 1 An exemplary embodiment of a schematic diagram of a silicon carbide substrate structure containing a growth feature surface visible to the naked eye is shown;

[0055] Figure 2 An exemplary embodiment of a schematic diagram of a growth process of a growth feature surface of the present application is shown;

[0056] Figure 3 An exemplary embodiment of a schematic diagram of a silicon carbide crystal structure of the present application is shown;

[0057] Figure 4 A diagram showing a light transmittance test method is shown;

[0058] Figure 5 The resistivity mapping diagram of the silicon carbide substrate of Example 1 of the present application is shown;

[0059] Figure 6 The resistivity mapping diagram of the silicon carbide substrate of Example 2 of the present application is shown;

[0060] Figure 7 The resistivity mapping diagram of the silicon carbide substrate of Example 3 of the present application is shown;

[0061] Figure 8 The resistivity mapping diagram of the silicon carbide substrate of Example 4 of the present application is shown;

[0062] Fig. 9 The resistivity mapping diagram of the silicon carbide substrate of Comparative Example 1 of the present application is shown;

[0063] Fig.10 The resistivity mapping diagram of the silicon carbide substrate of Comparative Example 1 of the present application is shown;

[0064] Fig.11 The resistivity mapping diagram of the silicon carbide substrate of Comparative Example 1 of the present application is shown;

[0065] Fig.12 The resistivity mapping diagram of the silicon carbide substrate of Comparative Example 1 of the present application is shown;

[0066] Fig.13 A comparison chart of light transmittance of the silicon carbide substrate of Example 2 of the present application and the silicon carbide substrate of Comparative Example 1 is shown;

[0067] Fig.14 A curve diagram showing the light transmittance variation of the silicon carbide substrate in Example 3 of the present application is shown;

[0068] Fig.15 A schematic diagram of the structure of a silicon carbide substrate without growth feature surface according to the present application is shown. DETAILED DESCRIPTION

[0069] In order to more clearly illustrate the overall concept of the present invention, a detailed description is given below in an exemplary manner in conjunction with the accompanying drawings.

[0070] In the description of this specification, the description with reference to the terms "one embodiment", "some embodiments", "examples", "specific examples", or "some examples" means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described can be combined in any one or more embodiments or examples in a suitable manner.

[0071] At present, due to the existence of growth feature surfaces, the resistivity at the growth feature surfaces is too low, resulting in uneven resistivity distribution, uneven transmittance distribution, and uneven carrier concentration change rate in the entire area of ​​the silicon carbide substrate, which may lead to defects such as dislocations and stacking faults in this area, and may also cause problems such as stacking fault expansion in the subsequent use of the device. In order to solve the above problems, the present invention provides a high-quality silicon carbide substrate, which has no visible growth feature surfaces in the entire area of ​​the silicon carbide substrate, and the resistivity, doping concentration, transmittance and carrier concentration in the entire area of ​​the silicon carbide substrate are highly uniform.

[0072] In the process of preparing the silicon carbide substrate in the following embodiments 1-6, the growth feature surface can be locked at the edge of the silicon carbide crystal. As the crystal edge is cut, a silicon carbide substrate without a growth feature surface is obtained. Due to the disappearance of the inherent structural property of the growth feature surface, the number of defects in the silicon carbide substrate itself is reduced and no aggregation will occur. At the same time, the aggregation of elements in the doping process can be avoided, that is, the existence of high-doping areas can be avoided, thereby improving the doping uniformity, light transmittance uniformity and resistivity uniformity of the silicon carbide substrate with a structure without a growth feature surface.

[0073] Example 1

[0074] This embodiment relates to a method for preparing a 6-inch high-quality silicon carbide substrate, which specifically includes the following steps:

[0075] (1) Crystal nucleation stage

[0076] The silicon carbide powder and seed crystal were placed in the crucible, and then the growth chamber was sealed and evacuated to 10°C by a mechanical pump and a vacuum pump. -3 Pa, inert gas was introduced after a period of stabilization in the vacuum stage, and the pressure in the growth chamber was gradually increased to 100mbar, while nitrogen was introduced into the chamber at 100ml / min. During the crystal nucleation stage, while the pressure in the growth chamber was increased, the temperature in the furnace was gradually increased from room temperature to 1600℃ through power setting and maintained for 50h.

[0077] (2) Crystal stable growth stage

[0078] After the crystal nucleation stage, the temperature was raised to 2200°C at a rate of 20°C / min, and the pressure in the growth chamber was reduced to 50 mbar by adjusting the pressure controller and maintained for 50 hours.

[0079] S1: With 5 mm from the crystal growth edge as the boundary, a negative radial temperature gradient of -0.1 °C / mm is set within a range of less than 5 mm from the crystal growth edge, and a continuous positive temperature gradient of 1 °C / cm is set within a range of more than 5 mm from the crystal growth edge;

[0080] S2: Use a seed crystal larger than the target silicon carbide crystal diameter for crystal growth, the seed crystal diameter is 5 mm larger than the target crystal diameter. After cutting, grinding, polishing and other processing, the target silicon carbide substrate can be obtained.

[0081] Example 2

[0082] This embodiment relates to a method for preparing a 6-inch high-quality silicon carbide substrate, which specifically includes the following steps:

[0083] (1) Crystal nucleation stage

[0084] The silicon carbide powder and seed crystal were placed in the crucible, and then the growth chamber was sealed and evacuated to 10°C by a mechanical pump and a vacuum pump. -3 Pa, inert gas was introduced after a period of stabilization in the vacuum stage, and the pressure in the growth chamber was gradually increased to 300mbar, while nitrogen was introduced into the chamber at 40ml / min. During the crystal nucleation stage, while the pressure in the growth chamber was increased, the temperature in the furnace was gradually increased from room temperature to 1800℃ through power setting and maintained for 30h.

[0085] (2) Crystal stable growth stage

[0086] After the crystal nucleation stage, the temperature was raised to 2400°C at a rate of 30°C / min, and the pressure in the growth chamber was reduced to 10 mbar by adjusting the pressure controller and maintained for 70 hours.

[0087] S1: With 4.5 mm from the crystal growth edge as the boundary, a negative radial temperature gradient of -5 °C / mm is set within a range of less than 4.5 mm from the crystal growth edge, and a continuous positive temperature gradient of 1 °C / cm is set within a range of more than 4.5 mm from the crystal growth edge;

[0088] S2: Use a seed crystal larger than the target silicon carbide crystal diameter for crystal growth, the seed crystal diameter is 6 mm larger than the target crystal diameter. After cutting, grinding, polishing and other processing, the target silicon carbide substrate can be obtained.

[0089] Example 3

[0090] This embodiment relates to a method for preparing a 6-inch high-quality silicon carbide substrate, which specifically includes the following steps:

[0091] (1) Crystal nucleation stage

[0092] The silicon carbide powder and seed crystal were placed in the crucible, and then the growth chamber was sealed and evacuated to 10°C by a mechanical pump and a vacuum pump. -3 Pa, inert gas was introduced after a period of stabilization in the vacuum stage, and the pressure in the growth chamber was gradually increased to 500mbar, while nitrogen was introduced into the chamber at 40ml / min. During the crystal nucleation stage, while the pressure in the growth chamber was increased, the temperature in the furnace was gradually increased from room temperature to 2100℃ through power setting and maintained for 50h.

[0093] (2) Crystal stable growth stage

[0094] After the crystal nucleation stage, the temperature was raised to 2500°C at a rate of 10°C / min, and the pressure in the growth chamber was reduced to 20 mbar by adjusting the pressure controller and maintained for 70 hours.

[0095] S1: With 3.5 mm from the crystal growth edge as the boundary, a negative radial temperature gradient of -3 °C / mm is set within a range less than 3.5 mm from the crystal growth edge, and a continuous positive temperature gradient of 3 °C / cm is set within a range greater than 3.5 mm from the crystal growth edge;

[0096] S2: Use a seed crystal larger than the target silicon carbide crystal diameter for crystal growth, the seed crystal diameter is 6 mm larger than the target crystal diameter. After cutting, grinding, polishing and other processing, the target silicon carbide substrate can be obtained.

[0097] Example 4

[0098] This embodiment relates to a method for preparing a 6-inch high-quality silicon carbide substrate, which specifically includes the following steps:

[0099] (1) Crystal nucleation stage

[0100] The silicon carbide powder and seed crystal were placed in the crucible, and then the growth chamber was sealed and evacuated to 10°C by a mechanical pump and a vacuum pump. -3 Pa, inert gas was introduced after a period of stability in the vacuum stage, and the pressure in the growth chamber was gradually increased to 300mbar. At the same time, nitrogen was introduced into the chamber at 30ml / min and doped with P. During the crystal nucleation stage, while the pressure in the growth chamber was increased, the temperature in the furnace was gradually increased from room temperature to 2000℃ through power setting and maintained for 50h.

[0101] (2) Crystal stable growth stage

[0102] After the crystal nucleation stage, the temperature was raised to 2600°C at a rate of 40°C / min, and the pressure in the growth chamber was reduced to 20 mbar by adjusting the pressure controller and maintained for 80 hours.

[0103] S1: With 3 mm from the crystal growth edge as the boundary, a negative radial temperature gradient of -4 °C / mm is set within a range of less than 3 mm from the crystal growth edge, and a continuous positive temperature gradient of 0.5 °C / cm is set within a range of more than 3 mm from the crystal growth edge;

[0104] S2: Use a seed crystal larger than the target silicon carbide crystal diameter for crystal growth, the seed crystal diameter is 8 mm larger than the target crystal diameter. After cutting, grinding, polishing and other processing, the target silicon carbide substrate can be obtained.

[0105] Example 5

[0106] The difference between this embodiment and embodiment 2 is that in step S1, a negative radial temperature gradient of -1°C / mm is set within a range less than 4.5mm from the crystal growth edge, and an 8-inch silicon carbide substrate is prepared in this embodiment. The remaining steps are the same as those in embodiment 2.

[0107] Example 6

[0108] The difference between this embodiment and embodiment 2 is that in step S1, a continuous positive temperature gradient is set within a range greater than 4.5 mm from the crystal growth edge, and the continuous positive temperature gradient is 3° C. / cm. The remaining steps are the same as those in embodiment 2.

[0109] Comparative Example 1

[0110] The difference between this comparative example and Example 2 is that in step S1, a continuous positive temperature gradient is set from the center to the edge of the crystal, and the continuous positive temperature gradient is 3°C / cm. The remaining steps are the same as in Example 2.

[0111] Comparative Example 2

[0112] The difference between this comparative example and Example 2 is that in step S1, a negative radial temperature gradient of -6°C / mm is set within a range less than 4.5 mm from the crystal growth edge, and an 8-inch silicon carbide substrate is prepared in this example. The remaining steps are the same as in Example 2.

[0113] The listed examples and comparative examples all adopt the PVT crystal growth method to prepare silicon carbide crystals, and the examples and comparative examples all adopt the same edge cutting (removal of 5 mm), radial cutting, grinding and polishing processes to obtain silicon carbide substrates. The obtained silicon carbide substrate samples are tested for performance, and the results are shown in Table 1. The specific test methods are as follows:

[0114] The resistivity was measured using a Semilab WT-2000 low resistance tester at 73 points evenly and symmetrically distributed within the silicon carbide substrate. In this application, a mapping diagram was used to characterize the resistivity distribution of the substrate.

[0115] The transmittance is measured by using a haze meter CS-700, and several points are taken along the diameter of the substrate through the center and the growth feature surface area. The test method is referenced Figure 4 shown.

[0116] Table 1 Silicon carbide substrate performance test table

[0117]

[0118] The present application sets a discontinuous temperature gradient distribution in the radial direction of the crystal growth surface to ensure that the crystal edge has sufficient lateral growth driving force and the crystal edge has the ability to continuously expand and grow. The crystals of the embodiment and the comparative example undergo the same conventional edge cutting, radial cutting, grinding, and polishing processes without changing the quality of the substrate. Therefore, according to the data in Table 1, the preparation method of the present application can control the movement trend of the growth feature surface and lock it at the edge of the crystal. The movement trend control reference Figure 2 ; and refer to Figure 3 The growth feature surface at the edge of the crystal can be removed as the crystal edge is cut, so the substrates of Examples 1-6 do not have a growth feature surface, and the existing positive temperature gradient in Comparative Example 1 and the edge temperature gradient of -6°C / mm in Comparative Example 2 cannot make the growth feature surface move toward the edge and be fixed at the edge.

[0119] The silicon carbide substrates of Comparative Examples 1 and 2 both contain growth feature surfaces visible to the naked eye, and their structures are as follows: Figure 1 As shown, it can be seen that the silicon carbide substrate without growth feature surface does not contain any black spots similar to "birthmarks" in the entire area. The silicon carbide substrates prepared in Examples 1-6 do not contain any growth feature surface visible to the naked eye. Fig.15 As shown. From the above embodiments and comparative examples and Figure 1 , Fig.15 It can be seen that the silicon carbide substrate without growth feature surface is prepared by the preparation method of the present application. Combined with other parameters disclosed in Table 1, it can be seen that due to the absence of the growth feature surface structure, the in-plane resistivity difference of the silicon carbide substrate is not higher than 2.0 mΩ·cm, the transmittance difference is not higher than 3%, and the TDV is less than 200 cm -2 , indicating that the overall performance of the silicon carbide substrate has been improved. In Comparative Examples 1 and 2, the in-plane resistivity difference of the silicon carbide substrate containing the growth feature surface is greater than 5 mΩ·cm, the transmittance difference is greater than 10%, and the TDV is greater than 400 cm -2 , which means the overall performance of the silicon carbide substrate is poor.

[0120] Figure 5 The resistivity mapping diagram of the silicon carbide substrate of Example 1 of the present application is shown. Figure 6 The resistivity mapping diagram of the silicon carbide substrate of Example 2 of the present application is shown. Figure 7 The resistivity mapping diagram of the silicon carbide substrate of Example 3 of the present application is shown. Figure 8 The resistivity mapping diagram of the silicon carbide substrate of Example 4 of the present application is shown. Figure 5-8As shown, the horizontal axis represents the diameter of the silicon carbide substrate, the center point of the silicon carbide substrate is the coordinate 00, the device test area in the mapping diagram is (-60mm, 60mm), the vertical axis represents the resistivity, and the color change represents the resistivity distribution. It can be seen that the resistivity distribution in the silicon carbide substrate of the present application is uniform, there is no abnormally low-resistance area, and the resistivity in-plane difference is <3mΩ·cm; preferably, the resistivity in-plane difference is <1mΩ·cm.

[0121] Fig. 9 , Fig.10 , Fig.11 and Fig.12 The resistivity mapping diagrams of the silicon carbide substrate of comparative example 1 of the present application are shown respectively. The inventor conducted 4 sets of repeated experiments on comparative example 1. Fig. 9 , Fig.10 , Fig.11 and Fig.12 As shown, the center point of the silicon carbide substrate is the coordinate 00 point, the horizontal axis represents the test silicon carbide substrate area (-60mm, 60mm), and the vertical axis represents the resistivity. It can be seen that due to the existence of the growth characteristic surface, there is an obvious low-resistance abnormal area in the resistivity distribution, and the resistivity surface difference is usually >5mΩ·cm.

[0122] Fig.13 A comparison chart of the light transmittance of the silicon carbide substrate of Example 2 of the present application and the silicon carbide substrate of Comparative Example 1 is shown, Fig.13 In the figure, the horizontal axis represents the number of test points, and the vertical axis represents the transmittance; the circle curve is the transmittance curve of the silicon carbide substrate of Example 2, and the square curve is the transmittance curve of the silicon carbide substrate of Comparative Example 1. Fig.13 It can be seen that the visible light transmittance of comparative example 1 in the growth feature surface area drops suddenly. This is because the doping concentration and carrier concentration in the growth feature surface area are much higher than other areas, resulting in the absorption of part of the visible light band. However, the silicon carbide substrate prepared by Example 2 of the present application eliminates the problem of excessive doping concentration and carrier concentration at the growth feature surface, and the impurity and carrier concentrations in the substrate surface are evenly distributed, and the uniformity and consistency of the visible light transmittance in the surface are greatly improved.

[0123] Fig.14 The transmittance variation curve of the silicon carbide substrate of Example 3 of the present application is shown, the horizontal axis represents different test coordinate points of the silicon carbide substrate, and the vertical axis represents the transmittance. Fig.14 It can be seen that the transmittance distribution in the plane is uniform.

[0124] Since the growth feature surface is eliminated in the present application, the uniformity of resistivity and transmittance inside the substrate is greatly improved. There are no inclusions or aggregations of defects such as dislocations and micropipes at the growth feature surface that usually exist in the substrate, so the quality and yield of the substrate are greatly improved. The performance and reliability of the substrate in subsequent device processes and use will be greatly improved.

[0125] According to the above analysis, the silicon carbide substrate prepared as shown in Examples 1-6, the processing method of the silicon carbide substrate breaks through the conventional continuous positive radial temperature distribution design, and innovatively designs a negative radial temperature gradient at the crystal growth edge, driving the growth characteristic surface to change the movement trend, thereby locking the growth characteristic surface in the edge area of ​​the crystal, combined with the seed crystal diameter being at least 5 mm larger than the target diameter, and finally fixing the growth characteristic surface within 5 mm from the edge of the crystal. After the crystal is subsequently processed by cutting, grinding, polishing, etc., a silicon carbide substrate without a growth characteristic surface can be obtained.

[0126] Since the elimination of the growth characteristic surface is completed in the crystal growth stage, the subsequent substrate processing technology will not affect the above-mentioned electrical properties. Therefore, the present invention has no special restrictions on the substrate processing method, which is a routine operation for those skilled in the art. Such a growth scheme is simple and easy to implement, and can ensure the stress and defect control under the continuous and small temperature gradient in the central area of ​​the crystal. Through the above innovation, the growth characteristic surface can be fixed at the edge of the crystal and removed in the subsequent crystal processing process, so that there is no growth characteristic surface on the entire crystal rod and the substrate processed therefrom, so as to achieve the purpose of eliminating the defect aggregation area and ensure the device end yield and reliability.

[0127] However, the preparation method of the silicon carbide substrate without growth characteristic surface of the present invention includes but is not limited to this. Those skilled in the art may also prepare the silicon carbide substrate by other methods capable of controlling the characteristic growth surface, so the preparation method disclosed in this application is only for illustration and does not constitute a limitation on the performance of the silicon carbide substrate itself. Those skilled in the art may also study new preparation methods to obtain the silicon carbide substrate of this application through existing technical reserves and creative labor. Other preparation methods are not within the research scope of this application and will not be studied further.

[0128] The above description is only an embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent substitution, improvement, etc. made within the spirit and principle of the present invention should be included in the scope of the claims of the present invention.

Claims

1. A method for preparing a high-quality silicon carbide substrate, wherein the silicon carbide substrate is obtained by at least cutting a crystal, characterized in that: The method for preparing a crystal includes a crystal stable growth stage, a growth process condition of the crystal stable growth stage The following steps are involved: S1: There is a limiting edge near the crystal growth edge, the distance between the limiting edge and the crystal growth edge is not more than 5mm, a negative radial temperature gradient of -5℃ / mm--0.1℃ / mm is set between the limiting edge and the crystal growth edge; a continuous positive temperature gradient is set from the limiting edge to the crystal center, and the continuous positive temperature gradient value is ≤3℃ / cm; S2: using a seed crystal larger than the diameter of the target silicon carbide crystal to be grown for crystal growth, wherein the seed crystal diameter is at least 5 mm larger than the target crystal and the substrate diameter, and the high-quality silicon carbide substrate is obtained by processing the target crystal.

2. The preparation method according to claim 1, characterized in that: The distance between the limiting edge and the crystal growth edge is no more than 3 mm.

3. The preparation method according to claim 1, characterized in that: In step S1: taking 5 mm from the crystal growth edge as the boundary, a negative radial temperature gradient of -5°C / mm to 0.1°C / mm is set within a range of less than 5 mm from the crystal growth edge; a continuous positive temperature gradient is set within a range of more than 5 mm from the crystal growth edge, and the continuous positive temperature gradient value is ≤3°C / cm.

4. The preparation method according to claim 3, characterized in that: In step S1, a negative radial temperature gradient of -3°C / mm to 1°C / mm is set within a range of less than 5 mm from the crystal growth edge.

5. The preparation method according to claim 1, characterized in that: During the stable crystal growth stage, the temperature in the growth chamber is first raised to above 2200°C at a rate of 10-50°C / min, and the pressure in the growth chamber is simultaneously reduced to 1-100 mbar, and then maintained for more than 50 hours for crystal growth under the settings of steps S1 and S2.

6. The preparation method according to claim 5, characterized in that: In the stable crystal growth stage, the temperature in the growth chamber is first increased to above 2200°C at a rate of 10-30°C / min, while the pressure is reduced to 5-50 mbar, and then the crystal growth is maintained for more than 50 hours under the settings of steps S1 and S2.

7. The preparation method according to any one of claims 1 to 6, characterized in that: Before the stable crystal growth stage, it also includes the crystal nucleation stage. The growth process conditions of the crystal nucleation stage are The following steps are involved: After the crystal growth chamber is sealed, the growth chamber is evacuated to 10 -3 Pa, after the vacuum stage is stable for a period of time, inert gas is introduced to gradually increase the pressure in the growth chamber to 100-1000mbar and then stabilize it. At the same time, nitrogen is introduced into the chamber at 1ml / min-100ml / min.

8. The preparation method according to claim 7, characterized in that: During the crystal nucleation stage, while the pressure in the growth chamber is increased, the temperature in the growth chamber is gradually increased from room temperature to 1600-2100°C and then kept constant. After maintaining the constant temperature and pressure for 5-50 hours, the crystal stable growth stage is carried out.

9. A high-quality silicon carbide substrate, characterized in that: The high-quality silicon carbide substrate is conductive, and does not contain any one or more of a growth feature surface, a high-doping area, and a defect aggregation area within its entire area.

10. A semiconductor device, characterized in that: The semiconductor device comprises the high-quality silicon carbide substrate according to claim 9.