Dual-power low-voltage apparatus test system based on WTD-VMD-ZCD phase selection closing control and use method thereof

Abstract

The invention discloses a dual-power-supply low-voltage apparatus test system based on WTD-VMD-ZCD phase selection control closing and a use method of the dual-power-supply low-voltage apparatus test system. The system comprises a test voltage source loop, a capacitor charging and discharging loop, a test current source loop and a main control module, a voltage signal generated by a test voltage source is denoised and reconstructed by using a WTD algorithm, then VMD parameters are optimized by using a BKA algorithm, VMD decomposition is carried out on the voltage signal after WTD denoising, correlation calculation is carried out on obtained IMF components, and the correlation of the IMF components is calculated. The IMF component with the correlation higher than a set threshold value is selected as a denoised test voltage source signal, then zero-cross detection is carried out by using a ZCD algorithm, logic control of time sequence connection of a test voltage source and a test current source is carried out through phase selection opening and closing, and then the test of the low-voltage electric appliance is realized. The requirements of the low-voltage electrical apparatus on test power supply electric parameters and test quality are met, accurate control of the test is realized, the cost is low, and the system is simple and easy to construct and operate.

Description

Technical Field

[0001] The present invention belongs to the technical field of low-voltage electrical appliance testing, and in particular relates to a dual-power supply low-voltage electrical appliance testing system based on WTD-VMD-ZCD phase selection control closing and a use method thereof. Background Art

[0002] Low-voltage electrical appliances are important components widely used in industrial and civil electrical equipment, providing important guarantees for electrical control and protection, and improving the reliability and safety of electrical equipment. With the rapid development of intelligent electrical appliances, the use of low-voltage electrical appliances has increased rapidly, and their safety and reliability need to be guaranteed. Therefore, low-voltage electrical appliances must be tested and qualified before use. Among them, the short-circuit performance test is an important test to verify the performance of low-voltage electrical appliances, which mainly includes short-circuit connection capacity test, short-circuit breaking capacity test and short-circuit load capacity test.

[0003] Over the years, there has been relatively little research on low-voltage electrical test systems at home and abroad, and the focus has been on the research of high-voltage electrical test systems. The test certification requirements and prices of foreign low-voltage electrical test equipment are relatively high, and domestic tests mainly rely on electrical research institutes and testing institutions. At present, the existing low-voltage test circuits in China mainly use the power grid as the test power supply, such as the test circuit described in the invention patent "A low-voltage electrical appliance switching capacity test system based on fieldbus control technology". Since it needs to be connected to the high-voltage power grid, it is relatively complicated to build this test circuit. In order to meet the needs of different test currents and voltages of various low-voltage electrical appliances, the transformer needs to be greatly reduced in voltage and the resistance value needs to change frequently, which brings great challenges to the accuracy of test parameter adjustment. In addition, when the test fails to open, it will have a greater impact on the power grid and have a serious impact on the safety and power supply quality of the power system. Therefore, the application and use of the power grid as the test power supply for testing has become increasingly restricted, which has also led to more expensive test costs. In addition, staff frequently test electrical equipment under the high-voltage power grid, which is very dangerous. Because various test circuits need to consider closing and closing at the zero crossing of the test signal when connecting and disconnecting the switch to prevent current mutations from damaging the system. The "Application Research of Phase Selection and Closing Technology of Switchgear" in Hubei Electric Power News analyzed the phase selection and closing technology and its control strategy, but there are still deficiencies in the research on phase detection and closing control. In order to promote the development of the domestic low-voltage electrical appliance industry and the standardization of low-voltage electrical appliance testing, it is necessary to design an intelligent, economical, safe, and widely suitable test system for various low-voltage electrical appliances. Summary of the invention

[0004] In view of the deficiencies in the prior art, the present invention provides a dual-power supply low-voltage electrical appliance test system based on WTD-VMD-ZCD phase selection control closing. Specifically, the present invention relates to a test system for short-circuit making capacity test, short-circuit breaking capacity test and short-circuit carrying capacity test of low-voltage electrical appliance switches, which automates and intelligentizes the low-voltage electrical appliance test process, and at the same time solves the problems of test power supply electrical parameters, test effect standardization and test costs of existing test systems.

[0005] To achieve the above-mentioned object, the present invention provides a dual-power supply low-voltage electrical appliance test system based on WTD-VMD-ZCD phase selection control closing, the system includes a test voltage source circuit, a capacitor charging and discharging circuit, a test current source circuit and a main control module; the main control module includes a main controller, a power module, a switch control module, a data acquisition and processing module, a communication module and a safety alarm module; the control method of the dual-power supply low-voltage electrical appliance test system based on WTD-VMD-ZCD phase selection control closing includes the following steps:

[0006] Step 1: Use the wavelet threshold denoising algorithm (WTD) to denoise and reconstruct the measured test voltage source signal x(t) to obtain the reconstructed test voltage source signal x1(t);

[0007] Step 2: Use the Black Kite Optimization Algorithm (BKA) to optimize the parameters of the variational mode decomposition (VMD) to obtain the optimal number of modes K and penalty factor α;

[0008] Step 3: Use the optimized VMD to decompose the signal x1(t) to obtain K IMF components;

[0009] Step 4: Calculate the correlation between the IMF component and the reconstructed test voltage source signal x1(t), and select the IMF component with a correlation higher than the set threshold as the denoised test voltage source signal x2(t);

[0010] Step 5: Perform zero-crossing detection (ZCD) on the denoised test voltage source signal x2(t), detect the zero-crossing time t, determine the phase of the signal, determine the opening and closing time of the switch by calculation, and realize the logical control of the timing connection of the test voltage source and the test current source.

[0011] Furthermore, the test voltage source circuit is composed of a test voltage source, a voltage source protection resistor R3, a protection switch K2, a voltage sensor VS, and a low-voltage electrical appliance test switch TS connected in sequence; the test voltage source is composed of an electric voltage regulator M, an isolation transformer T2, and a closing switch K1; and the voltage sensor VS is an AC voltage sensor for collecting test voltage source signals.

[0012] Furthermore, the capacitor charging and discharging circuit is composed of an isolation transformer T2, two groups of rectifier diodes D1 and D2, a capacitor stack Cs, a charging and discharging resistor and a charging and discharging switch; the capacitor stack Cs is composed of capacitors Cs1 and Cs2 connected in series.

[0013] Furthermore, the test current source loop is composed of an LC oscillation test current source, a current sensor CS, a low-voltage electrical appliance test switch TS, a closing switch K3 and a protection switch K4 connected in sequence; the LC oscillation test current source is composed of a capacitor stack Cs and an inductor Ls connected; the current sensor CS is a Rogowski coil for collecting test current signals.

[0014] Furthermore, the switch control module performs capacitor charging and discharging control and test timing logic control via a switch control board.

[0015] Furthermore, the data acquisition and processing module includes a data acquisition part and a data processing part.

[0016] Furthermore, the communication module includes a main controller that sets a serial communication mode with an A / D converter through a serial peripheral interface SPI to read the result after AD conversion; the communication module also includes an RS-485 communication that completes the interactive function between the peripheral interface and the host computer.

[0017] Furthermore, the safety alarm module includes two parts: a preset alarm threshold function and a system emergency stop button function.

[0018] Furthermore, in step 1, the coif3 wavelet basis, 3 decomposition levels, a fixed threshold (sqtwolog) function and a soft threshold function are used to decompose, denoise and reconstruct the test voltage source signal x(t).

[0019] Furthermore, in step 2, the BKA algorithm optimizes the parameters of VMD using the minimum envelope entropy as the fitness function.

[0020] Furthermore, in step 3, the optimized VMD decomposes the signal x1(t) into K modal components u k , calculate the single-sided spectrum and estimate the center frequency w for each mode k , get the baseband, then calculate the square norm of the baseband gradient and estimate the bandwidth of each mode to get the variational constraint model, then introduce the quadratic penalty factor α and the Lagrangian multiplication operator λ, turn it into an unconstrained variational problem, get the augmented Lagrangian expression, and use the multiplication operator alternating direction method to iteratively update the expression u k 、w k , λ, until the relative error e is less than the convergence error ε.

[0021] Furthermore, in step 4, the correlation between the IMF component and the reconstructed test voltage source signal is calculated, and the IMF component with a correlation higher than the set threshold value 0.95 is selected as the denoised test voltage source signal x2(t) using a loop statement and a conditional statement.

[0022] Furthermore, in step 5, the ZCD algorithm uses a rising zero-crossing detection method to detect the positive and negative time points before and after the signal x2(t), thereby judging the rising zero-crossing moment t, determining the phase of the signal, and determining the opening and closing time of the switch by calculation. The switches K1 and K3 are turned on and off according to the opening and closing time and the test timing logic, thereby realizing the test of the low-voltage electrical appliance.

[0023] The present invention also provides a method for using a dual-power low-voltage electrical appliance test system based on WTD-VMD-ZCD phase selection control closing, comprising the following steps:

[0024] (1) After the test system is powered on, the functional initialization steps are executed, including the setting of relevant registers, clearing of variables and initialization of communication protocols. In addition, the main control switch device of the test circuit is initialized;

[0025] (2) The lower computer of the main controller establishes communication with the upper computer and waits for it to send a test parameter command. After receiving the test parameters, the charging action is performed, and the charging status is fed back to the upper computer in real time until charging is completed;

[0026] (3) Start the test operation, automatically save the test data and upload it to the host computer to generate a spreadsheet. After the test is completed, the main controller will perform the capacitor discharge operation and reset the loop main control switch to facilitate the execution of the next test.

[0027] Compared with the prior art, the present invention has the following technical advantages:

[0028] (1) Based on the test of low-voltage electrical appliances, the present invention designs a dual-power supply test circuit which is different from the previous single-power supply test circuit. The test circuit more accurately simulates the voltage and current state of the low-voltage electrical appliances under actual conditions.

[0029] (2) The present invention comprises an electric voltage regulator and an isolation transformer to form a test voltage source, and an LC oscillation circuit to form a test current source. The test circuit is simple to construct and has low cost.

[0030] (3) The present invention adopts a method of transformer transformation and using the positive and negative half-waves of alternating voltage to charge the capacitor stack Cs respectively, thereby improving the charging efficiency and solving the demand for test current in low-voltage electrical appliance testing. At the same time, the test current source is equipped with a capacitor discharge switch, which can release the remaining electrical energy of the capacitor after the test, thereby ensuring the safety of the operator.

[0031] (4) The present invention adopts a dual denoising method of wavelet threshold denoising and variational modal decomposition to effectively filter out the noise in the test voltage source signal, and then selects the modal component in conjunction with correlation calculation to obtain the denoised test voltage source signal. This method does not change the phase of the processed signal and is very suitable for denoising the single-frequency sinusoidal test voltage source signal. Then, the opening and closing time of the switch is determined by zero-crossing detection, thereby realizing precise control of the dual power supply for low-voltage electrical appliance testing.

[0032] (5) The safety alarm module of the test system of the present invention monitors the test process to ensure that the test is automatically and safely carried out and stopped in an emergency.

[0033] (6) The present invention meets the requirements of low-voltage electrical appliances on test power supply parameters and test quality, realizes precise control of the test, and has low cost, simple system construction and easy operation. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 The present invention is a dual-power supply low-voltage electrical appliance test system schematic diagram of a dual-power supply low-voltage electrical appliance test system based on WTD-VMD-ZCD phase selection control closing.

[0035] Figure 2 The invention discloses a WTD-VMD-ZCD phase selection opening and closing control flow chart of a dual-power low-voltage electrical appliance test system based on WTD-VMD-ZCD phase selection control closing.

[0036] Figure 3 It is a schematic diagram of a main control module of a dual-power low-voltage electrical appliance test system based on WTD-VMD-ZCD phase selection control closing of the present invention. DETAILED DESCRIPTION

[0037] like Figures 1 to 3 As shown, the present invention provides a dual-power low-voltage electrical appliance test system based on WTD-VMD-ZCD phase selection control closing, the system includes a test voltage source circuit, a capacitor charging and discharging circuit, a test current source circuit and a main control module; the main control module includes a main controller, a power module, a switch control module, a data acquisition and processing module, a communication module and a safety alarm module;

[0038] The test voltage source circuit is composed of a test voltage source, a voltage source protection resistor R3, a protection switch K2, a voltage sensor VS, and a low-voltage electrical appliance test switch TS connected in sequence; the test voltage source is composed of an electric voltage regulator M, an isolation transformer T2, and a closing switch K1; the voltage sensor VS is an AC voltage sensor used to collect test voltage source signals.

[0039] Specifically, the test voltage source is jointly regulated by the electric voltage regulator M and the isolation transformer T2 to obtain the voltage value required for the test, generating a sinusoidal test voltage source signal with an operating frequency of 50 Hz, which is controlled by the closing switch K1. The test voltage source signal is passed through the voltage source protection resistor R3 and the protection switch K2 into the low-voltage electrical appliance test switch TS, and then the test voltage source signal is collected by the AC voltage sensor VS.

[0040] The capacitor charging and discharging circuit is composed of an isolation transformer T2, two groups of rectifier diodes D1 and D2, a capacitor stack Cs, a charging and discharging resistor and a charging and discharging switch; the capacitor stack Cs is composed of capacitors Cs1 and Cs2 connected in series.

[0041] Specifically, the capacitor charging and discharging circuit includes a capacitor charging process and a capacitor charging and discharging process. The capacitor charging process uses an alternating voltage to charge the capacitor stack Cs according to the positive and negative half-waves respectively. The discharge switch S3 is in the open state, and the charging switches S1 and S2 are closed successively. The positive half-wave current of the charging voltage charges the capacitor Cs1 through D1, S2, Cs1, and R1 in sequence, and the negative half-wave current of the charging voltage charges the capacitor Cs2 through R1, Cs2, S2, and D2 in sequence. After charging to the required voltage value, the switches S1 and S2 are immediately disconnected, so that the capacitors Cs1 and Cs2 are charged, completing the capacitor charging process; the capacitor discharging process is achieved by closing the discharge switch S3, and the capacitor stack Cs is discharged through R2 and S3.

[0042] The test current source loop is composed of an LC oscillation test current source, a current sensor CS, a low-voltage electrical appliance test switch TS, a closing switch K3 and a protection switch K4 connected in sequence; the LC oscillation test current source is composed of a capacitor stack Cs and an inductor Ls connected; the current sensor CS is a Rogowski coil for collecting test current signals.

[0043] Specifically, the LC oscillation test current source adopts an LC oscillation circuit that can store energy generated when the circuit resonates. The LC oscillation circuit is equivalent to the discharge of the capacitor to the inductor and the resistance in the closed loop. Because the resistance in the oscillation loop is small, it is mainly the wire body resistance and contact loss resistance. Therefore, when this part of the consumption is ignored, the relationship between the discharge current I and the charging voltage U of the test current source is as follows:

[0044]

[0045] Where B is the attenuation ratio, which is set to 1.2 here, L is the inductance value, C is the capacitance value, and I is the effective value of the test current;

[0046] The frequency relationship of the test current source is as follows:

[0047]

[0048] By properly configuring the parameters of the capacitor stack Cs and the inductor Ls, a sinusoidal power frequency test current signal with an initial phase of zero required for the test can be oscillated and then collected by the current sensor CS.

[0049] The switch control module performs capacitor charging and discharging control and test timing logic control via a switch control board.

[0050] Specifically, the switch control module performs capacitor charge and discharge control and test timing logic control by the switch control board. The capacitor charge and discharge control realizes the charge and discharge process of the capacitor stack Cs by controlling the charge and discharge switches S1, S2 and S3; the test timing logic control controls the dual power supply to provide the test voltage and test current according to the opening and closing time and the test timing logic.

[0051] The data acquisition and processing module includes a data acquisition part and a data processing part.

[0052] Specifically, the acquisition part collects the test voltage source signal and the test current signal based on high-precision voltage sensors and current sensors, processes them through the signal conditioning circuit, and then outputs them to the main controller after A / D conversion; the data processing part includes signal denoising and zero-crossing detection steps to determine the time of opening and closing the switch, and records and saves the test signals at the same time, thereby verifying the validity and reliability of the test voltage and test current.

[0053] The communication module includes a main controller that sets a serial communication mode through a serial peripheral interface SPI and an A / D converter to read the result after AD conversion; the communication module also includes an RS-485 communication that completes the interactive function between the peripheral interface and the host computer.

[0054] Specifically, the communication module uses wired connection to achieve interconnection and communication functions with the test system, and uses the host computer to monitor and control the charging and discharging process of the capacitor and the test process of the low-voltage electrical appliance.

[0055] The safety alarm module includes two parts: a preset alarm threshold function and a system emergency stop button function.

[0056] Specifically, the test process is monitored by the control module. If it is detected that the test data exceeds the preset alarm threshold, the preset alarm threshold function is triggered, all switches are immediately cut off and an alarm prompt is issued; the system emergency stop button function is used to manually stop the test system in an emergency, and its priority is set to the highest priority. When the signal of the emergency stop button being pressed is received, the opening action of the protection switch in the test circuit is immediately executed to ensure the safety of the operator and the test system.

[0057] The control method of the dual-power low-voltage electrical appliance test system based on WTD-VMD-ZCD phase selection control closing includes the following steps:

[0058] Step 1: Use the wavelet threshold denoising algorithm (WTD) to denoise and reconstruct the measured test voltage source signal x(t) to obtain the reconstructed test voltage source signal x1(t);

[0059] Step 2: Use the Black Kite Optimization Algorithm (BKA) to optimize the parameters of the variational mode decomposition (VMD) to obtain the optimal number of modes K and penalty factor α;

[0060] Step 3: Use the optimized VMD to decompose the signal x1(t) to obtain K IMF components;

[0061] Step 4: Calculate the correlation between the IMF component and the reconstructed test voltage source signal x1(t), and select the IMF component with a correlation higher than the set threshold as the denoised test voltage source signal x2(t);

[0062] Step 5: Perform zero-crossing detection (ZCD) on the denoised test voltage source signal x2(t), detect the zero-crossing time t, determine the phase of the signal, determine the opening and closing time of the switch by calculation, and realize the logical control of the timing connection of the test voltage source and the test current source.

[0063] The step 1 uses the coif3 wavelet basis, 3 decomposition levels, a fixed threshold (sqtwolog) function and a soft threshold function to decompose, denoise and reconstruct the test voltage source signal x(t).

[0064] Specifically, step 1 is as follows:

[0065] Step 1-1: Determine the wavelet basis function coif3 and the decomposition layer number 3, perform wavelet decomposition on x(t) under the test voltage source signal, and obtain the wavelet coefficients;

[0066]

[0067] In the formula, a β+1 (n) is the low-frequency approximation coefficient, b β+1 (n) is the high-frequency detail coefficient, h is the low-pass filter coefficient, g is the high-pass filter coefficient, β is the number of decomposition levels, n represents the number of sampling points, c = 1, 2, ..., n-1;

[0068] Step 1-2: Select the fixed threshold (sqtwolog) function and the soft threshold function to perform threshold processing on the wavelet coefficients;

[0069] Specifically, the fixed threshold (sqtwolog) function is as follows:

[0070]

[0071] Where, σ is the standard deviation of the wavelet coefficients at each layer, and N is the length of the wavelet detail coefficients at each level;

[0072] Specifically, the soft threshold function is as follows:

[0073]

[0074] In the formula, ω and ω λ are the wavelet coefficients before and after denoising, λ is the threshold, and sgn(*) is the sign function;

[0075] Step 1-3: Use the denoised wavelet coefficients to reconstruct the signal, and obtain the reconstructed test voltage source signal x1(t) through inverse wavelet transform.

[0076] In step 2, the BKA algorithm optimizes the parameters of VMD using the minimum envelope entropy as the fitness function.

[0077] Specifically, the BKA algorithm first initializes the population size, maximum number of iterations, variable dimension, and the position of the black-winged kite and its upper and lower limits. The position is the initial value of the VMD parameter to be optimized. Then, the signal is initially decomposed by VMD, and the minimum envelope entropy is selected as the fitness function. The fitness value of the black-winged kite at each position is explored through the attack and migration behaviors of the black-winged kite, so as to determine the optimal parameters of VMD according to the minimum fitness value. The fitness function is as follows:

[0078]

[0079] Where a(i) is the envelope signal of the modal component of the initial VMD decomposition after Hilbert demodulation, and p i is the normalized form of a(i), N is the signal length, E p is the envelope entropy.

[0080] In step 3, the optimized VMD decomposes the signal x1(t) into K modal components u k , calculate the single-sided spectrum and estimate the center frequency w for each mode k , get the baseband, then calculate the square norm of the baseband gradient and estimate the bandwidth of each mode to get the variational constraint model, then introduce the quadratic penalty factor α and the Lagrangian multiplication operator λ, turn it into an unconstrained variational problem, get the augmented Lagrangian expression, and use the multiplication operator alternating direction method to iteratively update the expression u k 、w k , λ, until the relative error e is less than the convergence error ε.

[0081] Specifically, step 3 is as follows:

[0082] Step 3-1: Decompose the signal into K modal component signals and calculate each modal component u through Hilbert transform k (t) and estimate a center frequency w for each modal component. k , multiply the single-sided spectrum by Convert to baseband:

[0083]

[0084] Where δ(t) is the unit impulse function and * is the convolution;

[0085] Step 3-2: Calculate the square norm of the baseband gradient and estimate the bandwidth corresponding to each modal component to obtain the following variational constraint problem model:

[0086]

[0087] In the formula, st is the constraint condition, f(t) is the noisy signal to be decomposed;

[0088] Step 3-3: Introducing the quadratic penalty factor α and the Lagrangian multiplication operator λ(t), it becomes an unconstrained variational problem. The augmented Lagrangian expression is as follows:

[0089]

[0090] In the formula, k is the number of iterations, and <*> is the inner product operation;

[0091] Step 3-4: Use the multiplication operator alternating direction method to iterate the augmented Lagrangian expression and update u k 、w k , λ, until the relative error e is less than the convergence error ε, u k 、w k The formulas for , λ and the first convergence condition are as follows:

[0092]

[0093]

[0094]

[0095]

[0096] Where f(ω) is the Fourier transform of f(t), u i (ω) is u i (t), λ(ω) is the Fourier transform of λ(t, τ is the noise tolerance parameter, and ε is the convergence tolerance.

[0097] In step 4, the correlation between the IMF component and the reconstructed test voltage source signal is calculated, and a loop statement and a conditional statement are used to select the IMF component with a correlation higher than a set threshold value of 0.95 as the denoised test voltage source signal x2(t).

[0098] Specifically, the correlation calculation formula is as follows:

[0099]

[0100] Where x1(t) is the reconstructed test voltage source signal, u k (t) represents the kth IMF component, and N is the signal length.

[0101] In step 5, the ZCD algorithm uses a rising zero-crossing detection method to detect the positive and negative time points before and after the signal x2(t), thereby judging the rising zero-crossing moment t, determining the phase of the signal, and determining the opening and closing time of the switch by calculation. According to the opening and closing time and the test timing logic, the switches K1 and K3 are turned on and off, thereby realizing the test of the low-voltage electrical appliance.

[0102] Specifically, the calculation formula for the opening and closing time t′ is as follows:

[0103] t'=t+nT;

[0104] Where t is the zero-crossing time of the detection, and the period T = 1 / f u , f u is the power frequency of the test voltage, and n is a positive integer.

[0105] The specific test operation process of the test system of the present invention is as follows: First, after the test system is powered on, it is necessary to perform a function initialization step, which mainly includes the setting of relevant registers, variable clearing and communication protocol initialization, etc., in addition to which, it also includes initialization operation of the main control switch device of the test loop. Secondly, the lower computer of the main controller establishes communication with the upper computer and waits for it to send a test parameter command. After receiving the test parameters, the charging action is performed, and the charging state process is fed back to the upper computer in real time until the charging is completed. Then, the test operation is started, and the test data is automatically saved and uploaded to the upper computer to generate an electronic spreadsheet. After the test is completed, the main controller will perform the discharge operation of the capacitor and reset the loop main control switch to facilitate the execution of the next test.

[0106] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention rather than to limit it. Although the present invention has been described in detail with reference to the above embodiments, ordinary technicians in the relevant field should understand that the specific implementation methods of the present invention can still be modified or replaced by equivalents, and any modifications or equivalent replacements that do not depart from the spirit and scope of the present invention should be included in the scope of the claims of the present invention.

Claims

1. A dual-power low-voltage electrical appliance test system based on WTD-VMD-ZCD phase selection control closing, characterized in that: It includes a test voltage source circuit, a capacitor charging and discharging circuit, a test current source circuit and a main control module; The main control module includes a main controller, a power module, a switch control module, a data acquisition and processing module, a communication module and a safety alarm module; The control method of the dual-power low-voltage electrical appliance test system based on WTD-VMD-ZCD phase selection control closing includes the following steps: Step 1: Use the wavelet threshold denoising algorithm (WTD) to denoise and reconstruct the measured test voltage source signal x(t) to obtain the reconstructed test voltage source signal x1(t); Step 2: Use the Black Kite Optimization Algorithm (BKA) to optimize the parameters of the variational mode decomposition (VMD) to obtain the optimal number of modes K and penalty factor α; Step 3: Use the optimized VMD to decompose the signal x1(t) to obtain K IMF components; Step 4: Calculate the correlation between the IMF component and the reconstructed test voltage source signal x1(t), and select the IMF component with a correlation higher than the set threshold as the denoised test voltage source signal x2(t); Step 5: Perform zero-crossing detection (ZCD) on the denoised test voltage source signal x2(t), detect the zero-crossing time t, determine the phase of the signal, determine the opening and closing time of the switch by calculation, and realize the logical control of the timing connection of the test voltage source and the test current source.

2. A dual-power low-voltage electrical appliance test system based on WTD-VMD-ZCD phase selection control closing as claimed in claim 1, characterized in that: The test voltage source circuit is composed of a test voltage source, a voltage source protection resistor R3, a protection switch K2, a voltage sensor VS, and a low-voltage electrical appliance test switch TS connected in sequence.

3. A dual-power low-voltage electrical appliance test system based on WTD-VMD-ZCD phase selection control closing as claimed in claim 1, characterized in that: The capacitor charging and discharging circuit is composed of an isolation transformer T2, two groups of rectifier diodes D1 and D2, a capacitor stack Cs, a charging and discharging resistor and a charging and discharging switch.

4. A dual-power low-voltage electrical appliance test system based on WTD-VMD-ZCD phase selection control closing as claimed in claim 1, characterized in that: The test current source loop is composed of an LC oscillation test current source, a current sensor CS, a low-voltage electrical appliance test switch TS, a closing switch K3 and a protection switch K4 connected in sequence.

5. A dual-power low-voltage electrical appliance test system based on WTD-VMD-ZCD phase selection control closing as claimed in claim 1, characterized in that: The step 1 uses the coif3 wavelet basis, 3 decomposition levels, a fixed threshold function and a soft threshold function to decompose, denoise and reconstruct the test voltage source signal x(t).

6. A dual-power low-voltage electrical appliance test system based on WTD-VMD-ZCD phase selection control closing as claimed in claim 1, characterized in that: In step 2, the BKA algorithm optimizes the parameters of VMD using the minimum envelope entropy as the fitness function.

7. A dual-power low-voltage electrical appliance test system based on WTD-VMD-ZCD phase selection control closing as claimed in claim 1, characterized in that: In step 3, the optimized VMD decomposes the signal x1(t) into K modal components u k , calculate the single-sided spectrum and estimate the center frequency w for each mode k , get the baseband, then calculate the square norm of the baseband gradient and estimate the bandwidth of each mode to get the variational constraint model, then introduce the quadratic penalty factor α and the Lagrangian multiplication operator λ, turn it into an unconstrained variational problem, get the augmented Lagrangian expression, and use the multiplication operator alternating direction method to iteratively update the expression u k 、w k , λ, until the relative error e is less than the convergence error ε.

8. A dual-power low-voltage electrical appliance test system based on WTD-VMD-ZCD phase selection control closing as claimed in claim 1, characterized in that: In step 4, the correlation between the IMF component and the reconstructed test voltage source signal is calculated, and a loop statement and a conditional statement are used to select the IMF component with a correlation higher than a set threshold value of 0.95 as the denoised test voltage source signal x2(t).

9. A dual-power low-voltage electrical appliance test system based on WTD-VMD-ZCD phase selection control closing as claimed in claim 1, characterized in that: In step 5, the ZCD algorithm uses a rising zero-crossing detection method to detect the positive and negative time points before and after the signal x2(t), thereby judging the rising zero-crossing moment t, determining the phase of the signal, and determining the opening and closing time of the switch by calculation. According to the opening and closing time and the test timing logic, the switches K1 and K3 are turned on and off, thereby realizing the test of the low-voltage electrical appliance.

10. A method for using a dual-power low-voltage electrical appliance test system based on WTD-VMD-ZCD phase selection control closing according to any one of claims 1 to 9, characterized in that: The following steps are involved: (1) After the test system is powered on, the functional initialization steps are executed, including the setting of relevant registers, clearing of variables and initialization of communication protocols. In addition, the main control switch device of the test circuit is initialized; (2) The lower computer of the main controller establishes communication with the upper computer and waits for it to send a test parameter command. After receiving the test parameters, the charging action is performed, and the charging status is fed back to the upper computer in real time until charging is completed; (3) Start the test operation, automatically save the test data and upload it to the host computer to generate a spreadsheet. After the test is completed, the main controller will perform the capacitor discharge operation and reset the loop main control switch to facilitate the execution of the next test.

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