Single-pole double-throw switch circuit and switch chip
By introducing an isolation cancellation unit into the single-pole double-throw switch circuit, and using phase correction technology to offset the leakage signals on the switch branch, the problems of increased losses caused by the increase in isolation in the prior art and limited applicable scenarios are solved, and the effects of high isolation and wide-band transmission are achieved.
Patent Information
- Application Number
- CN202411626212.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-11-14
- Publication Date
- 2025-03-07
AI Technical Summary
When the existing single-pole double-throw switches increase the isolation between the signal input and the closed output, they need to add parallel grounding branches, resulting in increased losses, narrow working bandwidth and large size, and limited applicable scenarios.
A single-pole double-throw switch circuit is designed. By connecting the isolation cancellation unit in parallel between the branch output ends and the output port matching network of the two switching branches, the unit is used to phase correction of the input signal on the switching branch, so that the corrected signal is reversely cancelled with the leakage signal on the switching branch, thereby improving the isolation.
By reducing the signal energy transmitted from the signal input terminal to the signal output terminal connected to the switch branch in the disconnected state, the isolation between the signal input port and the signal output port is significantly improved, and the wideband transmission and miniaturization of the conduction path are realized, thereby expanding the applicable scenarios of single-pole double-throw switches.
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Figure CN119582825A_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of microwave radio frequency communication integrated circuits, and in particular to a single-pole double-throw switch circuit and a switch chip. Background Art
[0002] With the rapid development of wireless communication systems, higher requirements are put forward for monolithic microwave integrated circuits (MMIC) with high data flow. As an important device for controlling the direction of signal flow and improving the isolation between ports in the RF front end, the RF switch is very important. When connecting multiple functional systems, the RF switch usually uses a single-pole double-throw switch to switch multiple functional systems.
[0003] At present, the isolation between the signal input end and the closed output end of the single-pole double-throw switch is low. In order to improve the isolation between the signal input end and the closed output end, the existing single-pole double-throw switch usually adopts multiple parallel grounding branches. However, the existing method of improving the isolation of the single-pole double-throw switch increases the parallel grounding branch, increases the loss, has a narrow working bandwidth, and has a large size, resulting in limited application scenarios of the single-pole double-throw switch. Summary of the invention
[0004] The purpose of the present invention is to overcome the problem that the method of improving the isolation of a single-pole double-throw switch in the prior art requires adding a parallel ground branch, which increases the loss, has a narrow working bandwidth, and is large in size, resulting in insufficient limitations on the application scenarios of the single-pole double-throw switch, and provides a single-pole double-throw switch circuit and a switch chip.
[0005] The technical solution of the present invention provides a single-pole double-throw switch circuit, comprising an isolation compensation unit, a power supply component, a switch main circuit connected to a signal input end, and two symmetrical switch branches connected to a signal output end, wherein the two switch branches are connected in parallel to the output end of the switch main circuit, the control ends of the two switch branches are respectively connected to the power supply component, and at the same time, the power supply component controls one of the switch branches to be turned on and the other switch branch to be turned off.
[0006] The two switch branches each include a branch output end and an output port matching network, one end of the branch output end is connected to the output end of the switch main circuit, and the other end of the branch output end is connected in parallel to the isolation compensation unit and the output port matching network, and the isolation compensation unit is used to perform phase correction on the input signal on the switch branch so that the corrected signal and the leakage signal on the switch branch are offset in anti-phase.
[0007] In one of the optional technical solutions, the isolation compensation unit includes two symmetrical strong coupling circuits, a first inductor and a weak coupling circuit.
[0008] One end of one of the strong coupling circuits is connected to one of the branch output ends, and the other end of one of the strong coupling circuits is connected to the center of the first inductor;
[0009] One end of another of the strongly coupled circuits is connected to another of the branch output ends, and the other end of another of the strongly coupled circuits is connected to the center of the first inductor;
[0010] One end of the weak coupling circuit is connected to the center of the first inductor, and the other end of the weak coupling circuit is grounded.
[0011] In one of the optional technical solutions, the strong coupling circuit includes a first microstrip line and a first capacitor, one end of the first microstrip line is connected to the branch output end, and the other end of the first microstrip line is connected to the center of the first inductor.
[0012] In one of the optional technical solutions, the weak coupling circuit includes a second capacitor and a second inductor, one end of the second capacitor is connected to the center of the first inductor, the other end of the second capacitor is connected to one end of the second inductor, and the other end of the second inductor is grounded.
[0013] In one of the optional technical solutions, the switch main circuit includes a second microstrip line, a third inductor and a third microstrip line connected in series in sequence, the input end of the second microstrip line is connected to the signal input end, and the output end of the third microstrip line is connected in parallel to the two switch branches.
[0014] In one of the optional technical solutions, the switch branch includes a first transistor component and at least one second transistor component, the first transistor component includes a fourth microstrip line, a first transistor, a first resistor and a fifth microstrip line, and the second transistor component includes a sixth microstrip line, a second transistor and a second resistor.
[0015] One end of the fourth microstrip line is connected to the output end of the third microstrip line, and the other end of the fourth microstrip line is connected to the source of the first transistor;
[0016] The gate of the first transistor is connected to one end of the first resistor, the other end of the first resistor is connected to the power supply component, the drain of the first transistor is connected to one end of the fifth microstrip line, the other end of the fifth microstrip line is connected in parallel to one end of the sixth microstrip line, one end of the isolation compensation unit and the output port matching network;
[0017] The other end of the sixth microstrip line is connected to the source of the second transistor, the gate of the second transistor is connected to one end of the second resistor, the other end of the second resistor is connected to the power supply component, and the drain of the second transistor is grounded.
[0018] In one of the optional technical solutions, the power supply assembly includes a first power supply, a second power supply, a third resistor and a fourth resistor.
[0019] One end of the third resistor is connected in parallel to the other end of one of the first resistors and the other end of another of the second resistors, the other end of the third resistor is connected to one end of the first power supply, and the other end of the first power supply is grounded;
[0020] One end of the fourth resistor is connected in parallel to the other end of another first resistor and the other end of one of the second resistors, the other end of the fourth resistor is connected to one end of the second power supply, and the other end of the second power supply is grounded.
[0021] In one of the optional technical solutions, the output port matching network includes a seventh microstrip line, a fourth inductor and an eighth microstrip line.
[0022] One end of the seventh microstrip line is connected to the other end of the fifth microstrip line, the other end of the seventh microstrip line is connected to one end of the fourth inductor, the other end of the fourth inductor is connected to one end of the eighth microstrip line, and the other end of the eighth microstrip line is connected to the signal output end.
[0023] The technical solution of the present invention further provides a switch chip, comprising a chip substrate, on which the single-pole double-throw switch circuit as described above is provided.
[0024] In one of the optional technical solutions, the single-pole double-throw switch circuit is arranged on the chip substrate using a photolithography process.
[0025] After adopting the above technical solution, the following beneficial effects are achieved: by connecting the isolation compensation unit in parallel between the branch output end and the output port matching network of the two switch branches, the isolation compensation unit performs phase correction on the input signal on the switch branch, so that the corrected signal and the leakage signal on the switch branch are reversely offset, reducing the energy of the signal transmitted from the signal input end to the signal output end connected to the switch branch in the disconnected state, and improving the isolation between the signal input port and the signal output port. In addition, the single-pole double-throw switch circuit is set on the chip substrate, so that the switch chip can realize broadband transmission and miniaturization of the conduction path, reduce the volume, and expand the applicable scenarios of the single-pole double-throw switch. BRIEF DESCRIPTION OF THE DRAWINGS
[0026] The disclosure of the present invention will become more easily understood with reference to the accompanying drawings. It should be understood that these drawings are only for illustrative purposes and are not intended to limit the scope of protection of the present invention. In the drawings:
[0027] Figure 1 A schematic diagram of the structure of a single-pole double-throw switch circuit provided by one embodiment of the present invention;
[0028] Figure 2 for Figure 1 Equivalent circuit diagram of
[0029] Figure 3 for Figure 1 Equivalent circuit diagram of the isolation compensation unit;
[0030] Figure 4 It is a simulation effect diagram of the isolation performance from the signal input terminal P1 to the signal output terminal P3 when the single-pole double-throw switch is not connected to the isolation compensation unit;
[0031] Figure 5 It is a simulation effect diagram of the transmission performance from the signal output terminal P4 to the signal output terminal P5 of the isolation compensation unit;
[0032] Figure 6 It is a phase simulation effect diagram from the signal output terminal P4 to the signal output terminal P5 of the isolation compensation unit;
[0033] Figure 7 This is a simulation effect diagram of the isolation performance improvement of the isolation compensation unit from the signal input terminal P1 to the signal output terminal P3;
[0034] Figure 8 A transmission performance simulation effect diagram of the signal input terminal P1 to the signal output terminal P2 of the single-pole double-throw switch circuit provided by the present invention;
[0035] Fig. 9 This is a simulation effect diagram of the isolation performance from the signal input terminal P1 to the signal output terminal P3 of the single-pole double-throw switch circuit provided by the present invention. DETAILED DESCRIPTION
[0036] The specific implementation of the present invention will be further described below in conjunction with the accompanying drawings.
[0037] It is easy to understand that according to the technical solution of the present invention, without changing the essential spirit of the present invention, a variety of structural modes and implementation modes that can be replaced by those skilled in the art can be replaced with each other. Therefore, the following specific implementation modes and drawings are only exemplary descriptions of the technical solution of the present invention, and should not be regarded as the whole of the present invention or as a limitation or restriction to the technical solution of the invention.
[0038] The directional terms such as up, down, left, right, front, back, front, back, top, bottom, etc. mentioned or may be mentioned in this specification are defined relative to the structures shown in the drawings. They are relative concepts and may change accordingly according to different positions and different usage conditions. Therefore, these or other directional terms should not be interpreted as restrictive terms.
[0039] like Figure 1-Figure 3 As shown, a single-pole double-throw switch circuit 10 provided by an embodiment of the present invention includes an isolation compensation unit 11, a power supply component 12, a switch main circuit 13 connected to a signal input terminal P1, and two symmetrical switch branches 14 connected to signal output terminals P2 and P3. The two switch branches 14 are connected in parallel to the output terminal of the switch main circuit 13, and the control terminals of the two switch branches 14 are respectively connected to the power supply component 12. At the same time, the power supply component 12 controls one of the switch branches 14 to be turned on and the other switch branch 14 to be turned off.
[0040] Both switch branches 14 include a branch output end and an output port matching network. One end of the branch output end is connected to the output end of the switch main circuit 13, and the other end of the branch output end is connected in parallel to the isolation compensation unit 11 and the output port matching network. The isolation compensation unit 11 is used to perform phase correction on the input signal on the switch branch 14 so that the corrected signal and the leakage signal on the switch branch 14 are in anti-phase cancellation.
[0041] The single-pole double-throw switch circuit 10 provided in the embodiment of the present invention includes an isolation compensation unit 11 , a power supply component 12 , a switch main circuit 13 and two switch branches 14 .
[0042] The two switch branches 14 each include a branch output terminal and an output port matching network. One end of the branch output terminal of the two switch branches 14 is connected in parallel to the output end of the switch main circuit 13, and the other end of the branch output terminal is connected in parallel to the isolation compensation unit 11 and the output port matching network.
[0043] The power supply component 12 is connected in parallel to the two switch branches 14. The power supply component 12 is used to control the on and off of the two switch branches 14 at the same time, that is, only one switch branch 14 can be on at the same time, and the other switch branch 14 can be off. The power supply component 12 can use two power supplies with different voltages to control the two switch branches 14 respectively, such as one power supply with a voltage of 1V and the other power supply with a voltage of -5V, so that the two switch branches 14 can be controlled to be on and off at the same time.
[0044] The switch main circuit 13 is connected to the signal input terminal P1. The switch main circuit 13 is used to receive the input signal. When the power supply component 12 controls one of the switch branches 14 to be turned on and the other switch branch 14 is turned off, the input signal passes through the switch main circuit 13 and enters the switch branch 14 in the turned-on state, and then passes through one of the branch output terminals and the output port matching network, and finally outputs through the signal output terminal, as shown in FIG. Figure 1 and Figure 2 As shown in FIG. 1 , when the transmission path of the large energy signal is P1→switch main path 13→switch branch 14→signal output terminal P2, since the switch branch 14 is a non-ideal element, the other switch branch 14 in the disconnected state will also have a small energy signal leaking from the signal input terminal P1 to the signal output terminal P3. At this time, by connecting the isolation compensation unit 11 in parallel to the branch output terminals of the two switch branches 14, a signal output path as shown in FIG. Figure 2 The branch signals at ports P4 and P5 shown in the figure have an energy equal to that of the small energy signal transmitted from the signal input port P1 to the microstrip line l. 11 The energy at the node between ′ and the microstrip line l7′ is in the opposite phase, with a phase difference of 180°, so that the branch signal and the leaked small energy signal cancel each other out, reducing the energy of the signal transmitted from the signal input terminal P1 to the signal output terminal P3. However, the conduction path loss is extremely small and can be close to lossless. The transmission loss of the isolation cancellation unit 11 is completely determined by the turn-off path of the single-pole double-throw switch circuit, thereby improving the isolation from the signal input terminal P1 to the signal output terminal P3.
[0045] In this embodiment, by connecting the isolation compensation unit in parallel between the branch output ends of the two switch branches and the output port matching network, the isolation compensation unit performs phase correction on the input signal on the switch branch, so that the corrected signal and the leakage signal on the switch branch are reversed and canceled, thereby reducing the energy of the signal transmitted from the signal input end to the signal output end connected to the switch branch in the disconnected state, and improving the isolation between the signal input port and the signal output port.
[0046] In one embodiment, if Figure 2 and Figure 3 As shown, the isolation compensation unit 11 includes two symmetrical strong coupling circuits 111, a first inductor L1 and a weak coupling circuit 112.
[0047] One end of one of the strong coupling circuits 111 is connected to one of the branch output ends, and the other end of one of the strong coupling circuits 111 is connected to the center of the first inductor L1;
[0048] One end of another strong coupling circuit 111 is connected to another branch output end, and the other end of another strong coupling circuit 111 is connected to the center of the first inductor L1;
[0049] One end of the weak coupling circuit 112 is connected to the center of the first inductor L1 , and the other end of the weak coupling circuit 112 is grounded.
[0050] A central connecting line is led out from the center of the first inductor L1, and the strong coupling circuit 111 and the weak coupling circuit 112 are electrically connected to the central connecting line respectively. The phase is adjusted by the first inductor L1. The strong coupling circuit 111 and the weak coupling circuit 112 jointly realize that the energy of the branch signal is equal to the energy of the leaked small energy signal when it is transmitted from the signal input terminal P1 to the signal output terminal P3. The phase of the branch signal is the same as that of the signal input terminal P1 to the microstrip line l 11 The phases at the nodes between ' and microstrip line l7' are opposite and differ by 180°, so that the branch signal and the leaked small energy signal cancel each other out, reducing the energy of the signal transmitted from the signal input terminal P1 to the signal output terminal P3 and improving the isolation.
[0051] The first inductor L1 can adjust the phase by adjusting the size of the inductor, such as adjusting the number of winding turns or the length of the winding.
[0052] In one embodiment, the strongly coupled circuit 111 includes first microstrip lines l1, l1′ and first capacitors C1, C1′. ′ One end of the first microstrip line l1, l1' is connected to the branch output end, and the other end of the first microstrip line l1, l1' is connected to the center of the first inductor L1.
[0053] The two strongly coupled circuits 111 are symmetrical circuits, that is, the first microstrip line l1 and the first microstrip line l1′, the first capacitor C1 and the first capacitor C1′ are exactly the same. The first microstrip lines l1 and l1′ are used to introduce the large energy signal of one switch branch 14 and the small energy signal of the other switch branch 14 into the isolation compensation path, and adjust the phase, and the conduction path broadband transmission can be achieved through the microstrip line. Among them, the first microstrip lines l1 and l1′ can adjust the phase by adjusting the length of the microstrip line.
[0054] The first capacitors C1 and C1 ′ form a strong coupling capacitor, and together with the weak coupling circuit 112 , ensure that the energy of the branch signal is equal to the energy of the leaked small energy signal when it is transmitted from the signal input terminal P1 to the signal output terminal P3 .
[0055] In one embodiment, if Figure 2 and Figure 3 As shown, the weak coupling circuit 112 includes a second capacitor C2 and a second inductor L2, one end of the second capacitor C2 is connected to the center of the first inductor L1, the other end of the second capacitor C2 is connected to one end of the second inductor L2, and the other end of the second inductor L2 is grounded.
[0056] The second capacitor C2 is electrically connected to the center line of the first inductor L1, and the second capacitor C2 and the second inductor L2 are weakly coupled, and together with the first capacitors C1 and C1', the branch signal energy is equal to the energy of the leaked small energy signal when it is transmitted from the signal input terminal P1 to the signal output terminal P3.
[0057] In one embodiment, if Figure 2 As shown, the switch main circuit 13 includes a second microstrip line l2, a third inductor L3 and a third microstrip line l3 connected in series in sequence, the input end of the second microstrip line l2 is connected to the signal input end P1, and the output end of the third microstrip line l3 is connected to two switch branches 14 in parallel.
[0058] The input signal passes through the second microstrip line l2, the third inductor L3 and the third microstrip line l3 in sequence through the signal input terminal P1. The large energy signal is transmitted to one of the switch branches 14 in the on state, and the small energy signal leaks into the other switch branch 14 in the off state. The branch signal on the isolation cancellation unit 11 and the leaked small energy signal cancel each other, thereby reducing the energy of the signal transmitted from the input signal to the signal output terminal P3, and improving the isolation from the signal input terminal P1 to the signal output terminal P3.
[0059] In one embodiment, if Figure 2 As shown, in order to switch different circuit paths and further improve isolation, the switch branch 14 includes a first transistor component and at least one second transistor component, the first transistor component includes a fourth microstrip line l4, l4', a first transistor M1, M1', a first resistor R1, R1' and a fifth microstrip line l5, l5', the second transistor component includes a sixth microstrip line l6, l6', a second transistor M2, M2' and a second resistor R2, R2',
[0060] One end of the fourth microstrip line l4, l4' is connected to the output end of the third microstrip line l3, and the other end of the fourth microstrip line l4, l4' is connected to the source of the first transistor M1, M1';
[0061] The gate of the first transistor M1, M1′ is connected to one end of the first resistor R1, R1′, the other end of the first resistor R1, R1′ is connected to the power supply component 12, the drain of the first transistor M1, M1′ is connected to one end of the fifth microstrip line l5, l5′, the other end of the fifth microstrip line l5, l5′ is connected in parallel to one end of the sixth microstrip line l6, l6′, one end of the isolation compensation unit 11 and the output port matching network;
[0062] The other end of the sixth microstrip line l6, l6' is connected to the source of the second transistor M2, M2', the gate of the second transistor M2, M2' is connected to one end of the second resistor R2, R2', the other end of the second resistor R2, R2' is connected to the power supply component 12, and the drain of the second transistor M2, M2' is grounded.
[0063] In one embodiment, the power supply assembly 12 includes a first power supply V1, a second power supply V2, a third resistor R3 and a fourth resistor R4.
[0064] One end of the third resistor R3 is connected in parallel to the other end of one of the first resistors R1 and the other end of the other second resistor R2′, the other end of the third resistor R3 is connected to one end of the first power supply V1, and the other end of the first power supply V1 is grounded;
[0065] One end of the fourth resistor R4 is connected in parallel to the other end of the other first resistor R1 ′ and the other end of one of the second resistors R2 , the other end of the fourth resistor R4 is connected to one end of the second power supply V2 , and the other end of the second power supply V2 is grounded.
[0066] The first power source V1 and the second power source V2 provide different supply voltages respectively, for example, the voltage of the first power source V1 is 1V, and the voltage of the second power source V2 is -5V, so that the two switch branches 14 can be controlled to be turned on and off at the same time.
[0067] The third resistor R3 and the fourth resistor R4 are used to limit the current of the first power source V1 and the second power source V2 respectively, so that the voltage of the transistor being turned on or off is a certain value.
[0068] In one embodiment, the output port matching network includes seventh microstrip lines l7, l7', fourth inductors L4, L4' and eighth microstrip lines l8, l8'.
[0069] One end of the seventh microstrip line l7, l7′ is connected to the other end of the fifth microstrip line l5, l5′, the other end of the seventh microstrip line l7, l7′ is connected to one end of the fourth inductor L4, L4′, the other end of the fourth inductor L4, L4′ is connected to one end of the eighth microstrip line l8, l8′, and the other end of the eighth microstrip line l8, l8′ is connected to the signal output terminals P2, P3.
[0070] The seventh microstrip lines l7, l7' are connected in parallel with the first microstrip lines l1, l1' at the branch output ends of the two switch branches 14, so that the branch signals and the leaked small energy signals are offset before the fourth inductors L4, L4', thereby achieving output matching of the fourth inductors L4, L4'.
[0071] In one embodiment, if Figure 2As shown, in order to gradually reduce the energy of the transmission signal and further improve the isolation, the number of the second transistor components is two, and the second transistor components also include the ninth microstrip line l9, l9', the tenth microstrip line l 10 , l 10 ', the third transistor M3, M3', the fifth resistor R5, R5' and the eleventh microstrip line l 11 , l 11 ′,
[0072] One end of the ninth microstrip line l9, l9' is connected to the other end of the fifth microstrip line l5, l5', and the other end of the ninth microstrip line l9, l9' is connected in parallel to the tenth microstrip line l 10 , l 10 ' and the eleventh microstrip line l 11 , l 11 ' one end;
[0073] Tenth microstrip line l 10 , l 10 The other end of the fifth resistor R5 is connected to one end of the fourth resistor R4, and the other end of the fifth resistor R5' is connected to one end of the third resistor R1.
[0074] Eleventh microstrip line l 11 , l 11 The other end of ' is connected to one end of the seventh microstrip line l7, l7'.
[0075] The principle and simulation effect of the single-pole double-throw switch circuit provided by the present invention are described below, specifically as follows:
[0076] The two switch branches 14 are symmetrical circuits, namely, the fourth microstrip line l4-eleventh microstrip line l6 and the fourth microstrip line l4′-eleventh microstrip line l 11 ′ are exactly the same, the first transistor M1-the third transistor M3 are exactly the same as the first transistor M1′-the third transistor M3′, the first resistor R1-the first resistor R5 are exactly the same as the first resistor R1′-the fifth resistor R5′, and the signal output terminal P2 is exactly the same as the signal output terminal P3. Therefore, in order to facilitate analysis and explanation, only the transmission path from the signal input terminal P1 to the signal output terminal P2 is explained, and the signal output terminal P3 is a closed port.
[0077] Initially, the isolation compensation unit 11 composed of the first microstrip line l1, l1′, the first capacitor C1, C1′, the first inductor L1, the second capacitor C2 and the second inductor L2 is discarded. Since the signal input terminal P1 to the signal output terminal P2 is a path, the first transistor M1, the second transistor M2′ and the third transistor M3′ are turned on, and the first transistor M1′, the second transistor M2 and the third transistor M3 are turned off. The input signal passes through the second microstrip line l2, the third inductor L3 and the third microstrip line l3. Since the first transistor M1 is turned on, the input signal passes through the fourth microstrip line l4 and the first transistor M1; since the second transistor M2 and the third transistor M3 are turned off, the input signal is prevented from passing through the sixth microstrip line l6 and the second transistor M2, the tenth microstrip line l 10 The third transistor M3 is short-circuited to the ground, and the input signal passes through the fifth microstrip line l5, the ninth microstrip line l9, the eleventh microstrip line l 11 , the seventh microstrip line l7, the fourth inductor L4 and the eighth microstrip line l8 are transmitted to the signal output terminal P2. For the closed path from the signal input terminal P1 to the signal output terminal P3, the first transistor M1′ is turned off to prevent the input signal from passing through the fourth microstrip line l4′ and the first transistor M1′. However, because the first transistor M1′ is a non-ideal element in actual engineering design and cannot be completely turned off, part of the input signal passes through. At this time, since the second transistor M2′ and the third transistor M3′ are turned on, the leakage signal passing through the first transistor M1′ is short-circuited to the ground through the second transistor M2′ and the third transistor M3′, so that the signal with smaller energy can be transmitted to the signal output terminal P3. Although the isolation from the signal input terminal P1 to the signal output terminal P3 can be improved by short-circuiting the second transistor M2′ and the third transistor M3′ to the ground, the isolation is relatively low. The simulation results of the isolation performance are as follows: Figure 4 As shown, from Figure 4 It can be seen that the frequency with the worst isolation is 20GHz, at which the isolation reaches 40dB.
[0078] according to Figure 3 The isolation compensation unit 11 designed as shown in the figure has a transmission performance simulation effect and a phase simulation effect as shown in the figure. Figure 5 and Figure 6 As shown, from Figure 5 and Figure 6 It can be seen that the transmission loss of the isolation compensation unit 11 at 20 GHz is 40 dB, and the phase of the isolation compensation unit 11 at 20 GHz is ±180°.
[0079] When the single-pole double-throw switch circuit is connected to the isolation compensation unit 11, the simulation effect of the isolation performance improvement from the signal input terminal P1 to the signal output terminal P3, the simulation effect of the transmission performance from the signal input terminal P1 to the signal output terminal P2, and the simulation effect of the isolation performance from the signal input terminal P1 to the signal output terminal P3 are respectively as follows: Figure 7 , Figure 8 and Fig. 9 shown. Figure 7 In the figure, the solid line is the simulation result without the isolation compensation unit 11, and the dotted line is the simulation result with the isolation compensation unit 11 introduced. Figure 7 It can be seen that the introduction of the isolation compensation unit 11 significantly improves the isolation from the signal input terminal P1 to the signal output terminal P3 at 20 GHz, from 40 dB to 70 dB, and the isolation in the range of DC to 20 GHz is 46 dB. Figure 8 and Fig. 9 It can be seen that the operating range of the SPDT switch is DC to 20 GHz, its loss is less than 0.933 dB, the input echo is better than -23.4 dB, the output echo is better than -17.6 dB, and the isolation is better than 50.4 dB, which means that the isolation has been significantly improved.
[0080] The technical solution of the present invention further provides a switch chip, including a chip substrate, on which the single-pole double-throw switch circuit 10 as described above is provided.
[0081] Among them, the chip substrate is a gallium arsenide chip.
[0082] In this embodiment, by setting the single-pole double-throw switch circuit on the chip substrate, the switch chip can achieve wide-band transmission and miniaturization of the conduction path, reduce the volume, and expand the application scenarios of the single-pole double-throw switch.
[0083] In one of the embodiments, the single-pole double-throw switch circuit 10 is arranged on a chip substrate using a photolithography process, so that the switch chip can achieve wide-band transmission and miniaturization of the conduction path, reduce the volume, and expand the application scenarios of the single-pole double-throw switch.
[0084] The above embodiments are only used to illustrate the technical solutions of the embodiments of the present invention, rather than to limit them. Although the embodiments of the present invention are described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some of the technical features therein by equivalents. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.
Claims
1. A single-pole double-throw switch circuit, characterized in that: The device comprises an isolation compensation unit, a power supply component, a switch main circuit connected to a signal input terminal, and two symmetrical switch branches connected to a signal output terminal, wherein the two switch branches are connected in parallel to the output terminal of the switch main circuit, the control terminals of the two switch branches are respectively connected to the power supply component, and the power supply component controls one of the switch branches to be turned on and the other switch branch to be turned off at the same time. The two switch branches each include a branch output end and an output port matching network, one end of the branch output end is connected to the output end of the switch main circuit, and the other end of the branch output end is connected in parallel to the isolation compensation unit and the output port matching network, and the isolation compensation unit is used to perform phase correction on the input signal on the switch branch so that the corrected signal and the leakage signal on the switch branch are offset in anti-phase.
2. The single-pole double-throw switch circuit according to claim 1, characterized in that: The isolation compensation unit includes two symmetrical strong coupling circuits, a first inductor and a weak coupling circuit. One end of one of the strong coupling circuits is connected to one of the branch output ends, and the other end of one of the strong coupling circuits is connected to the center of the first inductor; One end of another of the strongly coupled circuits is connected to another of the branch output ends, and the other end of another of the strongly coupled circuits is connected to the center of the first inductor; One end of the weak coupling circuit is connected to the center of the first inductor, and the other end of the weak coupling circuit is grounded.
3. The single-pole double-throw switch circuit according to claim 2, characterized in that: The strong coupling circuit includes a first microstrip line and a first capacitor, one end of the first microstrip line is connected to the branch output end, and the other end of the first microstrip line is connected to the center of the first inductor.
4. The single-pole double-throw switch circuit according to claim 3, characterized in that: The weak coupling circuit includes a second capacitor and a second inductor, one end of the second capacitor is connected to the center of the first inductor, the other end of the second capacitor is connected to one end of the second inductor, and the other end of the second inductor is grounded.
5. The single-pole double-throw switch circuit according to any one of claims 1 to 4, characterized in that: The switch main circuit includes a second microstrip line, a third inductor and a third microstrip line connected in series in sequence, the input end of the second microstrip line is connected to the signal input end, and the output end of the third microstrip line is connected in parallel to the two switch branches.
6. The single-pole double-throw switch circuit according to claim 5, characterized in that: The switch branch includes a first transistor component and at least one second transistor component, the first transistor component includes a fourth microstrip line, a first transistor, a first resistor and a fifth microstrip line, and the second transistor component includes a sixth microstrip line, a second transistor and a second resistor. One end of the fourth microstrip line is connected to the output end of the third microstrip line, and the other end of the fourth microstrip line is connected to the source of the first transistor; The gate of the first transistor is connected to one end of the first resistor, the other end of the first resistor is connected to the power supply component, the drain of the first transistor is connected to one end of the fifth microstrip line, the other end of the fifth microstrip line is connected in parallel to one end of the sixth microstrip line, one end of the isolation compensation unit and the output port matching network; The other end of the sixth microstrip line is connected to the source of the second transistor, the gate of the second transistor is connected to one end of the second resistor, the other end of the second resistor is connected to the power supply component, and the drain of the second transistor is grounded.
7. The single-pole double-throw switch circuit according to claim 6, characterized in that: The power supply assembly includes a first power supply, a second power supply, a third resistor and a fourth resistor, One end of the third resistor is connected in parallel to the other end of one of the first resistors and the other end of another of the second resistors, the other end of the third resistor is connected to one end of the first power supply, and the other end of the first power supply is grounded; One end of the fourth resistor is connected in parallel to the other end of another first resistor and the other end of one of the second resistors, the other end of the fourth resistor is connected to one end of the second power supply, and the other end of the second power supply is grounded.
8. The single-pole double-throw switch circuit according to claim 7, characterized in that: The output port matching network includes a seventh microstrip line, a fourth inductor and an eighth microstrip line, One end of the seventh microstrip line is connected to the other end of the fifth microstrip line, the other end of the seventh microstrip line is connected to one end of the fourth inductor, the other end of the fourth inductor is connected to one end of the eighth microstrip line, and the other end of the eighth microstrip line is connected to the signal output end.
9. A switch chip, characterized in that: It comprises a chip substrate, on which is arranged the single-pole double-throw switch circuit as claimed in any one of claims 1 to 8.
10. The switch chip according to claim 9, characterized in that: The single-pole double-throw switch circuit is arranged on the chip substrate by using a photolithography process.
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