Method, apparatus and medium for overlay precision compensation

Abstract

The embodiment of the invention provides a method and equipment for overlay precision compensation and a medium. The method comprises the following steps: acquiring an overlay precision diagram representing overlay precision distribution of a certain batch of wafers before exposure; and based on the compensation optimal value used by the batch of wafers, determining a plurality of overlay precision feedback values, corresponding to the plurality of candidate weight values, of the batch of wafers. Then, based on the overlay precision feedback value corresponding to the batch of wafers and the overlay precision diagram, determining a target weight value of a feedback weight; in this way, the optimal feedback weight under the current process characteristics can be determined. And furthermore, a more accurate overlay precision compensation value can be determined by using the optimal feedback weight value, so that the wafer production quality is improved.

Description

Technical Field

[0001] Embodiments of the present disclosure generally relate to the field of integrated circuits, and more particularly, to methods, devices, and media for overlay accuracy compensation. Background Art

[0002] With the rapid development of integrated circuit manufacturing technology, the process nodes of traditional integrated circuits are gradually reduced, and the size of integrated circuit devices is constantly shrinking. The wafer manufacturing process is to accurately transfer the patterns on the layout or mask of different layers to the wafer at a certain reduction ratio through the photolithography process. Specifically, the devices and structures of the chip can be formed layer by layer through the generation process. In the wafer manufacturing process, the requirements for the overlay accuracy between different stacked layers (also called different film layers) are getting higher and higher. If the pattern in the current layer is not aligned with the pattern in the previous layer or the alignment accuracy is poor, it will affect the normal operation of the integrated circuit chip, and in severe cases, it will even cause the integrated circuit chip to be scrapped. Summary of the invention

[0003] In a first aspect of the present disclosure, a method for overlay accuracy compensation is provided. In the method, a first overlay accuracy map corresponding to a first batch of wafers is obtained; based on the compensation optimal value for the first batch of wafers and multiple candidate weight values ​​of the feedback weight, multiple overlay accuracy feedback values ​​for the first batch of wafers are determined; and based on the multiple overlay accuracy feedback values ​​and the first overlay accuracy map, a target weight value of the feedback weight is determined for overlay accuracy compensation of subsequent batches of wafers of the first batch of wafers.

[0004] In a second aspect of the present disclosure, an electronic device is provided. The electronic device includes a processor and a memory coupled to the processor. The memory has instructions stored therein, and when the instructions are executed by the processor, the electronic device executes the method for generating an overlay mark pattern according to the first aspect of the present disclosure.

[0005] In a third aspect of the present disclosure, a computer-readable storage medium is provided. The computer-readable storage medium stores a computer program. When the computer program is executed by a processor, the method for generating an overlay mark pattern according to the first aspect of the present disclosure is implemented.

[0006] According to some embodiments of the present disclosure, an overlay accuracy map characterizing the overlay accuracy distribution of a batch of wafers before exposure is obtained. Based on the optimal compensation value used for the batch of wafers, multiple overlay accuracy feedback values ​​corresponding to the batch of wafers and multiple candidate weight values ​​are determined. Subsequently, based on the overlay accuracy feedback values ​​and the overlay accuracy map corresponding to the batch of wafers, the feedback weights are optimized. In this way, the optimal feedback weights under the current process characteristics can be determined. Furthermore, a more accurate overlay accuracy compensation value can be determined using the optimal feedback weight value, thereby improving the wafer production quality.

[0007] It should be understood that the contents described in the summary of the present invention are not intended to limit the key features or important features of the embodiments of the present disclosure, nor are they intended to limit the scope of the present disclosure. Other features of the present disclosure will become easily understood through the following description. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] The above and other features, advantages and aspects of the embodiments of the present disclosure will become more apparent with reference to the following detailed description in conjunction with the accompanying drawings. In the accompanying drawings, the same or similar reference numerals represent the same or similar elements, wherein: Figure 1 A schematic diagram showing an example environment in which various embodiments of the present disclosure can be implemented; Figure 2 A schematic diagram showing a first example process for overlay accuracy compensation according to some embodiments of the present disclosure is shown; Figure 3 A schematic diagram showing overlay accuracy measurement results according to some embodiments of the present disclosure; Figure 4 A schematic diagram showing a first overlay accuracy map according to some embodiments of the present disclosure; Figure 5 A schematic diagram showing a second difference according to an embodiment of the present disclosure; Figure 6 A schematic diagram showing a second example process for overlay accuracy compensation according to some embodiments of the present disclosure; and Figure 7 A block diagram of an electronic device is shown in which one or more embodiments of the present disclosure may be implemented. DETAILED DESCRIPTION

[0009] Embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although certain embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be construed as being limited to the embodiments described herein, which are instead provided for a more thorough and complete understanding of the present disclosure. It should be understood that the drawings and embodiments of the present disclosure are only for exemplary purposes and are not intended to limit the scope of protection of the present disclosure.

[0010] In the description of the embodiments of the present disclosure, the term "including" and similar terms should be understood as open inclusion, that is, "including but not limited to". The term "based on" should be understood as "based at least in part on". The term "one embodiment" or "the embodiment" should be understood as "at least one embodiment". The terms "first", "second", etc. may refer to different or the same objects. Other explicit and implicit definitions may also be included below.

[0011] With the rapid development of integrated circuit manufacturing technology, the process nodes of traditional integrated circuits are gradually reduced, and the size of integrated circuit devices is constantly shrinking. In the process of integrated circuit manufacturing, the requirements for the overlay accuracy between different stacked layers (also called different film layers) are getting higher and higher. Specifically, the devices and structures of the chip can be formed layer by layer through the generation process. The wafer manufacturing process is to accurately transfer the patterns on the layout or mask of different layers to the wafer at a certain reduction ratio through the photolithography process. In the process of wafer manufacturing, the requirements for the overlay accuracy between different stacked layers (also called different film layers) are getting higher and higher. If the pattern in the current layer is not aligned with the pattern in the previous layer or the alignment accuracy is poor, it will affect the normal operation of the integrated circuit chip, and even cause the integrated circuit chip to be scrapped in severe cases. Therefore, how to improve the overlay accuracy is a problem worthy of attention.

[0012] Currently, most methods are based on the overlay measurement results of wafer patterns, calculate the errors of the process related to wafer manufacturing, and feed the errors back to the Advanced Process Control (APC) to determine the overlay compensation value, thereby improving the overlay accuracy. However, this method cannot adapt to changes in process characteristics (such as layout displacement, expansion, and rotational deformation) during the process. If the process changes, this method will not be able to determine the accurate overlay compensation value.

[0013] To this end, an embodiment of the present disclosure proposes a method for layout marking. According to an embodiment of the present disclosure, based on the corresponding measurement results of the overlay accuracy of the first batch of wafers, a first overlay accuracy map corresponding to the first batch of wafers is determined. Based on the overlay accuracy compensation information related to multiple batches of wafers and multiple candidate weight values ​​of the feedback weight, multiple overlay accuracy feedback values ​​for the first batch of wafers are determined, and the multiple batches of wafers include the first batch of wafers and the preceding batches of wafers of the first batch of wafers. Based on the multiple overlay accuracy feedback values ​​and the first overlay accuracy map, a target weight value of the feedback weight is determined for overlay accuracy compensation of subsequent batches of wafers of the first batch of wafers.

[0014] According to the scheme disclosed in the present invention, an overlay accuracy map characterizing the overlay accuracy distribution of a batch of wafers before exposure is obtained. Based on the optimal compensation value used for the batch of wafers, multiple overlay accuracy feedback values ​​corresponding to the batch of wafers and multiple candidate weight values ​​are determined. Subsequently, based on the overlay accuracy feedback values ​​and the overlay accuracy map corresponding to the batch of wafers, the feedback weights are optimized. In this way, the optimal feedback weights under the current process characteristics can be determined. Furthermore, using the optimal feedback weights, a more accurate overlay accuracy compensation value can be determined, thereby improving the wafer production quality.

[0015] Various example implementations of the scheme will be described in detail below with reference to the accompanying drawings.

[0016] Figure 1 A schematic diagram of an example environment 100 in which various embodiments of the present disclosure can be implemented is shown. The example environment 100 can generally include a layout processing device 110. In some embodiments, the layout processing device 110 can be a device with computing functions such as a personal computer, a workstation, a server, etc. The scope of the present disclosure is not limited in this respect.

[0017] The layout processing device 110 obtains the measurement results about the wafer as input. As an example, the layout processing device 110 can obtain the first measurement result 120 of the first wafer as input. The first measurement result 120 can be a cross-sectional measurement diagram of the first stack or the lower stack of the first wafer. The first stack is a semiconductor material layer after lithography. The layout corresponding to the first stack or the lower stack is also referred to as the first layout. The first layout includes an overlay mark pattern. In the example where the first layout is a layout corresponding to the lower stack, the overlay mark pattern in the first layout is also referred to as a "lower layer overlay mark pattern". The first measurement result 120 may include a measurement result about the overlay mark pattern in the first layout. The first measurement result 120 may indicate one or more geometric parameters in the first layout corresponding to the first stack of the first wafer.

[0018] Alternatively, the first measurement result 120 may also include a measurement result of a second stack or an upper stack of the first wafer. The first measurement result 120 may also include a measurement result of an upper photoresist (PR). The first stack and the second stack in the first wafer are semiconductor layers, respectively.

[0019] As an example, the first measurement result 120 may be a measurement result collected by a device such as a SEM, a projection electron microscope (TEM), an atomic force microscope (AFM), etc. The method for measuring the overlay mark on the wafer may be any existing or future possible measurement method. The embodiments of the present disclosure are not limited in this respect.

[0020] The layout processing device 110 processes the first measurement result 120 to obtain a second layout 130 corresponding to the second stack or the upper stack of the first wafer. The second layout 130 includes an overlay mark pattern. In this document, the layout corresponding to the second stack or the upper stack is also referred to as the second layout. In the example where the second layout is a layout corresponding to the upper stack, the overlay mark pattern in the second layout is also referred to as the "upper layer overlay mark pattern". Alternatively, in some embodiments, the layout processing device 110 can also determine the overlay mark pattern for the first layout based on the first measurement result 120, such as the lower layer overlay mark pattern.

[0021] It should be understood that Figure 1 The shapes, sizes and numbers of various stacks, layouts, masks and overlay mark patterns shown in the various figures listed below are merely exemplary and not restrictive. The scope of the present disclosure is not limited in this respect.

[0022] Will be combined below Figures 2 to 6 Several examples of generating overlay mark patterns in a layout are described in further detail.

[0023] Figure 2 FIG. 2 is a schematic diagram showing a first example process 200 for overlay accuracy compensation according to some embodiments of the present disclosure. In some embodiments, the process 200 may be implemented or included in Figure 1 In the layout processing device 110 shown. It should be understood that the process 200 may also include additional blocks not shown and / or may omit one (or some) of the blocks shown, and the scope of the present disclosure is not limited in this respect.

[0024] Figure 3 FIG. 3 is a schematic diagram showing an overlay accuracy measurement result 300 according to some embodiments of the present disclosure. Figure 3 As shown, the layout processing device 110 determines the first overlay accuracy map 220 corresponding to the first batch of wafers based on the overlay accuracy measurement result 310 of the first batch of wafers. The first batch of wafers can be any batch of wafers in the wafer production process. The layout processing device 110 determines the overlay accuracy compensation value of the subsequent batch of wafers based on the overlay accuracy compensation value and the measurement result of the batch of wafers to improve the quality of the subsequent batch of wafers.

[0025] The first batch of wafers may include multiple wafers. Accordingly, multiple wafer patterns can be obtained for the first batch of wafers during the lithography process. In some embodiments, the measurement results 210 of the overlay accuracy for the first batch of wafers may include multiple measurement results corresponding to multiple wafer patterns respectively. Accordingly, the first overlay accuracy map corresponding to the first batch of wafers may be multiple. Based on multiple different measurement results, the first overlay accuracy map corresponding to each wafer can be determined. In some embodiments, the measurement results 210 of the overlay accuracy for the first batch of wafers may be the average value of multiple measurement results 210 corresponding to multiple wafer patterns. Based on the average value of multiple measurement results 210 of the first batch of wafers, the first overlay accuracy map corresponding to the wafer patterns included in the first batch of wafers is determined. In this solution, a certain wafer in the first batch of wafers is taken as an example to illustrate process 200.

[0026] The first overlay accuracy graph 220 represents the overlay accuracy distribution of the first batch of wafers before exposure. Figure 4 FIG. 2 is a schematic diagram of a first overlay accuracy graph 220 according to some embodiments of the present disclosure. Figure 4 As shown, the first overlay accuracy map 220 includes the offset vectors of each measurement point in the wafer. For the exposed image of a wafer in the first batch of wafers, the overlay accuracy measurement results 210 of each measurement point on the wafer are obtained. Subsequently, based on the overlay accuracy measurement results 210 and the mask pattern of the wafer, the overlay accuracy measurement feature map corresponding to the wafer is determined. Subsequently, the multiple overlay accuracy measurement feature maps generated for the first batch of wafers are restored to determine the first overlay accuracy map 220. The calculation formula for the restoration calculation can be: ; in Indicates the first set of engraving accuracy diagram 220, Indicates the first batch of wafers used, represents the overlay accuracy measurement result 210 corresponding to the first batch of wafers, the matrix P(⋱) represents the measurement coordinates of the overlay accuracy, and the matrix Represents the first process parameter in the wafer production process, the matrix Represents the second process parameter in the wafer production process.

[0027] In some embodiments, if the overlay accuracy measurement result 210 is an average of measurement results of each wafer in a first batch of wafers, the first overlay accuracy map 220 is determined based on only the overlay accuracy measurement result 210 .

[0028] continue Figure 2, the layout processing device 110 can determine the overlay accuracy feedback value based on the compensation information of the first batch of wafers to provide data support for the update of the feedback weight. Exemplarily, for the compensation optimal value of the first batch of wafers and multiple candidate weight values ​​of the feedback weight, multiple overlay accuracy feedback values ​​for the first batch of wafers are determined. Exemplarily, for each candidate value of the feedback weight, the overlay accuracy feedback value for the first batch of wafers is determined based on the candidate weight value and the compensation optimal value.

[0029] In some embodiments, the overlay accuracy feedback value can be determined based on the compensation information of multiple historical batches of wafers. Multiple historical batches of wafers may include the above-mentioned first batch of wafers and the preceding batch of wafers of the first batch of wafers. Exemplarily, multiple overlay accuracy feedback values ​​for the preceding batch of wafers can be determined based on the optimal compensation value of the preceding batch of wafers of the first batch of wafers. Subsequently, for the candidate weight value among the multiple candidate weight values, based on the optimal compensation value, the historical overlay accuracy feedback value and the candidate weight value, the overlay accuracy feedback value corresponding to the candidate weight value is determined as one of the multiple overlay accuracy feedback values. The historical overlay accuracy feedback value may include multiple overlay accuracy feedback values ​​corresponding to multiple batches of wafers, respectively. For ease of explanation, the optimal compensation value of the first batch of wafers and the multiple overlay accuracy feedback values ​​corresponding to the preceding batch of wafers of the first batch of wafers are collectively referred to as overlay accuracy compensation information below.

[0030] Based on the overlay accuracy compensation information related to the multiple batches of wafers and multiple candidate weight values ​​of the feedback weight, multiple overlay accuracy feedback values ​​for the first batch of wafers are determined. The calculation formula of the overlay accuracy feedback value can be: ; in Indicates The optimal compensation value for a batch of wafers, represents the feedback weight, Indicates the overlay accuracy feedback value.

[0031] No. Optimal compensation value for wafer batches The calculation formula can be: ; in Indicates The unloading compensation value used for the batch of wafers, Indicates The measurement compensation value corresponding to the batch of wafers, represents the coefficient, .

[0032] For a certain wafer, the optimal compensation value 230 may include the optimal compensation values ​​corresponding to different points on the wafer (i.e., the overlay accuracy compensation value that optimizes the overlay accuracy of the wafer). In some embodiments, the optimal compensation value 230 may be determined based on the overlay accuracy compensation value used in manufacturing the first batch of wafers and the overlay accuracy measurement result 210. Exemplarily, when the compensation value used in the manufacturing process of the first batch of wafers is 5, the overlay accuracy measurement result 210 (i.e., the alignment error) is 4. When the compensation value used is 3, the overlay accuracy measurement result 210 (i.e., the alignment error) is 2, then the optimal compensation value 230 for the first batch of wafers may be determined to be 1. In some embodiments, the optimal compensation value 230 for each batch of wafers may be determined using an exponentially weighted moving average (EWMA) method. Exemplarily, for a certain batch of wafers, the historical measurement data of the batch of wafers (including the overlay accuracy measurement results and the corresponding overlay compensation values) is first determined. Based on the determined historical measurement data, the alignment error at each time point (each wafer or each batch) is determined. The EWMA value at each time point is calculated using the EWMA formula, thereby determining the optimal compensation value 230 for the wafer batch.

[0033] In some embodiments, for a candidate weight value among multiple candidate weight values, an overlay accuracy feedback value corresponding to the candidate weight value can be determined based on the overlay accuracy compensation information and the candidate weight value, as one of the multiple overlay accuracy feedback values. In this way, the overlay accuracy feedback value corresponding to the case of selecting different feedback weights 240 is determined, so as to determine the influence of different feedback weights 240 on the overlay accuracy. The candidate weight value can be a value predetermined based on historical process parameters. For example, if the weight values ​​corresponding to the historical process parameters include 2, 4, 6, and 8, these values ​​are used as candidate weight values. The candidate weight value can be a randomly determined value. In some embodiments, the estimated value range of the feedback weight 240 can be determined based on the historical process parameters, and then the candidate weight value is determined from the estimated value range. Exemplarily, if the estimated value range of the feedback weight 240 is an interval of 0 to 1, the candidate weight value is randomly determined from this interval.

[0034] In some embodiments, the layout processing device 110 determines the target weight value 260 of the feedback weight 240 based on multiple overlay accuracy feedback values ​​and the first overlay accuracy map 220, so as to compensate for the overlay accuracy of subsequent batches of wafers for the first batch of wafers. The first overlay accuracy map 220 represents the actual measurement result of the overlay accuracy. Based on multiple overlay accuracy feedback values, multiple simulation results of overlay accuracy can be represented. In some embodiments, based on the difference between the simulation result of overlay accuracy and the actual result of overlay accuracy, the feedback weight 240 that makes the simulated overlay accuracy and the actual overlay accuracy closest can be determined. Further, the overlay accuracy compensation of the subsequent batch of wafers determined based on the feedback weight 240 is more accurate.

[0035] In some embodiments, a target weight value may be determined from a plurality of candidate weight values ​​based on a second difference determined for each of the plurality of candidate weight values. The second difference characterizes the difference between the simulated overlay accuracy and the overlay accuracy corresponding to the target batch of wafers corresponding to each candidate weight value. The target batch of wafers may include the first batch of wafers and the preceding batch of wafers of the first batch of wafers. Exemplarily, for a certain batch of wafers, based on the compensation optimal value and the candidate weight value of the batch of wafers, the overlay accuracy feedback value corresponding to the batch of wafers is determined, and the overlay accuracy feedback value characterizes the simulated overlay accuracy of the batch of wafers. A first overlay accuracy map corresponding to the batch of wafers is determined based on the measurement information of the batch of wafers, and the first overlay accuracy map characterizes the overlay accuracy distribution of the batch of wafers before exposure. Subsequently, based on the difference between the simulated overlay accuracy and the overlay accuracy distribution corresponding to the batch of wafers, the first difference corresponding to the batch of wafers is determined. In some embodiments, for each candidate weight value in the plurality of candidate values, a target overlay accuracy feedback value corresponding to the candidate weight value (i.e., the overlay accuracy feedback value determined using the candidate weight value) is first determined from the plurality of overlay accuracy feedback values. Subsequently, based on the overlay accuracy feedback value corresponding to the candidate value weight among the multiple overlay accuracy feedback values ​​and the first overlay accuracy graph 220, a first difference is determined. The first difference characterizes the difference between the simulated overlay accuracy and the overlay accuracy distribution. The simulated overlay accuracy is determined based on the overlay accuracy feedback value corresponding to the candidate value. Exemplarily, for a certain candidate weight value, the overlay accuracy feedback value 250 corresponding to the candidate weight value is first determined. Subsequently, the simulated overlay accuracy corresponding to the overlay accuracy feedback value 250 is determined. Based on the difference between the simulated overlay accuracy and the overlay accuracy distribution, the loss function is used to determine the first difference corresponding to the candidate weight value. The first difference can be calculated by the following formula: ; in represents the first difference, Indicates The batch engraving accuracy feedback value is 250, the matrix represents a third process parameter in the wafer production process. In some embodiments, a second overlay accuracy map can be determined based on the wafer pattern and the overlay accuracy feedback value 250. The second overlay accuracy map indicates the distribution of simulated overlay accuracy on the wafer, including simulated overlay accuracy vectors of each point on the wafer. Subsequently, based on the difference between the second overlay accuracy map and the first overlay accuracy map 220, a first difference is determined.

[0036] Subsequently, a second difference corresponding to the candidate weight value may be determined based on the first difference and the historical difference information. The second difference may be calculated by the following formula: ; Where SR is the second difference, Indicates the wafer batch, Indicates the batch number of the current wafer. Indicates that for The first differences are obtained between batches of wafers.

[0037] The historical difference information represents a first difference obtained from a previous batch of wafers of the first batch of wafers. The second difference between the simulated overlay accuracy and the actual overlay accuracy corresponding to different feedback weights 240 is determined based on the first difference corresponding to the first batch of wafers and the first difference corresponding to the previous batch of wafers. Subsequently, multiple second differences are determined based on multiple candidate weight values. Figure 5 FIG. 5 is a schematic diagram showing a second difference 500 according to an embodiment of the present disclosure. Figure 5 As shown, different second differences can be determined for different candidate weight values. For multiple different feedback weights 240 , the candidate weight value with the smallest corresponding second difference will be used as the target weight value 260 of the feedback weight 240 .

[0038] In some embodiments, at least one weight value may be determined from a plurality of candidate weight values ​​based on the second difference and preset conditions respectively determined for the plurality of candidate weight values. The preset condition may be that the second difference is less than the difference threshold, or that the second difference corresponding to a candidate weight value is less than the second difference corresponding to other candidate weight values, which is not limited here. In some embodiments, the target weight value 260 may be determined based on the change trend of at least one weight value. In some embodiments, the target weight value 260 may be determined from the candidate weight values, or a value other than the candidate weight value may be determined as the target weight value based on the change trend of the weight value. Exemplarily, if there are three candidate weight values ​​(i.e., the first candidate weight value, the second candidate weight value, and the third candidate weight value) that meet the preset conditions and the three candidate weight values ​​increase in sequence, the second differences corresponding to the three candidate weight values ​​are determined respectively. If the second difference corresponding to the first candidate weight value is greater than the second difference corresponding to the second candidate weight value, and the second difference corresponding to the second candidate weight value is less than the second difference corresponding to the third candidate weight value, it may be determined that the change trend of the second difference corresponding to each candidate weight value is first reduced and then increased, thereby determining that the target weight value 260 is between the first weight value and the third weight value.

[0039] In some embodiments, due to process limitations or the presence of multiple weight values ​​with the same second difference, the weight value corresponding to the smallest second difference may not be used as the feedback weight 240. In this case, the target weight value 260 may be determined based on the user's selection. For example, the change trend of at least one weight value may be presented to the user in the interactive interface. Subsequently, a selection of a weight value in at least one weight value is received, and the selected weight value is determined as the target weight value 260. Figure 5 As shown, the second difference determined when the weight value is 0.2 and the weight value is 0.8 is the smallest, so the weight value 0.2 can be selected as the target weight value 260.

[0040] In some embodiments, the target overlay accuracy feedback value 250 for the first batch of wafers can be determined based on the target weight value 260 of the feedback weight 240 and the optimal compensation value 230 for the first batch of wafers using the feedback calculation model. Based on the target overlay accuracy feedback value, the overlay accuracy compensation value to be used in manufacturing the second batch of wafers is determined, and the second batch of wafers is a subsequent batch of the first batch of wafers. Exemplarily, the optimal compensation value 230 corresponding to the first batch of wafers (i.e., the cargo value used by the first batch of wafers) and the determined target weight are provided to the feedback calculation model (e.g., the overlay process model, etc.). The overlay accuracy feedback value 250 for the first batch of wafers is determined using the feedback calculation model, thereby determining the overlay accuracy compensation value to be used in manufacturing the second batch of wafers. In this way, the optimal compensation value that makes the overlay accuracy of the second batch of wafers the highest is determined based on the historical optimal compensation value through accurate feedback weight values. Thus, by continuously repeating the above process, the overlay accuracy of subsequent batches of wafers is guaranteed, the situation where the overlay accuracy is reduced due to changes in process parameters is prevented, and the wafer production quality is improved.

[0041] Figure 6 FIG. 6 is a schematic diagram of a second example process 600 for overlay accuracy compensation according to some embodiments of the present disclosure. The process 600 may be implemented at the layout processing device 110. Figure 1 600 is described below.

[0042] like Figure 6 As shown, at block 610, a first overlay map corresponding to a first batch of wafers is obtained.

[0043] In some embodiments, the first overlay accuracy map is determined in the following manner: for a target wafer in the first batch of wafers, determining a measurement result corresponding to the target wafer; generating a target overlay accuracy map corresponding to the target wafer based on the measurement result and the wafer pattern on the target wafer; and determining the first overlay accuracy map based on the target overlay accuracy maps generated for the first batch of wafers respectively.

[0044] At block 620 , a plurality of overlay accuracy feedback values ​​for the first batch of wafers are determined based on the compensation optimum value for the first batch of wafers and a plurality of candidate weight values ​​for the feedback weight.

[0045] In some embodiments, determining multiple overlay accuracy feedback values ​​includes: for a candidate weight value among multiple candidate weight values, based on the compensation optimal value and the candidate weight value, determining an overlay accuracy feedback value corresponding to the candidate weight value as one of the multiple overlay accuracy feedback values.

[0046] In some embodiments, determining multiple overlay accuracy feedback values ​​includes: determining a historical overlay accuracy feedback value for a preceding batch of wafers for the first batch of wafers; for a candidate weight value among multiple candidate weight values, based on the optimal compensation value, the historical overlay accuracy feedback value and the candidate weight value, determining an overlay accuracy feedback value corresponding to the candidate weight value as one of the multiple overlay accuracy feedback values.

[0047] In some embodiments, the optimal compensation value is determined by: determining the optimal compensation value based on the overlay accuracy compensation value used in manufacturing the first batch of wafers and the measurement results.

[0048] At block 630 , a target weight value of a feedback weight is determined based on the plurality of overlay accuracy feedback values ​​and the first overlay accuracy map for overlay accuracy compensation of subsequent wafer batches of the first wafer batch.

[0049] In some embodiments, determining a target weight value of a feedback weight includes: for each candidate weight value among a plurality of candidate values, determining a first difference based on an overlay accuracy feedback value corresponding to the candidate value weight among a plurality of overlay accuracy feedback values ​​and a first overlay accuracy map, the first difference characterizing the difference between a simulated overlay accuracy and an overlay accuracy distribution, the simulated overlay accuracy being determined based on the overlay accuracy feedback value corresponding to the candidate value; determining a second difference corresponding to the candidate weight value based on the first difference and historical difference information corresponding to a preceding batch of wafers of the first batch of wafers, the historical difference information characterizing the difference between a simulated overlay accuracy corresponding to a preceding batch of wafers and an overlay accuracy distribution corresponding to the preceding batch of wafers; and determining a target weight value from a plurality of candidate weight values ​​based on the second differences respectively determined for the plurality of candidate weight values.

[0050] In some embodiments, determining a target weight value from a plurality of candidate weight values ​​includes: determining at least one weight value from the plurality of candidate weight values ​​based on a second difference and a preset condition respectively determined for the plurality of candidate weight values; and determining the target weight value based on a change trend of the at least one weight value.

[0051] In some embodiments, determining the target weight value includes: presenting a change trend of at least one weight value; receiving a selection of a weight value from the at least one weight value; and determining the selected weight value as the target weight value.

[0052] In some embodiments, determining the first difference includes: determining a second overlay accuracy map based on the overlay accuracy feedback value, the second overlay accuracy map simulating the distribution of overlay accuracy on the wafer; and determining the first difference based on the difference between the first overlay accuracy map and the second overlay accuracy map.

[0053] In some embodiments, process 600 also includes: determining a target overlay accuracy feedback value for the first batch of wafers based on a target weight value of the feedback weight and an optimal compensation value for the first batch of wafers using a feedback calculation model; and determining an overlay accuracy compensation value to be used for manufacturing a second batch of wafers based on the target overlay accuracy feedback value, the second batch of wafers being a subsequent batch of the first batch of wafers.

[0054] Figure 7 1 is a block diagram of an electronic device 700 in which one or more embodiments of the present disclosure may be implemented. The electronic device 700 may be used to implement, for example, Figure 1 The layout processing device 110 shown. It should be understood that Figure 7 The electronic device 700 shown is merely exemplary and should not constitute any limitation on the functionality and scope of the embodiments described herein.

[0055] like Figure 7 As shown, the electronic device 700 is in the form of a general electronic device. The components of the electronic device 700 may include, but are not limited to, one or more processors 710 or processing units, a memory 720, a storage device 730, one or more communication units 740, one or more input devices 750, and one or more output devices 760. The processing unit may be an actual or virtual processor and is capable of performing various processes according to a program stored in the memory 720. In a multi-processor system, multiple processing units execute computer executable instructions in parallel to improve the parallel processing capability of the electronic device 700.

[0056] The electronic device 700 typically includes a plurality of computer storage media. Such media may be any available media accessible to the electronic device 700, including but not limited to volatile and non-volatile media, removable and non-removable media. The memory 720 may be a volatile memory (e.g., a register, a cache, a random access memory (RAM)), a non-volatile memory (e.g., a read-only memory (ROM), an electrically erasable programmable read-only memory (EEPROM), flash memory), or some combination thereof. The storage device 730 may be a removable or non-removable medium, and may include a machine-readable medium, such as a flash drive, a disk, or any other medium, which may be capable of being used to store information and / or data (e.g., training data for training) and may be accessed within the electronic device 700.

[0057] The electronic device 700 may further include additional removable / non-removable, volatile / non-volatile storage media. Figure 7As shown in , a disk drive for reading or writing from a removable, non-volatile disk (e.g., a "floppy disk") and an optical drive for reading or writing from a removable, non-volatile optical disk may be provided. In these cases, each drive may be connected to the bus (not shown) by one or more data media interfaces. The memory 720 may include a computer program product 725 having one or more program modules that are configured to perform various methods or actions of various embodiments of the present disclosure.

[0058] The communication unit 740 enables communication with other electronic devices via a communication medium. Additionally, the functions of the components of the electronic device 700 can be implemented in a single computing cluster or multiple computing machines that can communicate via a communication connection. Therefore, the electronic device 700 can operate in a networked environment using a logical connection with one or more other servers, a network personal computer (PC), or another network node.

[0059] The input device 750 may be one or more input devices, such as a mouse, a keyboard, a tracking ball, etc. The output device 760 may be one or more output devices, such as a display, a speaker, a printer, etc. The electronic device 700 may also communicate with one or more external devices (not shown) through the communication unit 740 as needed, such as a storage device, a display device, etc., communicate with one or more devices that allow a user to interact with the electronic device 700, or communicate with any device (e.g., a network card, a modem, etc.) that allows the electronic device 700 to communicate with one or more other electronic devices. Such communication may be performed via an input / output (I / O) interface (not shown).

[0060] According to an exemplary implementation of the present disclosure, a computer-readable storage medium is provided, on which one or more computer instructions are stored, wherein the one or more computer instructions are executed by a processor to implement the method described above.

[0061] Various aspects of the present disclosure are described herein with reference to flowcharts and / or block diagrams of methods, devices (systems) and computer program products implemented according to the present disclosure. It should be understood that each box in the flowchart and / or block diagram and the combination of boxes in the flowchart and / or block diagram can be implemented by computer-readable program instructions.

[0062] These computer-readable program instructions can be provided to a processing unit of a general-purpose computer, a special-purpose computer, or other programmable data processing device, thereby producing a machine, so that when these instructions are executed by the processing unit of the computer or other programmable data processing device, a device that implements the functions / actions specified in one or more boxes in the flowchart and / or block diagram is generated. These computer-readable program instructions can also be stored in a computer-readable storage medium, and these instructions cause the computer, programmable data processing device, and / or other equipment to work in a specific manner, so that the computer-readable medium storing the instructions includes a manufactured product, which includes instructions for implementing various aspects of the functions / actions specified in one or more boxes in the flowchart and / or block diagram.

[0063] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device so that a series of operating steps are performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions executed on the computer, other programmable data processing apparatus, or other device to implement the functions / actions specified in one or more boxes in the flowchart and / or block diagram.

[0064] The flow chart and block diagram in the accompanying drawings show the possible architecture, function and operation of the system, method and computer program product according to multiple implementations of the present disclosure. In this regard, each square box in the flow chart or block diagram can represent a part of a module, program segment or instruction, and a part of a module, program segment or instruction includes one or more executable instructions for realizing the logical function of the specification. In some implementations as replacements, the function marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two continuous square boxes can actually be executed substantially in parallel, and they can sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be realized by a special hardware-based system that performs the function or action of the specification, or can be realized by a combination of special hardware and computer instructions.

[0065] The above descriptions of various implementations of the present disclosure are exemplary, non-exhaustive, and not limited to the disclosed implementations. Many modifications and variations will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described implementations. The selection of terms used herein is intended to best explain the principles of the implementations, practical applications, or improvements to the technology in the marketplace, or to enable other persons of ordinary skill in the art to understand the implementations disclosed herein.

Claims

1. A method for overlay accuracy compensation, comprising: Obtaining a first set of engraving accuracy maps corresponding to the first batch of wafers; Determining a plurality of overlay accuracy feedback values ​​for the first batch of wafers based on the compensation optimal value for the first batch of wafers and a plurality of candidate weight values ​​of the feedback weight; as well as Based on the multiple overlay accuracy feedback values ​​and the first overlay accuracy map, a target weight value of the feedback weight is determined for overlay accuracy compensation of subsequent batches of wafers of the first batch of wafers.

2. The method according to claim 1, characterized in that Determining the multiple overlay accuracy feedback values ​​includes: For a candidate weight value among the multiple candidate weight values, based on the compensation optimal value and the candidate weight value, an overlay accuracy feedback value corresponding to the candidate weight value is determined as one of the multiple overlay accuracy feedback values.

3. The method according to claim 1, characterized in that: Determining the target weight value of the feedback weight includes: For each candidate weight value in the plurality of candidate values, Determine a first difference based on the overlay accuracy feedback value corresponding to the candidate value weight among the multiple overlay accuracy feedback values ​​and the first overlay accuracy map, wherein the first difference represents a difference between a simulated overlay accuracy and the overlay accuracy distribution, and the simulated overlay accuracy is determined based on the overlay accuracy feedback value corresponding to the candidate value; Determining a second difference corresponding to the candidate weight value based on the first difference and historical difference information corresponding to a previous batch of wafers of the first batch of wafers, the historical difference information representing a difference between the simulated overlay accuracy corresponding to the previous batch of wafers and the overlay accuracy distribution corresponding to the previous batch of wafers; and The target weight value is determined from the plurality of candidate weight values ​​based on the second differences respectively determined for the plurality of candidate weight values.

4. The method according to claim 3, characterized in that Determining the target weight value from the plurality of candidate weight values ​​comprises: determining at least one weight value from the plurality of candidate weight values ​​based on the second differences and preset conditions respectively determined for the plurality of candidate weight values; and The target weight value is determined based on a change trend of the at least one weight value.

5. The method according to claim 1, characterized in that The first set of engraving accuracy maps is determined by: For a target wafer in the first batch of wafers, determining a measurement result corresponding to the target wafer; Based on the measurement result and the wafer pattern on the target wafer, generating a target overlay accuracy map corresponding to the target wafer; as well as The first overlay accuracy map is determined based on the target overlay accuracy maps generated for the first batch of wafers.

6. The method according to claim 1, characterized in that The method further comprises: Determining a target overlay accuracy feedback value for the first batch of wafers using a feedback calculation model based on the target weight value of the feedback weight and the optimal compensation value for the first batch of wafers; and Based on the target overlay accuracy feedback value, an overlay accuracy compensation value to be used in manufacturing a second batch of wafers is determined, where the second batch of wafers is a subsequent batch of the first batch of wafers.

7. The method according to claim 3, characterized in that Determining the first difference includes: Based on the overlay accuracy feedback value, determining a second overlay accuracy map, wherein the second overlay accuracy map simulates the distribution of overlay accuracy on the wafer; and The first difference is determined based on a difference between the first overlay accuracy map and the second overlay accuracy map.

8. The method according to claim 1, characterized in that The optimal compensation value is determined as follows: The optimal compensation value is determined based on the overlay accuracy compensation value used in manufacturing the first batch of wafers and the measurement result.

9. The method according to claim 4, characterized in that Determining the target weight value includes: presenting the change trend of the at least one weight value; receiving a selection of a weight value from the at least one weight value; and The selected weight value is determined as the target weight value.

10. The method according to claim 1, characterized in that Determining the multiple overlay accuracy feedback values ​​includes: Determining a historical overlay accuracy feedback value for a preceding batch of wafers of the first batch of wafers; and For a candidate weight value among the multiple candidate weight values, based on the optimal compensation value, the historical overlay accuracy feedback value and the candidate weight value, an overlay accuracy feedback value corresponding to the candidate weight value is determined as one of the multiple overlay accuracy feedback values.

11. An electronic device, comprising: processor; as well as A memory coupled to the processor, the memory having instructions stored therein, the instructions causing the device to perform the method according to any one of claims 1 to 10 when executed by the processor.

12. A computer-readable storage medium having a computer program stored thereon, wherein the program, when executed by a processor, implements the method according to any one of claims 1 to 10.

Images