Broadband harmonic suppression matching circuit, power amplifier and power amplifier module

Abstract

The invention provides a broadband harmonic suppression matching circuit, a power amplifier and a power amplifier module, and the broadband harmonic suppression matching circuit comprises a first harmonic suppression and biasing circuit and a second harmonic suppression and biasing circuit, comprising a first circuit element and a ground capacitor which constitute a bias circuit, a second circuit element and a third circuit element which are connected with the first circuit element and constitute a resonant network, and the sum of the electrical lengths of the first circuit element and the second circuit element is lambda / 6; the second harmonic suppression and fundamental wave impedance matching circuit comprises a multi-order LC resonance network, the multi-order LC resonance network comprises a fourth circuit element and a fifth circuit element which are connected with the third circuit element in series, and the fourth circuit element and the fifth circuit element are used for completing in-band fundamental wave impedance matching; wherein each circuit element is a microstrip line or a lumped element.

Description

Technical Field

[0001] The present application relates to the technical field of power amplifiers, and in particular to a broadband harmonic suppression matching circuit, a broadband harmonic suppression power amplifier, and a power amplifier module. Background Art

[0002] The power amplifier is the module that consumes the most energy in the RF transceiver. Its performance determines the degree of energy saving and emission reduction of the overall system. The main indicators of the power amplifier are divided into three categories: efficiency, power gain and linearity. Among them, the power gain represents the amplification capacity of a power amplifier. The improvement of efficiency can effectively save energy and reduce environmental pollution. Linearity represents the quality of the signal transmitted by the power amplifier. Since the power amplifier mainly works in the nonlinear region, a large number of harmonic components will be generated in the saturated working state, which will have an important impact on the overall linearity of the system. Summary of the invention

[0003] In order to solve the existing technical problems, the present application provides a broadband harmonic suppression matching circuit, a power amplifier and a power amplifier module with a compact circuit structure, reduced insertion loss and improved linearity.

[0004] In a first aspect, a broadband harmonic suppression matching circuit is provided, comprising:

[0005] A first harmonic suppression and bias circuit, comprising a first circuit element and a grounding capacitor constituting a bias circuit, a second circuit element and a third circuit element connected to the first circuit element and constituting a resonant network, wherein the sum of the electrical lengths of the first circuit element and the second circuit element is λ / 6;

[0006] A second harmonic suppression and fundamental impedance matching circuit comprises a multi-order LC resonant network, wherein the multi-order LC resonant network comprises a fourth circuit element and a fifth circuit element connected in series with the third circuit element, wherein the fourth circuit element and the fifth circuit element are used to complete in-band fundamental impedance matching;

[0007] Wherein, each circuit element is a microstrip line or a lumped element.

[0008] In a second aspect, a broadband harmonic suppression power amplifier is provided, comprising a power amplifier and a matching network connected to the power amplifier;

[0009] Wherein, the matching network is the broadband harmonic suppression matching circuit described in any embodiment of the present application.

[0010] In a third aspect, a power amplifier module is provided, including a chip and a packaging substrate, wherein the chip or the packaging substrate is provided with a broadband harmonic suppression power amplifier as described in any embodiment of the present application.

[0011] The broadband harmonic suppression matching circuit provided in the above embodiment, in the first harmonic suppression and bias circuit, the first circuit element and the grounding capacitor constitute a bias circuit, and the sum of the electrical lengths of the first circuit element and the second circuit element is λ / 6, which can generate a third harmonic well point for suppressing the third harmonic, and at the same time, the second circuit element and the third circuit element constitute a resonant network for suppressing the second harmonic; the second harmonic suppression and fundamental impedance matching circuit, including a multi-order LC resonant network, can suppress higher-order harmonics, and in the multi-order LC resonant network, the fourth circuit element and the fifth circuit element connected in series with the third circuit element in the first harmonic suppression and bias circuit are used to complete the in-band fundamental impedance matching; in this way, the first harmonic suppression The setting of the bias circuit, through the combination of the first circuit element, the second circuit element, the third circuit element and the fourth circuit element, not only provides bias, but also suppresses the second and third harmonics. The setting of the second harmonic suppression and fundamental impedance matching circuit, through the multi-order LC resonant network, achieves higher-order harmonic suppression while completing broadband fundamental impedance matching. On the one hand, the broadband harmonic suppression matching circuit has a more compact circuit structure as a whole, which can reduce the insertion loss caused by the matching circuit itself and improve the output capacity of the power amplifier. On the other hand, microstrip lines can be used in the broadband harmonic suppression matching circuit to reduce the requirements for processing accuracy, and it has good suppression characteristics for both low-order and high-order harmonics, achieving higher linearity.

[0012] The broadband harmonic suppression power amplifier and power amplifier module provided in the above embodiments belong to the same concept as the corresponding broadband harmonic suppression matching circuit embodiments, and thus have the same technical effects as the corresponding broadband harmonic suppression matching circuit embodiments, and will not be described in detail here. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 is a schematic diagram of a known harmonic suppression matching circuit.

[0014] Figure 2 4 is a circuit module diagram of a broadband harmonic suppression matching circuit in one embodiment.

[0015] Figure 3 Schematic diagram of a broadband harmonic suppression matching circuit in one embodiment.

[0016] Figure 4 FIG. 4 is a circuit diagram of a broadband harmonic suppression matching circuit in another embodiment.

[0017] Figure 5 FIG. 4 is a circuit diagram of a broadband harmonic suppression matching circuit in yet another embodiment.

[0018] Figure 6 FIG. 4 is a circuit diagram of a broadband harmonic suppression matching circuit in yet another embodiment.

[0019] Figure 7 FIG. 4 is a circuit diagram of a broadband harmonic suppression matching circuit in yet another embodiment.

[0020] Figure 8 FIG. 4 is a schematic diagram of the circuit insertion loss performance of a broadband harmonic suppression matching circuit in an embodiment.

[0021] Fig. 9 The following is a harmonic performance index table of a power amplifier using a broadband harmonic suppression matching circuit in an embodiment.

[0022] Fig.10 FIG. 4 is a schematic diagram of a power amplifier circuit in an embodiment.

[0023] Fig.11 Schematic diagram of a power amplifier module in one embodiment. DETAILED DESCRIPTION

[0024] The technical solution of the present invention is further described in detail below in conjunction with the accompanying drawings and specific embodiments.

[0025] In order to make the purpose, technical solutions and advantages of the present application clearer, the present application will be further described in detail below in conjunction with the accompanying drawings. The described embodiments should not be regarded as limiting the present application. All other embodiments obtained by ordinary technicians in the field without making creative work are within the scope of protection of this application.

[0026] In the following description, the expression "some embodiments" is involved, which describes a subset of all possible embodiments. It should be noted that "some embodiments" may be the same subset or different subsets of all possible embodiments, and may be combined with each other without conflict.

[0027] It should also be noted that when an element is referred to as being "fixed to" another element, it may be directly on the other element or there may also be a central element. When an element is considered to be "connected to" another element, it may be directly connected to the other element or there may be a central element at the same time. The terms "vertical", "horizontal", "inside", "outside", "left", "right" and similar expressions used herein are only for the purpose of explanation in conjunction with the embodiments of the accompanying drawings and do not represent the only implementation method.

[0028] With the development of mobile communication technology, signal modulation methods have become increasingly complex, which requires power amplifiers to achieve higher linearity and high efficiency. In the study of how to improve the linearity and high efficiency requirements of power amplifiers, the inventors of this application conducted the following analysis and research on the implementation method of improving linearity by adding a harmonic suppression network to the output matching circuit of a high-efficiency power amplifier.

[0029] like Figure 1 As shown, a typical output matching circuit consists of three parts, namely a bias circuit 11, a harmonic suppression circuit 12 and a fundamental impedance matching circuit 13. Among them, the bias circuit 11 is used to isolate the RF energy and power the power amplifier through the DC power supply VCC. The harmonic suppression circuit 12 is generally placed close to the power amplifier transistor to suppress high-order harmonics. After the harmonic suppression circuit 12, a fundamental impedance matching circuit 13 is usually added to achieve high efficiency and high power transmission within the band.

[0030] At present, for the design of the typical output matching circuit, the harmonic suppression circuit 12 usually adopts lumped elements or special structures to form a circuit module that is relatively independent of the bias circuit and the fundamental impedance matching circuit, so as to realize the low-pass filtering characteristics or introduce the resonance point to achieve the purpose of harmonic suppression. However, such a scheme mainly has the following aspects that deserve improvement: First, in the RF power amplifier, a λ / 4 impedance inverter is generally used as the bias line to realize the fundamental open circuit and the second harmonic short circuit. This method has limited bandwidth and has limitations in broadband design; second, the filtering structure adopted by most schemes often has high requirements for line width accuracy, which is difficult to process in practice; third, directly adding the harmonic suppression network will make the circuit more complex and bring unnecessary insertion loss.

[0031] Based on the above analysis and research, the inventors of the present application proposed a design concept of combining low-order harmonic suppression with a DC bias circuit and combining high-order harmonic suppression with a fundamental impedance matching circuit. It was proposed to combine low-order harmonic suppression with a DC bias circuit to form a first harmonic suppression and bias circuit 21, and to combine high-order harmonic suppression with a fundamental impedance matching circuit to form a second harmonic suppression and fundamental impedance matching circuit 22. The first harmonic suppression and bias circuit 21 and the second harmonic suppression and fundamental impedance matching circuit 22 form a broadband harmonic suppression matching circuit 20, so as to reduce circuit complexity, eliminate unnecessary insertion loss, reduce limitations in broadband design, and effectively improve linearity.

[0032] See also Figure 2, a broadband harmonic suppression matching circuit 20 provided in an embodiment of the present application, the broadband harmonic suppression matching circuit 20 includes: a first harmonic suppression and bias circuit 21, including a first circuit element 211 and a grounding capacitor C1 constituting a bias circuit, a second circuit element 212 and a third circuit element 213 connected to the first circuit element 211 and constituting a resonant network, the sum of the electrical lengths of the first circuit element 211 and the second circuit element 212 is λ / 6; a second harmonic suppression and fundamental impedance matching circuit 22, including a multi-order LC resonant network, the multi-order LC resonant network including a fourth circuit element 214 and a fifth circuit element 215 connected in series with the third circuit element 213, the fourth circuit element 214 and the fifth circuit element 215 are used to complete in-band fundamental impedance matching; wherein each circuit element is a microstrip line or a lumped element.

[0033] A lumped component refers to a component in which, under ideal conditions, the electromagnetic processes in the circuit are concentrated inside the component, the size of the component is much smaller than the wavelength of the circuit's operating frequency, and it can be ideally equivalent to a point. Lumped components can be regarded as an idealized model in circuit analysis. Its parameters such as impedance, capacitive reactance, and inductive reactance are concentrated at various points in space, and the signals between points are transmitted instantaneously. Lumped components usually include passive components such as resistors, capacitors, and inductors. In actual circuits, they can only be approximated as lumped components when the size of the corresponding circuit component is much smaller than the electromagnetic wavelength when the circuit is operating.

[0034] Microstrip line is a microwave transmission line composed of a single conductor strip, usually set on a dielectric substrate with a grounded metal layer on the other side. Microstrip line is suitable for making planar transmission line structures for microwave integrated circuits. It has the advantages of small size, light weight, wide frequency band and high reliability.

[0035] Electrical length refers to the ratio of the physical length of the microstrip transmission line to the wavelength of the transmitted electromagnetic wave.

[0036] The first harmonic suppression and bias circuit 21, for the first circuit element 211, the second circuit element 212 and the third circuit element 213, respectively selects the type selection and parameter design of microstrip line or lumped element, which can be determined based on the conditions that the first circuit element 211 and the grounding capacitor C1 form a bias circuit, the second circuit element 212 and the third circuit element 213 form a resonant network for second harmonic suppression, and the sum of the electrical lengths of the first circuit element 211 and the second circuit element 212 is λ / 6 to form a parallel resonant network for third harmonic suppression.

[0037] In-band fundamental impedance matching refers to ensuring that the impedance of the circuit to the fundamental signal matches the input impedance of the load within a wide frequency range when designing the circuit, so as to minimize the reflection and loss of the signal during transmission and improve the efficiency and stability of signal transmission. The second harmonic suppression and fundamental impedance matching circuit 22, the fourth circuit element 214 and the fifth circuit element 215 respectively select the type selection and parameter design of microstrip line or lumped element, and the fourth circuit element 214 and the fifth circuit element 215 can be formed as needed. The conditions for completing the in-band fundamental impedance matching are determined.

[0038] In the broadband harmonic suppression matching circuit 20 provided in the above embodiment, the setting of the first harmonic suppression and bias circuit 21, through the combination of the first circuit element 211, the second circuit element 212, the third circuit element 213 and the fourth circuit element 214, not only provides bias, but also suppresses the second harmonic and the third harmonic, thereby combining the low-order harmonic suppression with the DC bias circuit to form the first harmonic suppression and bias circuit 21; the setting of the second harmonic suppression and fundamental impedance matching circuit 22, through the multi-order LC resonant network, achieves higher-order harmonic suppression while completing broadband fundamental impedance matching, thereby combining the high-order harmonic suppression with the fundamental impedance matching circuit to form the second harmonic suppression and fundamental impedance matching circuit 22. In this way, on the one hand, the broadband harmonic suppression matching circuit 20 has a more compact circuit structure as a whole, which can reduce the insertion loss caused by the matching circuit itself in the method of setting a matching circuit independent of the bias circuit and the fundamental impedance matching circuit, and improve the output capacity of the power amplifier. On the other hand, microstrip lines can be used in the broadband harmonic suppression matching circuit 20 to reduce the requirements for processing accuracy. By integrating low-order harmonic suppression and high-order harmonic suppression with the bias circuit and the fundamental impedance matching circuit respectively, it has good suppression characteristics in the low-order and high-order harmonic ranges and achieves higher linearity.

[0039] Optionally, the first harmonic suppression and bias circuit 21 includes a DC power supply VCC, a grounding capacitor C1 connected between the electrode ground of the DC power supply VCC; one end of the first circuit element 211 is connected to the first node 201 between the DC power supply VCC and the grounding capacitor C1, and the other end is connected to the second node 202 between the second circuit element 212 and the third circuit element 213; the third circuit element 213 is connected between the second node 202 and the electrode ground. The grounding capacitor C1 is selected as a large capacitor, such as a capacitance of more than 10pF. The first circuit element 211 is grounded through the grounding capacitor C1, which can be used to suppress the leakage of radio frequency energy. The DC power supply VCC is grounded through the grounding capacitor C1, which can filter out the AC component in the branch where the DC power supply VCC supplies power to the power amplifier. The series connection of the first circuit element 211 and the second circuit element 212 can be combined into a λ / 6 microstrip line to provide a third harmonic well point, and the second circuit element 212 and the grounded third circuit element 213 form a parallel resonant network, thereby simultaneously achieving the suppression of the second and third low-order harmonics. In an optional specific example, the design of the first harmonic suppression and bias circuit 21 can select the frequency point of the lower edge of the frequency band as the microstrip line reference frequency according to the design bandwidth, select any microstrip line with an electrical length less than λ / 6 as the first circuit element 211, and achieve grounding by selecting a grounding capacitor C1 of more than 1010pF. Then, the electrical length of the second circuit element 212 is determined according to the electrical length of the first circuit element 211, and the third circuit element 213 is added to complete the secondary and tertiary low-order harmonic suppression and bias circuit design through parameter tuning.

[0040] Optionally, the multi-order LC resonant network further includes a sixth circuit element 216 for grounding the fourth circuit element 214, and a seventh circuit element 217 for grounding the fifth circuit element 215; wherein the fourth circuit element 214 and the sixth circuit element 216 form a first-order LC resonant network, and the fifth circuit element 215 and the seventh circuit element 217 form a first-order LC resonant network. In the multi-order LC resonant network, the fourth circuit element 214, the fifth circuit element 215, the sixth circuit element 216, and the seventh circuit element 217 form a second-order LC resonant network, a resonant point is introduced to achieve fourth and fifth harmonic suppression, and the parameter values ​​of the fourth circuit element 214 and the fifth circuit element 215 are optimized to achieve in-band fundamental impedance matching.

[0041] In some embodiments, see Figure 4 and Figure 5 The first circuit element 211 and the second circuit element 212 are microstrip lines or inductive lumped elements respectively; the third circuit element 213 is a capacitive lumped element.

[0042] like Figure 4As shown, the first circuit element 211 is the first microstrip line TL1, the second circuit element 212 is the second microstrip line TL2, and the third circuit element 213 is the second grounding capacitor C2. A short-circuit stub with an electrical length less than λ / 6, that is, the first microstrip line TL1 is used as a bias line. The first microstrip line TL1 is grounded with a large-capacitance grounding capacitor C1 to suppress radio frequency energy leakage. At the same time, it is combined with the series inductive element second microstrip line TL2 to form λ / 6 to provide a third harmonic well point. The first microstrip line TL1 and the second grounding capacitor C2 form a parallel resonant network to achieve second and third harmonic suppression.

[0043] like Figure 5 As shown, the first circuit element 211 is the first inductor L1, the second circuit element 212 is the second inductor L2, and the third circuit element 213 is the second grounding capacitor C2. By replacing the traditional narrowband bias circuit composed of a λ / 4 impedance inverter with the first inductor L1, an inductive lumped element participating in matching, and using the grounding capacitor C1 instead, broadband RF energy suppression is achieved. Furthermore, the first inductor L1 and the second inductor L2, a series tuning element, are combined to provide a third harmonic short-circuit point, and the third harmonic impedance trajectory is limited to the vicinity of the short-circuit point. At the same time, the first inductor L1, the grounding capacitor C1 and the second grounding capacitor C2 form a parallel resonant circuit to achieve second harmonic suppression.

[0044] In some embodiments, one of the first circuit element 211 and the second circuit element 212 is a microstrip line, and the other is an inductive lumped element; the third circuit element 213 is a microstrip line. In the first harmonic suppression and bias circuit 21, except for the grounding capacitor C1 that forms a bias circuit with the first circuit element 211, other grounding capacitors can be replaced with microstrip lines, wherein the microstrip line occupies a larger area and has a smaller loss, while the grounding capacitor C1 has a smaller size and a larger loss; the series inductor and the high characteristic impedance microstrip line can be replaced with each other, and the series inductor also has the characteristics of smaller size and greater insertion loss compared to the microstrip line.

[0045] In some embodiments, the fourth circuit element 214 and the fifth circuit element 215 are microstrip lines or inductive lumped elements, respectively, and the sixth circuit element 216 and the seventh circuit element 217 are grounded capacitive lumped elements or microstrip lines, respectively.

[0046] like Figure 4 As shown, the fourth circuit element 214 is the third microstrip line TL3, the fifth circuit element 215 is the fourth microstrip line TL4, the sixth circuit element 216 is the third grounding capacitor C3, and the seventh circuit element 217 is the fourth grounding capacitor C4, wherein the third grounding capacitor C3 and the third microstrip line TL3, and the fourth grounding capacitor C4 and the fourth microstrip line TL4 form a second-order LC resonant network to achieve fourth and fifth high-order harmonic suppression while completing broadband fundamental impedance matching.

[0047] like Figure 5 As shown, the fourth circuit element 214 is the third inductor L3, the fifth circuit element 215 is the fourth inductor L4, the sixth circuit element 216 is the third grounding capacitor C3, and the seventh circuit element 217 is the fourth grounding capacitor C4, wherein the third grounding capacitor C3 and the third inductor L3, the fourth grounding capacitor C4 and the fourth inductor L4 form a second-order LC resonant network to achieve fourth and fifth high-order harmonic suppression while completing broadband fundamental impedance matching.

[0048] Optional, such as Figure 6 As shown, the sixth circuit element 216 and the seventh circuit element 217 are respectively microstrip lines, and the grounding capacitor C1 in the second harmonic suppression and fundamental impedance matching circuit 22 is replaced by a microstrip line, wherein the microstrip line occupies a larger area and has a smaller loss, while the grounding capacitor C1 is smaller in size and has a greater loss, and can be selected based on design requirements such as the insertion loss size, size requirements, and processing accuracy requirements of the broadband harmonic suppression matching circuit 20.

[0049] In some embodiments, Figure 7 As shown, the sixth circuit element 216 and the seventh circuit element 217 are respectively microstrip lines, and the second harmonic suppression and fundamental impedance matching circuit 22 further includes an eighth circuit element TL7 connected to the node between the fourth circuit element 214 and the sixth circuit element 216, and a ninth circuit element TL8 connected to the node between the fifth circuit element 215 and the seventh circuit element 217; the eighth circuit element TL7 and the ninth circuit element TL8 are respectively microstrip lines. Among them, in the second harmonic suppression and fundamental impedance matching circuit 22, the fourth circuit element 214 constituting the second-order LC resonant network is the third microstrip line TL3, the fifth circuit element 215 is the fourth microstrip line TL4, the sixth circuit element 216 is the fifth microstrip line, and the fifth circuit element 215 is the sixth microstrip line, and the seventh microstrip line and the eighth microstrip line are connected in parallel with the fourth circuit element 214 and the fifth circuit element 215, so that the adjustable optimization capability of the broadband harmonic suppression matching circuit 20 can be improved.

[0050] In some embodiments, the second harmonic suppression and fundamental impedance matching circuit 22 also includes a DC blocking capacitor C5 connected in series between the fifth circuit element 215 and the input impedance; the self-resonant frequency of the DC blocking capacitor C5 is at the center frequency. The DC blocking capacitor C5 is used to filter out the DC component output after resonance suppression, wherein the DC blocking capacitor C5 can also participate in completing the in-band fundamental impedance matching. In an optional specific example, the broadband harmonic suppression matching circuit 20 can be designed to be suitable for narrowband applications, in which case the self-resonant frequency of the DC blocking capacitor C5 can be selected to be at the center frequency, so that the DC blocking capacitor C5 has no effect on the performance within the circuit operating frequency band; the broadband harmonic suppression matching circuit 20 can also be designed to be suitable for broadband applications. Since the reactance of the DC blocking capacitor C5 is different at different frequency points, the DC blocking capacitor C5 can be used as a variable to participate in the optimization for impedance matching that is more difficult to achieve.

[0051] See also Figure 8 and Fig. 9 , is a diagram showing the analysis results of a simulation analysis of the insertion loss performance and harmonic component suppression characteristics of the broadband harmonic suppression matching circuit 20 provided by the embodiment of the present application, taking the design frequency band of 2.7-3.5 GHz as an example. Figure 8 As shown in the figure, within the range of 5.8-18GHz, the insertion loss S21 is less than -40dB, and has good suppression characteristics in the second to fifth harmonic range. Fig. 9 As shown, in the range of 2.7-3.5GHz, the second to fifth harmonic components are less than -50dBc at each frequency point, the output power swing is within ±0.3dB, and the in-band flatness is good.

[0052] Thus, the broadband harmonic suppression matching circuit 20 provided in the embodiment of the present application has at least the following characteristics:

[0053] First, a third harmonic well point is introduced by combining the first circuit element 211 and the second circuit element 212 in the bias circuit, and the second circuit element 212 and the third circuit element 213 are further combined to achieve second harmonic suppression. In this way, the low-order harmonic suppression and DC bias circuit are integrated into the first harmonic suppression and bias circuit 21, which improves the compactness of the circuit structure, removes unnecessary insertion loss, and improves linearity.

[0054] Second, through the second-order LC resonant network, higher-order harmonic suppression of the fourth and fifth orders is achieved, and multiple circuit elements in the second-order LC resonant network are used to participate in fundamental impedance matching. In this way, the high-order harmonic suppression and fundamental impedance matching circuits are integrated into a second harmonic suppression and fundamental impedance matching circuit 22, further improving the compactness of the circuit structure, removing unnecessary insertion loss, and improving linearity.

[0055] Third, in the first harmonic suppression and bias circuit 21 and the second harmonic suppression and fundamental impedance matching circuit 22, according to the overall design requirements, the circuit elements that constitute the resonant network for harmonic suppression are selectively replaced with microstrip lines, wherein the microstrip lines can be divided into short-circuited stubs and open-circuited stubs. The short-circuited stubs can be selected for replacement according to the requirements of the circuit elements in the overall circuit for impedance matching or filtering design, or the open-circuited stubs can be selected for replacement according to the requirements of the circuit elements in the overall circuit for constituting a resonant network or oscillator design. Microstrip lines have lower losses and lower processing accuracy requirements, which can further help control the insertion loss generated in the overall circuit.

[0056] On the other hand, please refer to Fig.10 , a broadband harmonic suppression power amplifier is also provided, including a power amplifier 30 and a matching network connected to the power amplifier 30; wherein the matching network is a broadband harmonic suppression matching circuit 20 of any of the aforementioned embodiments of the present application. In an optional specific example, the broadband harmonic suppression matching circuit 20 is connected to the output of the power amplifier, and serves as an output matching circuit of the power amplifier 30, and performs harmonic suppression and fundamental impedance matching on the output of the power amplifier 30 to achieve high-efficiency and high-power transmission within the band, thereby improving the output capacity of the power amplifier 30.

[0057] See also Fig.11 On the other hand, the embodiment of the present application also provides a power amplifier module, including a chip and a packaging substrate, wherein the chip or the packaging substrate is provided with a broadband harmonic suppression power amplifier according to any embodiment of the present application. The broadband harmonic suppression power amplifier can be integrated in the chip 21 or the packaging substrate 22, and the power amplifier module can be various types of radio frequency power amplifier products.

[0058] It should be noted that, in this article, the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the existence of other identical elements in the process, method, article or device including the element.

[0059] The above are only specific implementations of the present application, but the protection scope of the present application is not limited thereto. Any technician familiar with the technical field can easily think of changes or substitutions within the technical scope disclosed in the present application, which should be included in the protection scope of the present application. Therefore, the protection scope of the present application should be based on the protection scope of the claims.

Claims

1. A broadband harmonic suppression matching circuit, characterized in that: include: A first harmonic suppression and bias circuit, comprising a first circuit element and a grounding capacitor constituting a bias circuit, a second circuit element and a third circuit element connected to the first circuit element and constituting a resonant network, wherein the sum of the electrical lengths of the first circuit element and the second circuit element is λ / 6; A second harmonic suppression and fundamental impedance matching circuit comprises a multi-order LC resonant network, wherein the multi-order LC resonant network comprises a fourth circuit element and a fifth circuit element connected in series with the third circuit element, wherein the fourth circuit element and the fifth circuit element are used to complete in-band fundamental impedance matching; Wherein, each circuit element is a microstrip line or a lumped element.

2. The broadband harmonic suppression matching circuit according to claim 1, characterized in that: The first harmonic suppression and bias circuit includes a DC power supply, and the grounding capacitor is connected between the electrodes of the DC power supply and the ground; One end of the first circuit element is connected to a first node between the DC power supply and the grounded capacitor, and the other end is connected to a second node between the second circuit element and the third circuit element; The third circuit element is connected between the second node and an electrode ground.

3. The broadband harmonic suppression matching circuit according to claim 2, characterized in that: The multi-order LC resonant network further includes a sixth circuit element connecting the fourth circuit element to ground, and a seventh circuit element connecting the fifth circuit element to ground; The fourth circuit element and the sixth circuit element form a first-order LC resonant network, and the fifth circuit element and the seventh circuit element form a first-order LC resonant network.

4. The broadband harmonic suppression matching circuit according to claim 1, characterized in that: The first circuit element and the second circuit element are respectively microstrip lines or inductive lumped elements; The third circuit element is a capacitive lumped element.

5. The broadband harmonic suppression matching circuit according to claim 1, characterized in that: One of the first circuit element and the second circuit element is a microstrip line, and the other is an inductive lumped element; The third circuit element is a microstrip line.

6. The broadband harmonic suppression matching circuit according to claim 1, characterized in that: The fourth circuit element and the fifth circuit element are respectively microstrip lines or inductive lumped elements, and the sixth circuit element and the seventh circuit element are respectively grounded capacitive lumped elements or microstrip lines.

7. The broadband harmonic suppression matching circuit according to claim 6, characterized in that: The sixth circuit element and the seventh circuit element are respectively microstrip lines; The second harmonic suppression and fundamental impedance matching circuit further includes an eighth circuit element connected to a node between the fourth circuit element and the sixth circuit element, and a ninth circuit element connected to a node between the fifth circuit element and the seventh circuit element; The eighth circuit element and the ninth circuit element are respectively microstrip lines.

8. The broadband harmonic suppression matching circuit according to any one of claims 1 to 7, characterized in that: The second harmonic suppression and fundamental impedance matching circuit further includes a DC blocking capacitor connected in series between the fifth circuit element and the input impedance; The self-resonant frequency of the DC blocking capacitor is at the center frequency.

9. A broadband harmonic suppression power amplifier, characterized in that: comprising a power amplifier and a matching network connected to the power amplifier; Wherein, the matching network is a broadband harmonic suppression matching circuit as claimed in any one of claims 1 to 8.

10. A power amplifier module, characterized in that: It comprises a chip and a packaging substrate, wherein the broadband harmonic suppression power amplifier as claimed in claim 9 is arranged in the chip or the packaging substrate.

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