Array substrate and display panel

Abstract

The utility model discloses an array substrate and a display panel, the array substrate comprises a plurality of data lines, a plurality of common electrode lines, at least two transparent electrodes, a connecting piece and a first bridging piece, the data lines and the common electrode lines extend along a first direction and are alternately arranged along a second direction, the first direction is perpendicular to the second direction, and the first bridging piece is arranged between the data lines and the common electrode lines. The two transparent electrodes are arranged on the two sides of the data line at intervals in the second direction, the transparent electrodes and the data line are arranged on different layers, each transparent electrode comprises a first sub-electrode and a second sub-electrode, and the first sub-electrodes and the second sub-electrodes are arranged at intervals in the first direction; the connecting pieces are connected with the adjacent first sub-electrodes and second sub-electrodes, and the connecting pieces and the common electrode wires are at least partially overlapped; the first bridging piece and the transparent electrode are arranged on the same layer, the first bridging piece is connected with the two adjacent first sub-electrodes, and the first bridging piece and the data line are at least partially overlapped. The reject ratio of the display panel can be reduced.

Description

Technical Field

[0001] The present application relates to the field of display technology, and in particular to an array substrate and a display panel. Background Art

[0002] Thin Film Transistor Liquid Crystal Display (TFT-LCD) is the mainstream product in display panels. Thin Film Transistor Liquid Crystal Display panels can be divided into twisted nematic (TN), in-plane switching (IPS), fringe field switching (FFS) and vertical alignment (VA) types.

[0003] For IPS-type thin-film transistor liquid crystal display panels, data lines, common electrodes and pixel electrodes are stacked on the array substrate side. When foreign matter (particle) appears between the overlapping parts of the data lines and the common electrodes, electrostatic discharge (ESD) will occur in the overlapping parts of the common electrodes and the data lines, causing a short circuit (Data Common Short, DCS) between the common electrodes and the data lines, resulting in a defective display panel.

[0004] Therefore, it is necessary to propose a new technical solution to solve the above technical problems. Utility Model Content

[0005] The purpose of the present application is to provide an array substrate and a display panel to reduce the defective rate of the display panel.

[0006] To solve the above problems, the technical solution of this application is as follows:

[0007] In a first aspect, the present application proposes an array substrate, comprising:

[0008] A plurality of data lines extending along a first direction;

[0009] A plurality of common electrode lines extending along the first direction and arranged alternately with the data lines along a second direction, the common electrode lines and the data lines being arranged in the same layer, wherein the first direction is perpendicular to the second direction;

[0010] at least two transparent electrodes, the two transparent electrodes are arranged at two sides of the data line at intervals along the second direction, the transparent electrode and the data line are arranged in different layers, the transparent electrode comprises a first sub-electrode and a second sub-electrode, wherein the first sub-electrode and the second sub-electrode are arranged at intervals along the first direction;

[0011] a connecting member, connecting the adjacent first sub-electrode and the second sub-electrode, wherein the connecting member at least partially overlaps with the common electrode line; and

[0012] The first jumper is arranged in the same layer as the transparent electrode and connects two adjacent first sub-electrodes. The first jumper at least partially overlaps with the data line.

[0013] In one embodiment of the present application, the first sub-electrode includes:

[0014] A first electrode line extending along the first direction and overlapping the common electrode line; and

[0015] Two first electrode portions, wherein the two first electrode portions are respectively arranged on two sides of the first electrode wiring;

[0016] One side of the first electrode portion is connected to the first electrode wiring, and the other side of the first electrode portion is connected to the first jumper.

[0017] In one embodiment of the present application, the first electrode portion includes:

[0018] A first edge portion, enclosing the first electrode wiring to form a first orientation zone, wherein a side of the first edge portion away from the first electrode wiring is connected to the first jumper; and

[0019] A plurality of first branch portions, disposed in the first orientation region, wherein the first branch portions connect the first electrode wiring and the first edge portion;

[0020] Wherein, a center line of the first orientation zone extending along the second direction overlaps with the first jumper.

[0021] In an embodiment of the present application, the number of the first jumpers is two. The first jumpers extend along the second direction and connect two adjacent first electrode portions located on both sides of the data line. The two first jumpers are spaced apart along the first direction.

[0022] In one embodiment of the present application, the second sub-electrode includes:

[0023] A second electrode line extending along the first direction and overlapping the common electrode line; and

[0024] Two second electrode parts, the two second electrode parts are respectively arranged on both sides of the second electrode wiring and connected to the second electrode wiring;

[0025] Wherein, the second electrode wiring, the connecting member and the first electrode wiring are connected in sequence.

[0026] In one embodiment of the present application, the array substrate further comprises an insulating layer, the insulating layer covers the data line and the common electrode line, a surface of the insulating layer facing away from the common electrode line is provided with the transparent electrode, and a portion of the insulating layer between the connecting member and the common electrode line is provided with a via hole;

[0027] Wherein, a part of the connecting member passes through the via hole and is connected to the common electrode line.

[0028] In one embodiment of the present application, the array substrate further includes a second jumper, which is disposed in the same layer as the transparent electrode and at least partially overlaps with the data line, and the second jumper connects two adjacent second electrode portions located on both sides of the data line;

[0029] Wherein, the second jumper is connected to a side of the second electrode portion away from the second electrode wiring.

[0030] In one embodiment of the present application, the second electrode portion includes:

[0031] A second edge portion, enclosing the second electrode wiring to form a second orientation zone, wherein a side of the second edge portion away from the second electrode wiring is connected to the second jumper; and

[0032] A plurality of second branch portions, disposed in the second orientation region, wherein the second branch portions connect the second electrode wiring and the second edge portion;

[0033] Wherein, a center line of the second orientation zone extending along the second direction overlaps with the second jumper.

[0034] In one embodiment of the present application, the number of the second jumpers is less than the number of the first jumpers.

[0035] In a second aspect, the present application proposes a display panel, which includes an array substrate, wherein the array substrate includes: a plurality of data lines extending along a first direction; a plurality of common electrode lines extending along the first direction and arranged alternately with the data lines along a second direction, the common electrode lines being arranged in the same layer as the data lines, wherein the first direction is perpendicular to the second direction; at least two transparent electrodes, two of the transparent electrodes being arranged at intervals on both sides of the data lines along the second direction, the transparent electrodes being arranged in different layers from the data lines, the transparent electrodes including a first sub-electrode and a second sub-electrode, wherein the first sub-electrode and the second sub-electrode are arranged at intervals along the first direction; a connecting member connecting adjacent first sub-electrodes and second sub-electrodes, the connecting member at least partially overlapping with the common electrode line; a first jumper being arranged in the same layer as the transparent electrode and connecting two adjacent first sub-electrodes, the first jumper at least partially overlapping with the data line.

[0036] In the present application, the transparent electrode and the data line are arranged in different layers, and the transparent electrode includes a first sub-electrode and a second sub-electrode. In the same transparent electrode, the first sub-electrode and the second sub-electrode are connected by a connector. Two adjacent transparent electrodes are connected by a first jumper, wherein the first jumper connects two first sub-electrodes located on both sides of the data line. At this time, no jumper is arranged between the two adjacent second sub-electrodes, which relatively reduces the area of ​​the overlapping part of the transparent electrode and the data line, thereby reducing the probability of short circuit between the common electrode and the data line, and reducing the defective rate of the display panel. BRIEF DESCRIPTION OF THE DRAWINGS

[0037] Figure 1 is a schematic diagram of an embodiment of an array substrate of the present application;

[0038] Figure 2 yes Figure 1 Schematic diagram of the transparent electrode;

[0039] Figure 3 yes Figure 1 Schematic diagram of data lines and common electrode lines;

[0040] Figure 4 is a schematic diagram of another embodiment of an array substrate of the present application;

[0041] Figure 5 yes Figure 4 Schematic diagram of the transparent electrode;

[0042] Figure 6 yes Figure 4 Schematic diagram of data lines and common electrode lines. DETAILED DESCRIPTION

[0043] The meanings of the terms used in this specification and claims correspond to the meanings commonly understood by those of ordinary skill in the art to which this application belongs. The terms used in this specification and claims are only for the purpose of facilitating the description and understanding of this application, and are not intended to limit this application to the narrow interpretation of the specific terms used in the specification and claims.

[0044] The various embodiments provided in this application are similar, and features in different embodiments may be combined with each other.

[0045] In the present application, the term "connection" should be understood in a broad sense. For example, "connection" can be a mechanical connection or an electrical connection; it can be a direct connection or an indirect connection through an intermediate medium.

[0046] The present application proposes a display panel, which is an LCD display panel. The display panel is applied to display devices such as display screens, tablet computers, mobile phones, and notebook computers. The display panel includes an array substrate 100 .

[0047] Reference Figures 1 to 3 , the present application proposes an array substrate 100, comprising:

[0048] A plurality of data lines 10 extending along a first direction D1;

[0049] A plurality of common electrode lines 20 extending along the first direction D1 and arranged alternately with the data lines 10 along the second direction D2, wherein the common electrode lines 20 and the data lines 10 are arranged in the same layer, wherein the first direction D1 is perpendicular to the second direction D2;

[0050] At least two transparent electrodes 30, the two transparent electrodes 30 are arranged at two sides of the data line 10 at intervals along the second direction D2, the transparent electrode 30 and the data line 10 are arranged in different layers, the transparent electrode 30 includes a first sub-electrode 31 and a second sub-electrode 32, wherein the first sub-electrode 31 and the second sub-electrode 32 are arranged at intervals along the first direction D1;

[0051] a connecting member 40, connecting the adjacent first sub-electrode 31 and the second sub-electrode 32, wherein the connecting member 40 at least partially overlaps with the common electrode line 20; and

[0052] The first jumper 50 is disposed in the same layer as the transparent electrode 30 and connects two adjacent first sub-electrodes 31 . The first jumper 50 at least partially overlaps with the data line 10 .

[0053] In the present application, the transparent electrode 30 and the data line 10 are arranged in different layers, and the transparent electrode 30 includes a first sub-electrode 31 and a second sub-electrode 32. In the same transparent electrode 30, the first sub-electrode 31 and the second sub-electrode 32 are connected by a connector 40. Two adjacent transparent electrodes 30 are connected by a first jumper 50, wherein the first jumper 50 connects two first sub-electrodes 31 located on both sides of the data line 10. At this time, no jumper is arranged between two adjacent second sub-electrodes 32, which relatively reduces the area of ​​the overlapping portion of the transparent electrode 30 and the data line 10, thereby reducing the probability of short circuit between the common electrode and the data line 10, and reducing the defective rate of the display panel.

[0054] In one embodiment, the data line 10 and the common electrode line 20 share the same metal layer, and the array substrate 100 further includes a substrate and an insulating layer, wherein the data line 10 and the common electrode line 20 are arranged on the substrate, the insulating layer is arranged on the substrate and covers the data line 10 and the common electrode line 20, and the transparent electrode 30 is arranged on the insulating layer, wherein the first jumper 50 is arranged on the insulating layer and connects two adjacent first sub-electrodes 31; the connecting member 40 is arranged on the insulating layer and connects the adjacent first sub-electrode 31 and the second sub-electrode 32.

[0055] The material of the substrate is glass or polyimide, and the material of the insulating layer is at least one of silicon nitride, silicon dioxide, and silicon oxide.

[0056] In this embodiment, the orthographic projection of the transparent electrode 30 on the substrate does not overlap with the orthographic projection of the data line 10 on the substrate, and the orthographic projection of the first jumper 50 on the substrate overlaps with the orthographic projection of the data line 10 on the substrate. Compared with the traditional array substrate 100, the present application eliminates the jumper between two adjacent second sub-electrodes 32, and electrically connects the first sub-electrode 31 and the second sub-electrode 32 through the connector 40, thereby reducing the defective rate of the array substrate 100.

[0057] In this embodiment, the transparent electrode 30 , the connecting member 40 , and the first jumper 50 share a same metal layer, wherein the material of the transparent electrode 30 is transparent indium tin oxide (ITO).

[0058] In this embodiment, a via hole 60 is provided on the insulating layer, and a portion of the connector 40 passes through the via hole 60 and is electrically connected to the common electrode line 20 below the insulating layer, so that the transparent electrode 30 is electrically connected to the common electrode line 20, and the common electrode line 20 supplies power to the transparent electrode 30. The first jumper 50 and the connector 40 can reduce the voltage difference between the various parts of the transparent electrode 30, thereby avoiding uneven display of the display panel due to the influence of the pressure difference.

[0059] Reference Figures 1 to 3 In one embodiment of the present application, the first sub-electrode 31 includes:

[0060] A first electrode line 311 extends along the first direction D1 and overlaps with the common electrode line 20; and

[0061] Two first electrode portions 312 , wherein the two first electrode portions 312 are respectively disposed on two sides of the first electrode wiring 311 ;

[0062] One side of the first electrode portion 312 is connected to the first electrode wiring 311 , and the other side of the first electrode portion 312 is connected to the first jumper 50 .

[0063] The first electrode wiring 311 is electrically connected to the common electrode line 20, and the first electrode wiring 311 overlaps with the common electrode line 20 and does not generate static discharge. The array substrate 100 also includes a pixel electrode, and the pixel electrode is insulated from the transparent electrode 30. The electrical property of the pixel electrode is opposite to that of the first electrode portion 312, and the pixel electrode and the transparent electrode 30 generate a voltage that deflects the liquid crystal, thereby changing the orientation of the liquid crystal.

[0064] The first jumper 50 connects two adjacent first electrode portions 312. When the first jumper 50 is connected to a side of the first electrode portion 312 away from the first electrode trace 311, the first jumper 50 is located between the two adjacent first electrode portions 312. The first jumper 50 is shorter, thereby reducing the defective rate of the display panel.

[0065] Reference Figures 1 to 6 In one embodiment of the present application, the first electrode portion 312 includes:

[0066] A first edge portion 3121 and the first electrode wiring 311 enclose a first orientation region 3123 , and a side of the first edge portion 3121 away from the first electrode wiring 311 is connected to the first jumper 50 ; and

[0067] A plurality of first branch portions 3122 are disposed in the first orientation region 3123 , wherein the first branch portions 3122 connect the first electrode trace 311 and the first edge portion 3121 ;

[0068] The center line of the first orientation zone 3123 extending along the second direction D2 overlaps with the first jumper 50 .

[0069] The first edge portion 3121 and the first electrode wiring 311 are enclosed to form a first orientation zone 3123. The shape of the first orientation zone 3123 along the direction parallel to the substrate is rectangular. A plurality of first branch portions 3122 are arranged in the first orientation zone 3123. One end of each first branch portion 3122 is connected to the first electrode wiring 311, and the other end is connected to the first edge portion 3121. The first branch portions 3122 have at least two extending directions in the first orientation zone 3123, namely, a first extending direction and a second extending direction. The first branch portions 3122 in the first extending direction and the first branch portions 3122 in the second extending direction are respectively located on both sides of a center line of the first orientation zone 3123 extending along the second direction D2.

[0070] The center line of the first alignment zone 3123 extending along the second direction D2 falls on the first jumper 50 , which reduces the internal pressure difference of the first electrode portion 312 and improves the display effect of the display panel.

[0071] Reference Figures 1 to 3 In one embodiment of the present application, the number of the first jumpers 50 is two, the first jumpers 50 extend along the second direction D2 and connect two adjacent first electrode portions 312 located on both sides of the data line 10, and the two first jumpers 50 are spaced apart along the first direction D1.

[0072] There are two first jumpers 50 . When one of the first jumpers 50 and the data line 10 is damaged due to electrostatic discharge, the other first jumper 50 can still connect two adjacent first sub-electrodes 31 , thereby improving the stability of the display panel structure.

[0073] Reference Figures 1 to 3 In one embodiment of the present application, the second sub-electrode 32 includes:

[0074] A second electrode line 321 extends along the first direction D1 and overlaps with the common electrode line 20; and

[0075] Two second electrode portions 322 , the two second electrode portions 322 are respectively disposed on two sides of the second electrode wiring 321 and connected to the second electrode wiring 321 ;

[0076] The second electrode wiring 321, the connector 40 and the first electrode wiring 311 are connected in sequence.

[0077] The center line of the first electrode wiring 311 along the first direction D1, the center line of the connector 40 along the first direction D1, and the center line of the second electrode wiring 321 along the first direction D1 coincide with each other, and the common electrode wiring is electrically connected to the first sub-electrode 31 and the second sub-electrode 32 respectively through the connector 40. Since the first jumper 50 is provided between adjacent first sub-electrodes 31, the voltage difference between adjacent transparent electrodes 30 can be reduced, so there is no need to provide a jumper between adjacent second sub-electrodes 32, thereby reducing the probability of electrostatic discharge in the array substrate 100, thereby reducing the defective rate of the display panel.

[0078] Reference Figures 1 to 3 In one embodiment of the present application, the array substrate 100 further includes an insulating layer, the insulating layer covers the data line 10 and the common electrode line 20, a surface of the insulating layer away from the common electrode line 20 is provided with the transparent electrode 30, and a portion of the insulating layer between the connecting member 40 and the common electrode line 20 is provided with a via 60;

[0079] Part of the connecting member 40 passes through the via hole 60 and is connected to the common electrode line 20 .

[0080] The material of the insulating layer is at least one of silicon nitride, silicon dioxide, and silicon oxide. A portion of the connector 40 passes through the via hole 60 and is connected to the common electrode line 20, so that the common electrode line 20 is electrically connected to the transparent electrode 30. The connector 40 eliminates the need to set a jumper between two adjacent second sub-electrodes 32, thereby reducing the probability of static electricity discharge in the array substrate 100, thereby reducing the defective rate of the display panel.

[0081] Reference Figures 4 to 6 In one embodiment of the present application, the array substrate 100 further includes a second jumper 70, which is disposed on the same layer as the transparent electrode 30 and at least partially overlaps the data line 10, and the second jumper 70 connects two adjacent second electrode portions 322 located on both sides of the data line 10;

[0082] The second jumper 70 is connected to a side of the second electrode portion 322 away from the second electrode trace 321 .

[0083] A second jumper 70 is disposed between some adjacent second electrode portions 322 to prevent the first jumper 50 and the data line 10 from being damaged due to electrostatic discharge, thereby preventing a voltage difference from being generated between adjacent transparent electrodes 30, thereby causing uneven display of the display panel. The second jumper 70 can reduce the voltage difference between adjacent transparent electrodes 30, thereby improving the display effect of the display panel.

[0084] Reference Figures 4 to 6 In one embodiment of the present application, the second electrode portion 322 includes:

[0085] The second edge portion 3221 and the second electrode wiring 321 are enclosed to form a second orientation area 3223, and the second edge portion 3221 is connected to the second jumper 70 at a side away from the second electrode wiring 321; and

[0086] A plurality of second branch portions 3222 are provided in the second orientation region 3223 , and the second branch portions 3222 connect the second electrode wiring 321 and the second edge portion 3221 ;

[0087] The center line of the second orientation zone 3223 extending along the second direction D2 overlaps with the second jumper 70 .

[0088] The second edge portion 3221 and the second electrode wiring 321 are enclosed to form a second orientation zone 3223. The second orientation zone 3223 is rectangular in shape along a direction parallel to the substrate. A plurality of second branches 3222 are arranged in the second orientation zone 3223. One end of each second branch 3222 is connected to the second electrode wiring 321, and the other end is connected to the second edge portion 3221. The second branch 3222 has at least two extending directions in the second orientation zone 3223, namely, a first extending direction and a second extending direction. The second branch 3222 in the first extending direction and the second branch 3222 in the second extending direction are respectively located on both sides of a center line of the second orientation zone 3223 extending along the second direction D2.

[0089] The center line of the second alignment zone 3223 extending along the second direction D2 falls on the second jumper 70 , which reduces the internal pressure difference of the second electrode portion 322 and improves the display effect of the display panel.

[0090] Reference Figures 1 to 6 In one embodiment of the present application, the number of the second jumpers 70 is less than the number of the first jumpers 50 .

[0091] The number of the second jumpers 70 is less than that of the first jumpers 50 , which reduces the overlapping area between the second jumpers 70 and the data lines 10 , and correspondingly reduces the probability of electrostatic discharge between the second jumpers 70 and the data lines 10 , thereby reducing the defective rate of the display panel.

[0092] When the number of the first cross-connectors 50 is two, the number of the second cross-connectors 70 is one; when the number of the first cross-connectors 50 is one, the number of the second cross-connectors 70 is zero.

[0093] The above is a detailed description of the specific implementation of the present application. The above implementation disclosed in the present application is only the preferred implementation of the present application. For ordinary technicians in this field, many modifications and improvements can be made without departing from the concept of the present application. These modifications and improvements all fall within the scope of protection defined by the claims of the present application.

Claims

1. An array substrate, It is characterized in that include: A plurality of data lines extending along a first direction; A plurality of common electrode lines extending along the first direction and arranged alternately with the data lines along a second direction, the common electrode lines and the data lines being arranged in the same layer, wherein the first direction is perpendicular to the second direction; at least two transparent electrodes, the two transparent electrodes are arranged at two sides of the data line at intervals along the second direction, the transparent electrode and the data line are arranged in different layers, the transparent electrode comprises a first sub-electrode and a second sub-electrode, wherein the first sub-electrode and the second sub-electrode are arranged at intervals along the first direction; a connecting member, connecting the adjacent first sub-electrode and the second sub-electrode, wherein the connecting member at least partially overlaps with the common electrode line; and The first jumper is arranged in the same layer as the transparent electrode and connects two adjacent first sub-electrodes. The first jumper at least partially overlaps with the data line.

2. The array substrate according to claim 1, It is characterized in that The first sub-electrode comprises: A first electrode line extending along the first direction and overlapping the common electrode line; and Two first electrode portions, wherein the two first electrode portions are respectively arranged on two sides of the first electrode wiring; One side of the first electrode portion is connected to the first electrode wiring, and the other side of the first electrode portion is connected to the first jumper.

3. The array substrate according to claim 2, It is characterized in that The first electrode portion comprises: A first edge portion, enclosing the first electrode wiring to form a first orientation zone, wherein a side of the first edge portion away from the first electrode wiring is connected to the first jumper; and A plurality of first branch portions, disposed in the first orientation region, wherein the first branch portions connect the first electrode wiring and the first edge portion; Wherein, a center line of the first orientation zone extending along the second direction overlaps with the first jumper.

4. The array substrate according to claim 2, It is characterized in that The number of the first jumpers is two. The first jumpers extend along the second direction and connect two adjacent first electrode portions located on both sides of the data line. The two first jumpers are spaced apart along the first direction.

5. The array substrate according to claim 2, It is characterized in that The second sub-electrode comprises: A second electrode line extending along the first direction and overlapping the common electrode line; and Two second electrode parts, the two second electrode parts are respectively arranged on both sides of the second electrode wiring and connected to the second electrode wiring; Wherein, the second electrode wiring, the connecting member and the first electrode wiring are connected in sequence.

6. The array substrate according to claim 5, It is characterized in that The array substrate further comprises an insulating layer, the insulating layer covers the data line and the common electrode line, a surface of the insulating layer away from the common electrode line is provided with the transparent electrode, and a portion of the insulating layer between the connecting member and the common electrode line is provided with a via hole; Wherein, a part of the connecting member passes through the via hole and is connected to the common electrode line.

7. The array substrate according to claim 5, It is characterized in that The array substrate further includes a second jumper, which is disposed in the same layer as the transparent electrode and at least partially overlaps with the data line, and the second jumper connects two adjacent second electrode portions located on both sides of the data line; Wherein, the second jumper is connected to a side of the second electrode portion away from the second electrode wiring.

8. The array substrate according to claim 7, It is characterized in that The second electrode portion includes: A second edge portion, enclosing the second electrode wiring to form a second orientation zone, wherein a side of the second edge portion away from the second electrode wiring is connected to the second jumper; and A plurality of second branch portions, disposed in the second orientation region, wherein the second branch portions connect the second electrode wiring and the second edge portion; Wherein, a center line of the second orientation zone extending along the second direction overlaps with the second jumper.

9. The array substrate according to claim 7, It is characterized in that The number of the second cross-connectors is less than the number of the first cross-connectors.

10. A display panel, It is characterized in that The display panel comprises the array substrate according to any one of claims 1 to 9.

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