3D semiconductor devices including a supporter and methods of forming the same
a technology of semiconductor devices and supporters, applied in the direction of semiconductor devices, basic electric elements, electrical appliances, etc., can solve problems such as stack structure collapse, and achieve the effect of simple process and stable structur
Active Publication Date: 2019-11-21
SAMSUNG ELECTRONICS CO LTD
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Benefits of technology
The patent text describes a method for making a semiconductor device with a stable structure and a simplified process. The method involves forming a lower conductive layer on a substrate, adding a conductive line on top, and creating a buried trench in the conductive line. A supporter is then added to support the conductive line and the surrounding structure. A stack structure is formed on top of the supporter, including a plurality of insulating layers and a plurality of conductive layers that are alternately stacked. This structure helps to stabilize the device and allows for a more efficient manufacturing process. The semiconductor device can also include a cell channel structure and an isolation trench for added stability and reliability.
Problems solved by technology
Various difficulties, such as the collapse of the stack structure, may occur in the process of forming the gap region.
Method used
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[0016]FIG. 1 is a layout for describing a 3D semiconductor device according to an example embodiment of the inventive concepts, and FIGS. 2 and 3 are cross-sectional views for describing the 3D semiconductor device. FIG. 2 is a cross-sectional view taken along lines I-I′, II-II′, and IV-IV′ of FIG. 1, and FIG. 3 is a cross-sectional view taken along line V-V′ of FIG. 1. FIGS. 4 and 5 are enlarged views showing a portion E3 of FIG. 2 in detail, FIGS. 6, 8, and 10 are enlarged views showing a portion E1 of FIG. 2 in detail, and FIGS. 7, 9, and 11 are enlarged views showing a portion E2 of FIG. 2 in detail. The 3D semiconductor device according to the example embodiment of the inventive concept may include a non-volatile memory such as a vertical NAND (VNAND) or a 3D flash memory.
[0017]Referring to FIG. 1, the 3D semiconductor device according to the example embodiment of the inventive concepts may include a mold layer 29, a plurality of buried trenches 31, 31A, 32, 32A, 33, 41, 42, 43...
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A semiconductor device comprises a lower conductive layer on a substrate. A conductive line is on the lower conductive layer. A buried trench in the conductive line is provided. A supporter which is on the conductive line and extends in the buried trench is provided. A stack structure including a plurality of insulating layers and a plurality of conductive layers that are alternately stacked is on the supporter. A channel structure passing through the stack structure, the supporter, and the conductive line is provided. An isolation trench passing through the stack structure, the supporter, and the conductive line is provided.
Description
CROSS-REFERENCE TO RELATED APPLICATION[0001]This U.S. non-provisional patent application claims priority under 35 U.S.C. § 119 to, and the benefit of, Korean Patent Application No. 10-2018-0057636, filed on May 21, 2018, in the Korean Intellectual Property Office (KIPO), the entire contents of which are incorporated herein by reference.BACKGROUNDField of the Invention[0002]Devices and methods consistent with example embodiments of the inventive concepts relate to three-dimensional (3D) semiconductor devices including a supporter and methods of forming the same.Discussion of Related Art[0003]Due, in part, to the benefits of high integration in semiconductor devices, memory devices employing a three-dimensional stack structure have been studied. In such structures, a sacrificial layer and a stack structure may be sequentially formed on a substrate. A gap region may be formed by removing the sacrificial layer. A replacement electrode may be formed in the gap region. Various difficultie...
Claims
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Patent Timeline
Login to View More IPC IPC(8): H01L27/11582H01L27/11565H01L27/11573H01L29/792H01L21/768
CPCH01L27/11565H01L21/76877H01L27/11582H01L29/7926H01L27/11573H10B43/35H10B43/27H10B41/10H10B43/10H10B41/27H10B43/40H10B41/41H10B41/35H10B41/20
InventorHONG, SANG JUNKIM, EE JOUSHIN, JOONG SHIK
OwnerSAMSUNG ELECTRONICS CO LTD