Formation method of semiconductor structure

A semiconductor and gate structure technology, applied in the field of semiconductor structure formation, can solve the problem that the electrical performance of the semiconductor structure needs to be improved, etc.

CN104217938BActive Publication Date: 2016-09-28SHANGHAI HUAHONG GRACE SEMICON MFG CORP
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Patent Information

Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Publication Date
2016-09-28

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Abstract

A forming method of a semiconductor structure includes: providing a substrate having a plurality of gate structures on the surface, with the sidewall surface, provided with a sidewall, of each gate structure and impurity arranged on the surface of the substrate between each two adjacent sidewalls; putting the substrate in a sputtering etching chamber, subjecting the surface of the substrate between the adjacent sidewalls to primary sputtering etching which is used for primary removal of the impurity and which provides a first radio frequency power and a first direct-current bias voltage; and subjecting the surface of the substrate to secondary sputtering etching which is used for secondary removal of the impurity and which provides a second radio frequency power and a second direct-current bias voltage. The second radio frequency power is less than the first radio frequency power; the second direct-current bias voltage is greater than the first direct-current bias voltage. The forming method has the advantages that an advancing direction of a plasma beam is perpendicular to the surface of the substrate in the sputtering etching process, the impurity is more effectively removed by etching, and impact of the plasma beam upon the surfaces of the sidewalls is decreased.
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Description

technical field

[0001] The invention relates to the technology in the field of semiconductor manufacturing, in particular to a method for forming a semiconductor structure. Background technique

[0002] With the continuous increase of the integration level of semiconductor devices, the critical dimensions of semiconductor devices are continuously reduced, and many problems have appeared correspondingly, such as the corresponding increase in surface resistance and contact resistance of the drain, source and gate structures of semiconductor devices, resulting in the decrease of semiconductor devices. The response speed is reduced and the signal is delayed. Therefore, an interconnection structure with low resistivity becomes a key element in the manufacture of highly integrated semiconductor devices.

[0003] In order to reduce the contact resistance of the drain-source and gate structures of semiconductor devices, the process method of metal silicide is introduced. The metal ...

Examples

Embodiment Construction

[0023] It can be seen from the background art that the electrical performance of the semiconductor structure formed in the prior art still needs to be improved.

[0024] It has been found through research that during the formation of the semiconductor structure, after forming the source region, the drain region and the gate structure, in order to reduce the contact resistance of the semiconductor structure, metal silicide is usually formed on the surface of the source region, the drain region and the gate structure, in order to To improve the quality of the formed metal silicide and reduce the resistivity of the metal silicide material, it is required that the surface of the source region, the drain region and the gate structure have a high degree of cleanliness. For this reason, before forming the metal silicide, the surface of the source region, the drain region and the gate structure are cleaned to remove impurities on the surface of the source region, the drain region and t...