A clamped boost power conversion circuit

Abstract

A clamped boost power conversion circuit includes a power supply, an inductor, a first switch module, a second switch module, a first unidirectional conduction device, a second unidirectional conduction device, a third unidirectional conduction device, a fourth unidirectional conduction device, a fifth unidirectional conduction device, a sixth unidirectional conduction device, and a flying capacitor C fly , output upper bus capacitor, output lower bus capacitor and load unit; the fifth unidirectional conductive device in the present invention is used to clamp the voltage stress of the second open module to the lower bus voltage; the sixth unidirectional conductive device is used to clamp the voltage stress of the fourth unidirectional conductive device to the upper bus voltage, thereby avoiding the problem of overvoltage breakdown of semiconductor devices. For wave control, synchronous wave generation can be used to simplify control; staggered wave generation can also be used to increase the inductance frequency and reduce the inductance volume and loss.

Description

Technical Field

[0001] The present application relates to the technical field of boost power conversion circuits, and in particular to a clamped-type boost power conversion circuit. Background Art

[0002] Boost circuit generally refers to a step-up power conversion circuit, that is, a circuit that inputs a voltage and outputs a higher voltage to achieve power conversion. Generally, a circuit that can achieve input greater than or equal to three levels is called a multi-level boost circuit. Under the same input conditions, a multi-level boost circuit can achieve a higher level of voltage output by reducing the voltage stress of power devices and using devices with a smaller withstand voltage rating. Compared with the traditional two-level boost circuit, the multi-level boost circuit can achieve medium voltage and high power output.

[0003] Flying capacitor three-level boost circuit Figure 1 As shown, when the input power supply is powered on, since the voltage of the flying capacitor is 0, T2 will bear the entire input voltage. Generally, the withstand voltage of each switch tube in the multi-level Boost circuit is selected according to 0.5 times the bus voltage or the upper and lower bus voltages. When the input voltage is greater than the upper and lower bus voltages, T2 is at risk of voltage breakdown. When there are multiple Boost output sides connected in parallel to the same bus, such as the multi-channel Boost application commonly found in photovoltaic inverters, one or several of them have been powered on, that is, the bus voltage has been established, but there is still one or several channels that are not powered on. At this time, the flying capacitor and input in the unpowered Boost circuit are both 0, and the bus voltage is all added to the fourth unidirectional conduction device D4, and D4 will bear the entire bus voltage. Combined with the stress of the three-level device according to the requirement of selecting half the bus voltage, D4 ​​is very prone to overvoltage damage. Summary of the invention

[0004] In order to overcome the problems existing in the above-mentioned prior art, the purpose of the present invention is to provide a clamping type boost power conversion circuit, which can solve the problem of uneven voltage when devices are used in series in the prior art.

[0005] In order to achieve the above object, the present invention adopts the following technical solution:

[0006] A clamping type boost power conversion circuit includes a power supply V in , inductor L, first switch module T1, second switch module T2, first unidirectional conduction device D1, second unidirectional conduction device D2, third unidirectional conduction device D3, fourth unidirectional conduction device D4, output upper bus capacitor C bus+ , Output bus capacitor C bus- and a load unit; the power supply V in, inductor L, first switch module T1, second switch module T2, are connected in series in sequence to form a loop, the first unidirectional conduction device D1 and the second unidirectional conduction device D2 are respectively connected in reverse parallel to the first switch module T1 and the second switch module T2, the third unidirectional conduction device D3, the fourth unidirectional conduction device D4, the output upper bus capacitor C bus+ , Output bus capacitor C bus- The anode of the third unidirectional conductive device D3 is connected to the series node of the inductor L and the first switch module T1, and the output lower bus capacitor C bus- The negative pole of the power supply V in The load unit is connected to the output bus capacitor C bus+ And the output bus capacitor C bus- The output end is characterized by also including a clamping circuit module.

[0007] The clamping circuit module includes a flying capacitor C fly and the fifth unidirectional conductive device D5, the flying capacitor C fly The positive end of the flying capacitor C is electrically connected to the series node of the third unidirectional conductive device D3 and the fourth unidirectional conductive device D4. fly The negative end of the fifth unidirectional conductive device D5 is electrically connected to the node in series with the first switch module T1 and the second switch module T2; the anode of the fifth unidirectional conductive device D5 is electrically connected to the flying capacitor C fly The cathode of the fifth unidirectional conductive device D5 is connected to the output bus capacitor C bus+ And the output bus capacitor C bus- The series nodes are connected.

[0008] The clamping circuit module includes a flying capacitor C fly And the fifth unidirectional conductive device D5, when the power supply voltage has been established but the bus voltage has not been established, the fifth unidirectional conductive device D5 clamps the voltage stress of the second switch module T2 to the lower bus voltage.

[0009] The clamping circuit module includes a flying capacitor C fly , a fifth unidirectional conductive device D5 and a sixth unidirectional conductive device D6, the flying capacitor C fly The positive end of the flying capacitor C is electrically connected to the series node of the third unidirectional conductive device D3 and the fourth unidirectional conductive device D4. fly The negative end of the fifth unidirectional conductive device D5 is electrically connected to the node in series with the first switch module T1 and the second switch module T2; the anode of the fifth unidirectional conductive device D5 is electrically connected to the flying capacitor C fly The cathode of the fifth unidirectional conductive device D5 is connected to the output bus capacitor C bus+ And the output bus capacitor C bus-the anode of the sixth unidirectional conductive device D6 is connected to the cathode of the fifth unidirectional conductive device D5, and the cathode of the sixth unidirectional conductive device D6 is connected to the anode of the fourth unidirectional conductive device D4.

[0010] The clamping circuit module includes a flying capacitor C fly , a fifth unidirectional conductive device D5 and a sixth unidirectional conductive device D6. When the bus voltage is established and the power input is not powered on, the sixth unidirectional conductive device D6 clamps the voltage stress of the fourth unidirectional conductive device D4 to the upper bus voltage.

[0011] Compared with the prior art, the present invention has the following advantages:

[0012] The clamping circuit module includes a flying capacitor C fly The fifth unidirectional conductive device D5 clamps the voltage stress of the second switch module T2 to the lower bus voltage when the power supply voltage has been established but the bus voltage has not been established, thereby effectively protecting the second switch module and avoiding overvoltage breakdown.

[0013] The clamping circuit module includes a flying capacitor C fly , the fifth unidirectional conductive device D5 and the sixth unidirectional conductive device D6, when the bus voltage has been established and the power input is not powered on, the sixth unidirectional conductive device D6 clamps the voltage stress of the fourth unidirectional conductive device D4 to the upper bus voltage, thereby effectively protecting the fourth unidirectional conductive device from overvoltage breakdown. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] In order to more clearly illustrate the implementation of this application or the technical solutions in the prior art, the following is a brief introduction to the drawings used in the various embodiments of this application or the description of the prior art. Obviously, the following drawings are some embodiments of this application, and ordinary technicians in this field can also obtain other drawings based on these drawings without creative work.

[0015] Figure 1 Schematic diagram of the topology of a traditional flying capacitor three-level Boost circuit.

[0016] Figure 2 The present invention is a circuit diagram of a embedded boost power conversion circuit.

[0017] Figure 3 for Figure 2 Working circuit diagram of the middle embedded circuit.

[0018] Figure 4 Another circuit diagram of the embedded boost power conversion circuit of the present invention.

[0019] Figure 5for Figure 4 Working circuit diagram of the middle embedded circuit.

[0020] Figure 6a for Figure 4 Driving signal diagram of synchronous wave generation mode of T1 and T2 in the circuit.

[0021] Figure 6b for Figure 4 Schematic diagram of the current flow path corresponding to the four switching modes of the synchronous wave generation method in the circuit, where Figure 6b (1) is the switching mode a, Figure 6b (2) is the switching mode b, and Figure 6b (3) is the switching mode c. Figure 6b (4) is the switching mode d.

[0022] Figure 7a for Figure 4 Driving signal diagram of state 1 of the interlaced wave transmission mode of T1 and T2 in the circuit.

[0023] Figure 7b for Figure 4 Schematic diagram of the current flow path corresponding to the four switching modes of the interleaved wave mode state 1 in the circuit, where Figure 7b (1) is the switching mode a, Figure 7b (2) is the switching mode b, Figure 7b (3) is the switching mode c, Figure 7b (4) is the switching mode d.

[0024] Figure 8a for Figure 4 Driving signal diagram of state 2 of the interlaced wave transmission mode of T1 and T2 in the circuit.

[0025] Figure 8b for Figure 4 Schematic diagram of the current flow path corresponding to the four switching modes of the interleaved wave mode state 2 in the circuit, where Figure 8b (1) is the switching mode a, Figure 8b (2) is the switching mode b, Figure 8b (3) is the switching mode c, Figure 8b (4) is the switching mode d.

[0026] Figure 9a for Figure 4 Driving signal diagram of state 3 of the interlaced wave transmission mode of T1 and T2 in the circuit.

[0027] Figure 9b for Figure 4 Schematic diagram of the current flow path corresponding to the four switching modes of the interleaved wave mode state 3 in the circuit, where Figure 9b (1) is the switching mode a, Figure 9b (2) is the switching mode b, Figure 9b (3) is the switching mode c, Figure 9b (4) is the switching mode d.

[0028] Fig.10a for Figure 4 Driving signal diagram of state 4 of the interlaced wave transmission mode of T1 and T2 in the circuit.

[0029] Fig.10b for Figure 4 Schematic diagram of the current flow path corresponding to the four switching modes of the interleaved wave mode state 4 in the circuit, where Fig.10b (1) is the switching mode a, Fig.10b (2) is the switching mode b, Fig.10b (3) is the switching mode c, Fig.10b (4) is the switching mode d.

[0030] Fig.11 for Figure 4 Mirror image of the circuit diagram. DETAILED DESCRIPTION

[0031] In order to enable those skilled in the art to better understand the technical solution, a boost power conversion circuit is further described in detail below in conjunction with the accompanying drawings and specific implementation methods.

[0032] The boost power conversion circuit in the embodiment of the present application mainly includes:

[0033] Figure 2 To invent a clamping type boost power conversion circuit diagram, such as Figure 2 As shown, it includes a power supply V in , inductor L, first switch module T1, second switch module T2, first unidirectional conduction device D1, second unidirectional conduction device D2, third unidirectional conduction device D3, fourth unidirectional conduction device D4, output upper bus capacitor C bus+ , Output bus capacitor C bus- and load unit. The power supply V in , inductor L, first switch module T1, second switch module T2, are connected in series in sequence to form a loop, the first unidirectional conduction device D1 and the second unidirectional conduction device D2 are respectively connected in reverse parallel to the first switch module T1 and the second switch module T2, the third unidirectional conduction device D3, the fourth unidirectional conduction device D4, the output upper bus capacitor C bus+ , Output bus capacitor C bus- The anode of the third unidirectional conductive device D3 is connected to the series node of the inductor L and the first switch module T1, and the output lower bus capacitor C bus- The negative pole of the power supply V inThe load unit is connected to the output bus capacitor C bus+ And the output bus capacitor C bus - output end, and also includes a clamping circuit module. The clamping circuit module includes a flying capacitor C fly and a fifth unidirectional conductive device D5. The flying capacitor C fly The positive end of the flying capacitor C is electrically connected to the series node of the third unidirectional conductive device D3 and the fourth unidirectional conductive device D4. fly The negative end of the fifth unidirectional conductive device D5 is electrically connected to the node in series with the first switch module T1 and the second switch module T2. fly The cathode of the fifth unidirectional conductive device D5 is connected to the output bus capacitor C bus+ And the output bus capacitor C bus - are connected in series.

[0034] Figure 3 for Figure 2 The working circuit diagram of the embedded circuit is a embedded boost power conversion circuit. When the power supply voltage has been established but the bus voltage has not been established, the third unidirectional conductive device D3 and the fifth unidirectional conductive device D5 are turned on to clamp the voltage stress of the second switch module T2 to the lower bus voltage.

[0035] Figure 4 To invent another embedded boost power conversion circuit diagram, such as Figure 4 As shown, it includes a power supply V in , inductor L, first switch module T1, second switch module T2, first unidirectional conduction device D1, second unidirectional conduction device D2, third unidirectional conduction device D3, fourth unidirectional conduction device D4, output upper bus capacitor C bus+ , Output bus capacitor C bus - and a load unit. The power supply V in , inductor L, first switch module T1, second switch module T2, are connected in series in sequence to form a loop, the first unidirectional conduction device D1 and the second unidirectional conduction device D2 are respectively connected in reverse parallel to the first switch module T1 and the second switch module T2, the third unidirectional conduction device D3, the fourth unidirectional conduction device D4, the output upper bus capacitor C bus+ , Output bus capacitor C bus - are connected in series in sequence, the anode of the third unidirectional conductive device D3 is connected to the series node of the inductor L and the first switch module T1, and the output lower bus capacitor C bus - The negative pole is connected to the power supply V in The load unit is connected to the output bus capacitor C bus+And the output bus capacitor C bus - output end, and also includes a clamping circuit module. The clamping circuit module includes a flying capacitor C fly , a fifth unidirectional conductive device D5 and a sixth unidirectional conductive device D6. The flying capacitor C fly The positive end of the flying capacitor C is electrically connected to the series node of the third unidirectional conductive device D3 and the fourth unidirectional conductive device D4. fly The negative end of the fifth unidirectional conductive device D5 is electrically connected to the node in series with the first switch module T1 and the second switch module T2. fly The cathode of the fifth unidirectional conductive device D5 is connected to the output bus capacitor C bus+ And the output bus capacitor C bus - are connected to the series node of the sixth unidirectional conducting device D6, the anode of the sixth unidirectional conducting device D6 is connected to the cathode of the fifth unidirectional conducting device D5, and the cathode of the sixth unidirectional conducting device D6 is connected to the anode of the fourth unidirectional conducting device D4.

[0036] Figure 5 for Figure 4 The working circuit diagram of the embedded circuit is a embedded boost power conversion circuit. When the bus voltage has been established and the power input is not powered on, the sixth unidirectional conductive device D6 is turned on to clamp the voltage stress of the fourth unidirectional conductive device D4 to the upper bus voltage.

[0037] When the circuit is operating normally, the first switch module T1 and the second switch module T2 can be divided into synchronous wave generation and staggered wave generation according to whether the wave generation modes are synchronized.

[0038] FIG6 shows the working conditions of the first switch module T1 and the second switch module T2 when they generate waves synchronously. Figure 6b for Figure 4 Schematic diagram of the current flow path corresponding to the four switching modes in the circuit, according to Figure 6a The driving signal diagram of the first switch module T1 and the second switch module T2 is as follows: Figure 6b As shown in (1), in the switching mode a, the first switch module T1 is turned on and the second switch module T2 is turned off. At this time, the power supply Vin, the inductor L, the first switch module T1, the fifth unidirectional conductive device D5, and the output lower bus capacitor Cbus- form a current loop. At this time, the voltage stress of the second switch module T2 is clamped to the lower bus voltage by the fifth unidirectional conductive device D5. Figure 6b As shown in (2), in the switching mode b, the first switch module T1 and the second switch module T2 are turned on at the same time, and the power supply Vin, the inductor L, the first switch module T1, and the second switch module T2 form a current loop. Figure 6bAs shown in (3), the working mode in switching mode c is the same as that in switching mode a. Figure 6b As shown in (4), in the switching mode d, the first switch module T1 and the second switch module T2 are turned off at the same time. At this time, the power supply Vin, the inductor L, the third unidirectional conduction device D3, the fourth unidirectional conduction device D4, the output upper bus capacitor Cbus+, and the output lower bus capacitor Cbus- form a current loop. Among them, the sixth unidirectional conduction device D6 embeds the voltage stress of the fourth unidirectional conduction device D4 into the upper bus voltage. Through the above analysis, we can see that under the working conditions of modes a and c, the power supply will charge the lower bus through L, T1 and D5, resulting in the lower bus energy being greater than the upper bus energy. The load unit needs to transfer part of the lower bus energy to the entire bus through real-time adjustment.

[0039] For the interleaved wave mode, there are 4 different working states according to the comparison between the input voltage and the bus voltage, and the comparison between the flying capacitor voltage Vfly and the upper bus voltage Vbus+:

[0040] State 1: When Vin>0.5Vbus, the duty cycle D of the switch module is <0.5, Vfly>Vbus+; Figure 7b for Figure 4 Schematic diagram of the current flow path corresponding to the four switching modes in the circuit, according to Figure 7a The driving signal diagram of the first switch module T1 and the second switch module T2 is as follows: Figure 7b As shown in (1), in the switching mode a, the first switch module T1 is turned on and the second switch module T2 is turned off. At this time, the power supply Vin, the inductor L, the first switch module T1, and the flying capacitor C fly The fourth unidirectional conducting device D4, the output upper bus capacitor Cbus+, and the output lower bus capacitor Cbus- form a current loop. At this time, the voltage stress of the second switch module T2 is blocked by the flying capacitor C fly Clamped to the bus voltage. Figure 7b As shown in (2), in the switching mode b, the first switch module T1 and the second switch module T2 are turned off at the same time. At this time, the power supply Vin, the inductor L, the third unidirectional conductive device D3, the fourth unidirectional conductive device D4, the output upper bus capacitor Cbus+, and the output lower bus capacitor Cbus- form a current loop. Figure 7b (3) As shown in the switching mode c, the first switch module T1 is turned off and the second switch module T2 is turned on. At this time, the power supply Vin, the inductor L, the third unidirectional conductive device D3, and the flying capacitor C fly , the second switch module T2 forms a current loop. Figure 7bAs shown in (4), in the switching mode d, the first switch module T1 and the second switch module T2 are turned off at the same time, and the power supply Vin, the inductor L, the third unidirectional conductive device D3, the fourth unidirectional conductive device D4, the output upper bus capacitor Cbus+, and the output lower bus capacitor Cbus- form a current loop. The sixth unidirectional conductive device D6 embeds the voltage stress of the fourth unidirectional conductive device D4 into the upper bus voltage.

[0041] State 2: When Vin>0.5Vbus, duty cycle D<0.5, Vfly <Vbus+;

[0042] Figure 8b for Figure 4 Schematic diagram of the current flow path corresponding to the four switching modes in the circuit, according to Figure 8a The driving signal diagram of the first switch module T1 and the second switch module T2 is as follows: Figure 8b As shown in (1), in the switching mode a, the first switch module T1 is turned on and the second switch module T2 is turned off. At this time, the power supply Vin, the inductor L, the first switch module T1, the fifth unidirectional conductive device D5, and the output lower bus capacitor Cbus- form a current loop. At this time, the voltage stress of the second switch module T2 is clamped to the lower bus voltage by the fifth unidirectional conductive device D5. Figure 8b As shown in (2), in the switching mode b, the first switch module T1 and the second switch module T2 are turned off at the same time. At this time, the power supply Vin, the inductor L, the third unidirectional conductive device D3, and the flying capacitor C fly , the fifth unidirectional conductive device D5, and the output lower bus capacitor Cbus- form a current loop. At this time, the voltage stress of the second switch module T2 is clamped to the lower bus voltage by the fifth unidirectional conductive device D5. Figure 8b (3) As shown in the switching mode c, the first switch module T1 is turned off and the second switch module T2 is turned on. At this time, the power supply Vin, the inductor L, the third unidirectional conductive device D3, and the flying capacitor C fly , the second switch module T2 forms a current loop. Figure 8b As shown in (4), in the switching mode d, the first switch module T1 and the second switch module T2 are turned off at the same time. At this time, the power supply Vin, the inductor L, the third unidirectional conductive device D3, and the flying capacitor C fly The fifth unidirectional conductive device D5 and the output lower bus capacitor Cbus- form a current loop, wherein the fifth unidirectional conductive device D5 clamps the second switch module T2 to the lower bus voltage.

[0043] State 3: When Vin<0.5Vbus, duty cycle D>0.5, Vfly>Vbus+;

[0044] Figure 9b for Figure 4Schematic diagram of the current flow path corresponding to the four switching modes in the circuit, according to Figure 9a The driving signal diagram of the first switch module T1 and the second switch module T2 is as follows: Figure 9b As shown in (1), in the switching mode a, the first switch module T1 and the second switch module T2 are turned on at the same time, and the power supply Vin, the inductor L, the first switch module T1, and the second switch module T2 form a current loop. Figure 9b As shown in (2), in switching mode b, the first switch module T1 is turned on and the second switch module T2 is turned off. At this time, the power supply Vin, the inductor L, the first switch module T1, and the flying capacitor C fly The fourth unidirectional conducting device D4, the output upper bus capacitor Cbus+, and the output lower bus capacitor Cbus- form a current loop. Figure 9b As shown in (3), in the switching mode c, the first switch module T1 and the second switch module T2 are turned on at the same time, and the power supply Vin, the inductor L, the first switch module T1, and the second switch module T2 form a current loop. Figure 9b (4) As shown in the switching mode d, the first switch module T1 is turned off and the second switch module T2 is turned on. At this time, the power supply Vin, the inductor L, the third unidirectional conductive device D3, and the flying capacitor C fly , the second switch module T2 forms a current loop.

[0045] State 4: When Vin<0.5Vbus, duty cycle D>0.5, Vfly <Vbus+;

[0046] Fig.10b for Figure 4 The schematic diagram of the current flow path corresponding to the four switching modes in the circuit is shown in Figure 10a according to the driving signal diagram of the first switch module T1 and the second switch module T2. Fig.10b As shown in (1), in the switching mode a, the first switch module T1 and the second switch module T2 are turned on at the same time, and the power supply Vin, the inductor L, the first switch module T1, and the second switch module T2 form a current loop. The sixth unidirectional conductive device D6 clamps the voltage of the fourth unidirectional conductive device D4 to the upper bus voltage. Fig.10b As shown in (2), in the switching mode b, the first switch module T1 is turned on and the second switch module T2 is turned off. At this time, the power supply Vin, the inductor L, the first switch module T1, the fifth unidirectional conductive device D5, and the output lower bus capacitor Cbus- form a current loop, wherein the fifth unidirectional conductive device D5 clamps the second switch module T2 to the lower bus voltage. Fig.10b As shown in (3), in the switching mode c, the first switch module T1 and the second switch module T2 are turned on at the same time, and the power supply Vin, the inductor L, the first switch module T1, and the second switch module T2 form a current loop. Fig.10b (4) As shown in the switching mode d, the first switch module T1 is turned off and the second switch module T2 is turned on. At this time, the power supply Vin, the inductor L, the third unidirectional conductive device D3, and the flying capacitor C fly , the second switch module T2 forms a current loop.

[0047] Fig.11 Based Figure 4 Mirror image circuit diagram, as shown in the figure, a embedded boost power conversion circuit, which includes a power supply V in , inductor L, first switch module T1, second switch module T2, first unidirectional conduction device D1, second unidirectional conduction device D2, third unidirectional conduction device D3, fourth unidirectional conduction device D4, output upper bus capacitor C bus+ , Output bus capacitor C bus - and a load unit. The power supply V in The first switch module T1, the second switch module T2, and the inductor L are connected in series in sequence to form a loop. The first unidirectional conductive device D1 and the second unidirectional conductive device D2 are respectively connected in reverse parallel to the first switch module T1 and the second switch module T2, and the output bus capacitor C bus+ , Output bus capacitor C bus -, the fourth unidirectional conductive device D4, and the third unidirectional conductive device D3 are connected in series in sequence, the cathode of the third unidirectional conductive device D3 is connected to the series node of the inductor L and the second switch module T2, and the output upper bus capacitor C bus+ The positive terminal is connected to the power supply V in The load unit is connected to the output end of the upper and lower bus capacitors, and the clamping circuit module includes a flying capacitor C fly , a fifth unidirectional conductive device D5 and a sixth unidirectional conductive device D6. The flying capacitor C fly The positive end of the flying capacitor C is electrically connected to the node in series between the first switch module and the second switch module. fly The negative end of the third unidirectional conductive device D3 and the fourth unidirectional conductive device D4 are electrically connected to the series node, and the cathode of the fifth unidirectional conductive device D5 is electrically connected to the flying capacitor C fly The anode of the fifth unidirectional conductive device D5 is connected to the output bus capacitor C bus+ And the output bus capacitor C bus - is connected to a series node line, the cathode of the sixth unidirectional conducting device D6 is connected to the anode of the fifth unidirectional conducting device D5, and the anode of the sixth unidirectional conducting device D6 is connected to the cathode of the fourth unidirectional conducting device D4.

Claims

1. A clamping type boost power conversion circuit, comprising a power supply V in , inductor L, first switch module T1, second switch module T2, first unidirectional conduction device D1, second unidirectional conduction device D2, third unidirectional conduction device D3, fourth unidirectional conduction device D4, output upper bus capacitor C bus+ , Output bus capacitor C bus- and a load unit; the power supply V in , inductor L, first switch module T1, second switch module T2, are connected in series in sequence to form a loop, the first unidirectional conduction device D1 and the second unidirectional conduction device D2 are respectively connected in reverse parallel to the first switch module T1 and the second switch module T2, the third unidirectional conduction device D3, the fourth unidirectional conduction device D4, the output upper bus capacitor C bus+ , Output bus capacitor C bus- The anode of the third unidirectional conductive device D3 is connected to the series node of the inductor L and the first switch module T1, and the output lower bus capacitor C bus- The negative pole of the power supply V in The load unit is connected to the output bus capacitor C bus+ And the output bus capacitor C bus- The output terminal is characterized by: Also includes a clamping circuit module; The clamping circuit module includes a flying capacitor C fly and the fifth unidirectional conductive device D5, the flying capacitor C fly The positive end of the flying capacitor C is electrically connected to the series node of the third unidirectional conductive device D3 and the fourth unidirectional conductive device D4. fly The negative end of the fifth unidirectional conductive device D5 is electrically connected to the node in series with the first switch module T1 and the second switch module T2; the anode of the fifth unidirectional conductive device D5 is electrically connected to the flying capacitor C fly The cathode of the fifth unidirectional conductive device D5 is connected to the output bus capacitor C bus+ And the output bus capacitor C bus- The series nodes are connected; When the power supply voltage has been established but the bus voltage has not been established, the fifth unidirectional conducting device D5 clamps the voltage stress of the second switch module T2 to the lower bus voltage.

2. A clamping type boost power conversion circuit, comprising a power supply V in , inductor L, first switch module T1, second switch module T2, first unidirectional conduction device D1, second unidirectional conduction device D2, third unidirectional conduction device D3, fourth unidirectional conduction device D4, output upper bus capacitor C bus+ , Output bus capacitor C bus- and a load unit; the power supply V in , inductor L, first switch module T1, second switch module T2, are connected in series in sequence to form a loop, the first unidirectional conduction device D1 and the second unidirectional conduction device D2 are respectively connected in reverse parallel to the first switch module T1 and the second switch module T2, the third unidirectional conduction device D3, the fourth unidirectional conduction device D4, the output upper bus capacitor C bus+ , Output bus capacitor C bus- The anode of the third unidirectional conductive device D3 is connected to the series node of the inductor L and the first switch module T1, and the output lower bus capacitor C bus- The negative pole of the power supply V in The load unit is connected to the output bus capacitor C bus+ And the output bus capacitor C bus- The output terminal is characterized by: Also includes a clamping circuit module; The clamping circuit module includes a flying capacitor C fly , a fifth unidirectional conductive device D5 and a sixth unidirectional conductive device D6, the flying capacitor C fly The positive end of the flying capacitor C is electrically connected to the series node of the third unidirectional conductive device D3 and the fourth unidirectional conductive device D4. fly The negative end of the fifth unidirectional conductive device D5 is electrically connected to the node in series with the first switch module T1 and the second switch module T2; the anode of the fifth unidirectional conductive device D5 is electrically connected to the flying capacitor C fly The cathode of the fifth unidirectional conductive device D5 is connected to the output bus capacitor C bus+ And the output bus capacitor C bus- The anode of the sixth unidirectional conductive device D6 is connected to the cathode of the fifth unidirectional conductive device D5, and the cathode of the sixth unidirectional conductive device D6 is connected to the anode of the fourth unidirectional conductive device D4; When the bus voltage is established and the power input is not powered on, the sixth unidirectional conductive device D6 clamps the voltage stress of the fourth unidirectional conductive device D4 to the upper bus voltage.

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