Ultra-low voltage DC frequency conversion controller and parking air conditioner
By designing an ultra-low voltage DC frequency converter in a DC frequency converter, the sine wave voltage/current waveform and compressor protection are achieved, and the problems of high harmonics and noise in the existing technology are solved, and efficiency and electromagnetic compatibility performance are improved.
Patent Information
- Application Number
- CN202010702154.0
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2020-07-18
- Publication Date
- 2024-12-27
- Estimated Expiration
- 2040-07-18
AI Technical Summary
Existing DC frequency inverter air conditioners have problems such as high harmonics, poor electromagnetic compatibility performance and high operating noise, resulting in high vibration noise during the compressor operation.
Design an ultra-low voltage DC frequency converter, through the combination of DC output assembly circuit and control circuit, the compressor voltage/current waveform is sine wave, reduce harmonic interference, and is equipped with a compressor phase current overcurrent protection circuit to prevent compression The machine is damaged.
It realizes the advantages of low harmonic interference, low operating noise and high efficiency, effectively protects the compressor and reduces vibration noise.
Smart Images

Figure CN111697909B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to the technical field of controllers, and in particular to an ultra-low voltage direct current frequency conversion controller and a parking air conditioner. Background Art
[0002] Most of the existing air conditioners are fixed speed controlled, and the cooling capacity can only be adjusted by "on and off" mode, resulting in large temperature fluctuations. Judging from the development trends at home and abroad, high-efficiency and energy-saving variable frequency air conditioners are gradually becoming the mainstream of consumption. At present, variable frequency drives are divided into two categories: AC and DC. Compared with DC variable frequency drives, AC variable frequency drives have disadvantages such as large copper / iron losses and eddy current losses. DC variable frequency compressors mainly use permanent magnet synchronous motors (PMSM for short), which have the advantages of small size and high efficiency.
[0003] At present, the main frequency conversion drive is the rectangular wave mode of "two phases conducting at the same time". The phase current waveform is approximately rectangular, resulting in abundant high-order harmonics in the main circuit and poor electromagnetic compatibility. In addition, when running at low frequency, the torque fluctuates greatly, so the vibration noise of the compressor is relatively large. Summary of the invention
[0004] The present invention aims to solve the above technical problems and proposes an ultra-low voltage DC frequency conversion controller and a parking air conditioner which can implement a compressor voltage / current waveform that is a sine wave, thereby having the advantages of small harmonic interference, low operating noise and high efficiency.
[0005] The object of the present invention is achieved as follows: an ultra-low voltage DC frequency conversion controller comprises a power supply circuit, wherein:
[0006] A DC output assembly circuit, the DC output assembly circuit is used to connect to the compressor and output a 24V DC voltage to the compressor;
[0007] DC fan interface circuit, the DC fan interface circuit is used to connect with the fan, and the DC fan interface circuit is also connected with the compressor phase current overcurrent protection circuit and the sampling circuit; the compressor phase current overcurrent protection circuit is used to limit the output voltage value of the DC output assembly circuit, and the sampling circuit is used to detect the voltage signal of the DC output assembly circuit;
[0008] The control circuit includes a control chip IC1, the model of the control chip IC1 is R5F24TXADFM, the control circuit is respectively connected with a serial communication sending circuit, a serial communication receiving circuit and an external circuit, the compressor phase current overcurrent protection circuit and the sampling circuit respectively transmit the detection parameters to the control circuit, and the DC fan interface circuit and the DC output assembly circuit are respectively connected with the control circuit;
[0009] The power supply circuit supplies power to the DC fan interface circuit, the DC output assembly circuit, the control circuit, the serial communication sending circuit, the serial communication receiving circuit and the external circuit respectively.
[0010] Specifically, the DC output assembly circuit includes a first DC output circuit, a second DC output circuit and a third DC output circuit.
[0011] Specifically, the first DC output circuit includes a chip IC6, a transistor Q23, a transistor Q24, a field effect transistor Q1, a field effect transistor Q2, a field effect transistor Q3, a field effect transistor Q4, a capacitor C55 and a capacitor E14, pin 2 of the chip IC6 is connected to a resistor R66, the resistor R66 is connected to the RWM-UP terminal, pin 3 of the chip IC6 is connected to a resistor R67, the resistor R67 is connected to the RWM-UN terminal, pin 7 of the chip IC6 is connected to the base of the transistor Q23, pin E of the transistor Q23 is respectively connected to pin 1 of the field effect transistor Q1 and pin 1 of the field effect transistor Q2, pin 2 of the field effect transistor Q1 is connected to pin 2 of the field effect transistor Q2, and pin C of the transistor Q23 is respectively connected to pin 3 of the field effect transistor Q1 and pin 3 of the field effect transistor Q2;
[0012] Pin 5 of chip IC6 is connected to the base of transistor Q24, pin E of transistor Q24 is respectively connected to pin 1 of field effect transistor Q3 and pin 1 of field effect transistor Q4, pin 2 of field effect transistor Q3 is connected to pin 2 of field effect transistor Q4, and pin C of transistor Q24 is respectively connected to pin 3 of field effect transistor Q3 and pin 3 of field effect transistor Q4;
[0013] The common end between the 3rd pin of the field effect transistor Q1, the 3rd pin of the field effect transistor Q2, the 2nd pin of the field effect transistor Q3 and the 2nd pin of the field effect transistor Q4 is connected with the U end;
[0014] The common end between pin 2 of field effect transistor Q1 and pin 2 of field effect transistor Q2 is connected to the DCBUS end, and the DCBUS end is also connected to the V-DCBUS end. Capacitor C55 and capacitor E14 are connected in parallel, and one side of the common end of capacitor C55 and capacitor E14 is connected to the DCBUS end, and the other side of the common end of capacitor C55 and capacitor E14 is connected to the ground terminal GND2.
[0015] Specifically, the second DC output circuit includes a chip IC7, a transistor Q25, a transistor Q26, a field effect transistor Q5, a field effect transistor Q6, a field effect transistor Q7, a field effect transistor Q8, a capacitor C57 and a capacitor E16, pin 2 of the chip IC7 is connected to a resistor R68, the resistor R68 is connected to the RWM-VP terminal, pin 3 of the chip IC7 is connected to a resistor R69, the resistor R69 is connected to the RWM-VN terminal, pin 7 of the chip IC7 is connected to the base of the transistor Q25, pin E of the transistor Q25 is respectively connected to pin 1 of the field effect transistor Q5 and pin 1 of the field effect transistor Q6, pin 2 of the field effect transistor Q5 is connected to pin 2 of the field effect transistor Q6, and pin C of the transistor Q25 is respectively connected to pin 3 of the field effect transistor Q5 and pin 3 of the field effect transistor Q6;
[0016] Pin 5 of chip IC7 is connected to the base of transistor Q26, pin E of transistor Q26 is respectively connected to pin 1 of field effect transistor Q7 and pin 1 of field effect transistor Q8, pin 2 of field effect transistor Q7 is connected to pin 2 of field effect transistor Q8, and pin C of transistor Q26 is respectively connected to pin 3 of field effect transistor Q7 and pin 3 of field effect transistor Q8;
[0017] The common end between the 3rd pin of the field effect transistor Q5, the 3rd pin of the field effect transistor Q6, the 2nd pin of the field effect transistor Q7 and the 2nd pin of the field effect transistor Q8 is connected to the V end;
[0018] The common end between pin 2 of field effect transistor Q5 and pin 2 of field effect transistor Q2 is connected to the DCBUS end, capacitor C55 and capacitor E14 are connected in parallel, one side of the common end of capacitor C55 and capacitor E14 is connected to the DCBUS end, and the other side of the common end of capacitor C55 and capacitor E14 is connected to the ground terminal GND2.
[0019] Specifically, the third DC output circuit includes a chip IC8, a transistor Q27, a transistor Q28, a field effect transistor Q9, a field effect transistor Q10, a field effect transistor Q11, a field effect transistor Q12, a capacitor C56 and a capacitor E15, pin 2 of the chip IC8 is connected to a resistor R70, the resistor R70 is connected to the RWM-WP terminal, the pin 3 of the chip IC8 is connected to a resistor R71, the resistor R71 is connected to the RWM-WN terminal, the pin 7 of the chip IC8 is connected to the base of the transistor Q27, the E pin of the transistor Q27 is respectively connected to the 1 pin of the field effect transistor Q9 and the 1 pin of the field effect transistor Q10, the 2 pin of the field effect transistor Q9 is connected to the 2 pin of the field effect transistor Q10, and the C pin of the transistor Q27 is respectively connected to the 3 pin of the field effect transistor Q9 and the 3 pin of the field effect transistor Q10;
[0020] Pin 5 of chip IC8 is connected to the base of transistor Q28, pin E of transistor Q28 is respectively connected to pin 1 of field effect transistor Q11 and pin 1 of field effect transistor Q12, pin 2 of field effect transistor Q11 is connected to pin 2 of field effect transistor Q12, and pin C of transistor Q28 is respectively connected to pin 3 of field effect transistor Q11 and pin 3 of field effect transistor Q12;
[0021] The common end between the 3rd pin of the field effect transistor Q9, the 3rd pin of the field effect transistor Q10, the 2nd pin of the field effect transistor Q11 and the 2nd pin of the field effect transistor Q12 is connected to the W end;
[0022] The common end between pin 2 of field effect transistor Q9 and pin 2 of field effect transistor Q10 is connected to the DCBUS end, capacitor C55 and capacitor E14 are connected in parallel, one side common end of capacitor C56 and capacitor E15 is connected to the DCBUS end, and the other side common end of capacitor C56 and capacitor E15 is connected to the ground terminal GND2.
[0023] Specifically, the compressor phase current overcurrent protection circuit includes an operational amplifier IC5A, an operational amplifier IC5B, an FO terminal, a resistor RS1, a resistor RS2 and a resistor RS3, wherein the resistors RS1, RS2 and RS3 are connected in parallel, a common end of one side of the resistors RS1, RS2 and RS3 is connected to pin 6 of the operational amplifier IC5B, a common end of the other side of the resistors RS1, RS2 and RS3 is connected to pin 5 of the operational amplifier IC5B, pin 7 of the operational amplifier IC5B is connected to pin 3 of the operational amplifier IC5A, and pin 1 of the operational amplifier IC5A is connected to the FO terminal;
[0024] The sampling circuit includes a sampling chip IC9, an I-MOS terminal, a resistor R95, a resistor R96, a capacitor C50, a resistor R118 and a resistor R119. The resistor R95 and the resistor R96 are connected in series, and a common end of the resistor R95 and the resistor R96 is connected to the 3rd pin of the sampling chip IC9. The 7th pin of the sampling chip IC9 is connected to the I-MOS terminal. The 6th pin of the sampling chip IC9 is connected to the resistor R118, and the 5th pin of the sampling chip IC9 is connected to the resistor R119.
[0025] Specifically, the serial communication sending circuit includes a transistor Q21, a resistor R30, a resistor R32, a resistor R34, a resistor R36, a TXD end, a TXD-OUT end and a capacitor C18, the TXD end is connected to the resistor R30, the resistor R30 is connected to the B end of the transistor Q21, the resistor R34 is connected to the C end of the transistor Q21, the C end of the transistor Q21 and the common end of the resistor R34 are connected to a resistor R36, the resistor R36 is connected to the TXD-OUT end, the common end of the resistor R36 and the TXD-OUT end is connected to one end of the capacitor C18, the other end of the capacitor C18 is connected to the E end of the transistor Q21, one end of the resistor R32 is connected to the B end of the transistor Q21, and the other end of the resistor R32 is connected to the E end of the transistor Q21;
[0026] The serial communication receiving circuit includes a transistor Q22, a resistor R31, a resistor R33, a capacitor C15, a capacitor C17, a resistor R35, a resistor R37, an RXD terminal, a diode DZ3 and an RXD-OUT terminal. The resistor R37, the diode DZ3 and the RXD-OUT terminal are connected in series, one end of the resistor R37 is connected to the B pin of the transistor Q22, the capacitor C15 and the resistor R35 are connected in parallel, a common end on one side of the capacitor C15 and the resistor R35 is connected to the B pin of the transistor Q22, and the other common end of the capacitor C15 and the resistor R35 is connected to the E pin of the transistor Q22, the RXD terminal is connected to one end of the resistor R31, the other end of the resistor R31 is connected to the resistor R33, and the common end between the other end of the resistor R31 and the resistor R33 is connected to the C pin of the transistor Q22.
[0027] Specifically, the power supply circuit includes a buck chip IC2 and a buck chip IC3, and pin 2 of the buck chip IC2 is connected to pin 3 of the buck chip IC3;
[0028] The DC fan interface circuit includes a transistor Q19 and a DC fan interface. The FAN-PWM terminal of the DC fan interface is connected to the transistor Q19. The FAN-FB terminal of the DC fan interface is connected to the DCFAN-FB terminal. A resistor R8 is connected between the FAN-FB terminal and the DCFAN-FB terminal.
[0029] Specifically, the external circuit includes a chip IC4, a connector CN3, a resistor R59, a resistor R60, a resistor R61 and a capacitor C23, pin 8 of the chip IC4 is connected to the resistor R59, pin 7 of the chip IC4 is connected to the resistor R62, pin 6 of the chip IC4 is connected to the resistor R60, pin 5 of the chip IC4 is connected to the resistor R61, the two ends of the capacitor C23 are respectively connected to pin 1 and pin 8 of the chip IC4, and the connector CN3 is connected to the chip IC4.
[0030] The present invention discloses a parking air conditioner using an ultra-low voltage DC frequency conversion controller, comprising the ultra-low voltage DC frequency conversion controller.
[0031] Beneficial effects of the present invention: This circuit implements a compressor voltage / current waveform that is a sine wave through a combination of a DC output assembly circuit and a control circuit, and thus has the advantages of small harmonic interference, low operating noise and high efficiency. In conjunction with the compressor phase current overcurrent protection circuit, the compressor can be effectively protected and damage to the compressor can be avoided. BRIEF DESCRIPTION OF THE DRAWINGS
[0032] The above and / or additional aspects and advantages of the present invention will become apparent and easily understood from the description of the embodiments with reference to the following drawings.
[0033] Figure 1 It is a control circuit diagram of the present invention.
[0034] Figure 2 It is the external circuit diagram of the present invention.
[0035] Figure 3 It is a power supply circuit diagram of the present invention.
[0036] Figure 4 This is the DC fan interface circuit diagram of the present invention.
[0037] Figure 5 This is a serial communication sending circuit diagram of the present invention.
[0038] Figure 6 It is a serial communication receiving circuit diagram of the present invention.
[0039] Figure 7 The present invention is a connection diagram of the DC output assembly circuit, the compressor phase current overcurrent protection circuit and the sampling circuit.
[0040] The markings as shown in the attached figure are as follows:
[0041] Control circuit 1, external circuit 2, power supply circuit 3, DC fan interface circuit 4, serial communication sending circuit 5, serial communication receiving circuit 6, DC output assembly circuit 7, first DC output circuit 701, second DC output circuit 702, third DC output circuit 703, compressor phase current overcurrent protection circuit 704, sampling circuit 705. DETAILED DESCRIPTION
[0042] Embodiments of the present invention are described in detail below, examples of which are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.
[0043] Reference below Figures 1 to 7 The ultra-low voltage DC frequency conversion controller according to an embodiment of the present invention includes a power supply circuit 3, wherein:
[0044] A DC output assembly circuit 7, the DC output assembly circuit 7 is used to connect to the compressor and output a 24V DC voltage to the compressor;
[0045] DC fan interface circuit 4, DC fan interface circuit 4 is used to connect to the fan, and DC fan interface circuit 4 is also connected to compressor phase current overcurrent protection circuit 704 and sampling circuit 705; compressor phase current overcurrent protection circuit 704 is used to limit the output voltage value of DC output assembly circuit 7, and sampling circuit 705 is used to detect the voltage signal of DC output assembly circuit 7;
[0046] The control circuit 1 includes a control chip IC1, the model of the control chip IC1 is R5F24TXADFM, the control circuit 1 is respectively connected to a serial communication sending circuit 5, a serial communication receiving circuit 6 and an external circuit 2, the compressor phase current overcurrent protection circuit 704 and the sampling circuit 705 respectively transmit the detection parameters to the control circuit 1, and the DC fan interface circuit 4 and the DC output assembly circuit 7 are respectively connected to the control circuit 1;
[0047] The power supply circuit 3 supplies power to the DC fan interface circuit 4, the DC output assembly circuit 7, the control circuit 1, the serial communication sending circuit 5, the serial communication receiving circuit 6 and the external circuit 2 respectively.
[0048] This circuit combines the DC output assembly circuit 7 and the control circuit 1 to implement a sine wave voltage / current waveform for the compressor, thereby having the advantages of small harmonic interference, low operating noise and high efficiency. In conjunction with the compressor phase current overcurrent protection circuit 704, the compressor is effectively protected and damage to the compressor is avoided.
[0049] The DC output assembly circuit 7 of the present invention comprises a first DC output circuit 701, a second DC output circuit 702 and a third DC output circuit 703. The control circuit 1 is connected to the DC output assembly circuit 7, so as to control the control working state of the first DC output circuit 701, the second DC output circuit 702 and the third DC output circuit 703; the first DC output circuit 701, the second DC output circuit 702 and the third DC output circuit 703 are connected to the compressor respectively, and the first DC output circuit 701, the second DC output circuit 702 and the third DC output circuit 703 are boosted to DC 24V, and the DC 24V is input to the compressor to start.
[0050] Specifically, the first DC output circuit 701 includes a chip IC6, a transistor Q23, a transistor Q24, a field effect transistor Q1, a field effect transistor Q2, a field effect transistor Q3, a field effect transistor Q4, a capacitor C55 and a capacitor E14, a pin 2 of the chip IC6 is connected to a resistor R66, the resistor R66 is connected to the RWM-UP terminal, a pin 3 of the chip IC6 is connected to a resistor R67, the resistor R67 is connected to the RWM-UN terminal, and the chip IC6 The 7th pin of the transistor is connected to the base of the transistor Q23, the E pin of the transistor Q23 is respectively connected to the 1st pin of the field effect transistor Q1 and the 1st pin of the field effect transistor Q2, the 2nd pin of the field effect transistor Q1 is connected to the 2nd pin of the field effect transistor Q2, and the C pin of the transistor Q23 is respectively connected to the 3rd pin of the field effect transistor Q1 and the 3rd pin of the field effect transistor Q2; the RWM-UP end is connected to the 34th pin of the control chip IC1, and the RWM-UN end is connected to the 37th pin of the control chip IC1;
[0051] Pin 5 of chip IC6 is connected to the base of transistor Q24, pin E of transistor Q24 is respectively connected to pin 1 of field effect transistor Q3 and pin 1 of field effect transistor Q4, pin 2 of field effect transistor Q3 is connected to pin 2 of field effect transistor Q4, and pin C of transistor Q24 is respectively connected to pin 3 of field effect transistor Q3 and pin 3 of field effect transistor Q4;
[0052] The common end between the 3rd pin of the field effect transistor Q1, the 3rd pin of the field effect transistor Q2, the 2nd pin of the field effect transistor Q3 and the 2nd pin of the field effect transistor Q4 is connected with the U end;
[0053] The common end between pin 2 of field effect transistor Q1 and pin 2 of field effect transistor Q2 is connected to the DCBUS end, and the DCBUS end is also connected to the V-DCBUS end. Capacitor C55 and capacitor E14 are connected in parallel, and one side of the common end of capacitor C55 and capacitor E14 is connected to the DCBUS end, and the other side of the common end of capacitor C55 and capacitor E14 is connected to the ground terminal GND2.
[0054] Pins 34 and 37 of the control chip IC1 are connected to the chip IC6 respectively, and control the working state of the chip IC6. The chip IC6 controls the conduction or disconnection of the transistor Q23 and the transistor Q24; when the pin 3 of the field effect transistor Q1, the pin 3 of the field effect transistor Q2, the pin 2 of the field effect transistor Q3 and the pin 2 of the field effect transistor Q4 are combined, the power is amplified.
[0055] Specifically, the second DC output circuit 702 includes a chip IC7, a transistor Q25, a transistor Q26, a field effect transistor Q5, a field effect transistor Q6, a field effect transistor Q7, a field effect transistor Q8, a capacitor C57 and a capacitor E16. Pin 2 of the chip IC7 is connected to a resistor R68, which is connected to the RWM-VP terminal. Pin 3 of the chip IC7 is connected to a resistor R69, which is connected to the RWM-VN terminal. Pin 7 of the chip IC7 is connected to the base of the transistor Q25. Pin E of the transistor Q25 is respectively connected to pin 1 of the field effect transistor Q5 and pin 1 of the field effect transistor Q6. Pin 2 of the field effect transistor Q5 is connected to pin 2 of the field effect transistor Q6. Pin C of the transistor Q25 is respectively connected to pin 3 of the field effect transistor Q5 and pin 3 of the field effect transistor Q6. The RWM-VP terminal is connected to pin 34 of the control chip IC1. The RWM-VN terminal is connected to the 36th pin of the control chip IC1;
[0056] Pin 5 of chip IC7 is connected to the base of transistor Q26, pin E of transistor Q26 is respectively connected to pin 1 of field effect transistor Q7 and pin 1 of field effect transistor Q8, pin 2 of field effect transistor Q7 is connected to pin 2 of field effect transistor Q8, and pin C of transistor Q26 is respectively connected to pin 3 of field effect transistor Q7 and pin 3 of field effect transistor Q8;
[0057] The common end between the 3rd pin of the field effect transistor Q5, the 3rd pin of the field effect transistor Q6, the 2nd pin of the field effect transistor Q7 and the 2nd pin of the field effect transistor Q8 is connected to the V end;
[0058] The common end between pin 2 of field effect transistor Q5 and pin 2 of field effect transistor Q2 is connected to the DCBUS end, capacitor C55 and capacitor E14 are connected in parallel, one side of the common end of capacitor C55 and capacitor E14 is connected to the DCBUS end, and the other side of the common end of capacitor C55 and capacitor E14 is connected to the ground terminal GND2.
[0059] Specifically, the third DC output circuit 703 includes a chip IC8, a transistor Q27, a transistor Q28, a field effect transistor Q9, a field effect transistor Q10, a field effect transistor Q11, a field effect transistor Q12, a capacitor C56 and a capacitor E15. Pin 2 of the chip IC8 is connected to a resistor R70, which is connected to the RWM-WP terminal. Pin 3 of the chip IC8 is connected to a resistor R71, which is connected to the RWM-WN terminal. The chip IC8 The 7th pin of the transistor is connected to the base of the transistor Q27, the E pin of the transistor Q27 is respectively connected to the 1st pin of the field effect transistor Q9 and the 1st pin of the field effect transistor Q10, the 2nd pin of the field effect transistor Q9 is connected to the 2nd pin of the field effect transistor Q10, and the C pin of the transistor Q27 is respectively connected to the 3rd pin of the field effect transistor Q9 and the 3rd pin of the field effect transistor Q10; the RWM-WP end is connected to the 33rd pin of the control chip IC1, and the RWM-WN end is connected to the 35th pin of the control chip IC1;
[0060] Pin 5 of chip IC8 is connected to the base of transistor Q28, pin E of transistor Q28 is respectively connected to pin 1 of field effect transistor Q11 and pin 1 of field effect transistor Q12, pin 2 of field effect transistor Q11 is connected to pin 2 of field effect transistor Q12, and pin C of transistor Q28 is respectively connected to pin 3 of field effect transistor Q11 and pin 3 of field effect transistor Q12;
[0061] The common end between the 3rd pin of the field effect transistor Q9, the 3rd pin of the field effect transistor Q10, the 2nd pin of the field effect transistor Q11 and the 2nd pin of the field effect transistor Q12 is connected to the W end;
[0062] The common end between pin 2 of field effect transistor Q9 and pin 2 of field effect transistor Q10 is connected to the DCBUS end, capacitor C55 and capacitor E14 are connected in parallel, one side common end of capacitor C56 and capacitor E15 is connected to the DCBUS end, and the other side common end of capacitor C56 and capacitor E15 is connected to the ground terminal GND2.
[0063] Specifically, the compressor phase current overcurrent protection circuit 704 includes an operational amplifier IC5A, an operational amplifier IC5B, an FO terminal, a resistor RS1, a resistor RS2 and a resistor RS3, wherein the resistors RS1, RS2 and RS3 are connected in parallel, and one common end of the resistors RS1, RS2 and RS3 is connected to the 6th pin of the operational amplifier IC5B, and the other common end of the resistors RS1, RS2 and RS3 is connected to the 5th pin of the operational amplifier IC5B, and the 7th pin of the operational amplifier IC5B is connected to the 3rd pin of the operational amplifier IC5A, and the 1st pin of the operational amplifier IC5A is connected to the FO terminal; the compressor phase current overcurrent protection circuit 704 is connected to the DC output assembly circuit 7, the operational amplifier IC5A and the operational amplifier IC5B are combined and input parameters to the control circuit 1, and the control circuit 1 receives the parameters, and when the parameters exceed the set value in the control circuit 1, the output state is stopped, and the DC output assembly circuit 7 is in the stopped state; The FO terminal is connected to the 38th pin of the control chip IC1, so the compressor phase current overcurrent protection circuit 704 detects the voltage of the DC output assembly circuit 7. When the voltage of the DC output assembly circuit 7 is higher than the specified value, the compressor phase current overcurrent protection circuit 704 outputs an electrical signal to the control circuit 1. The control circuit 1 stops outputting electrical signals, so that the chips IC6, IC7 and IC8 stop outputting electrical signals at the same time, and the bases of transistors Q23, Q24, Q25, Q26, Q27 and Q28 are powered off at the same time and are in a stopped state, so that the entire DC output assembly circuit 7 stops working, thereby protecting the compressor.
[0064] The sampling circuit 705 includes a sampling chip IC9, an I-MOS terminal, a resistor R95, a resistor R96, a capacitor C50, a resistor R118, and a resistor R119. The resistor R95 and the resistor R96 are connected in series, and the common terminal of the resistor R95 and the resistor R96 is connected to the 3rd pin of the sampling chip IC9. The 7th pin of the sampling chip IC9 is connected to the I-MOS terminal. The 6th pin of the sampling chip IC9 is connected to the resistor R118, and the 5th pin of the sampling chip IC9 is connected to the resistor R119. The sampling circuit 705 mainly collects the current of the DC output assembly circuit 7 and feeds it back to the control circuit 1, and the I-MOS terminal of the sampling circuit 705 is connected to the 57th pin of the control chip IC1.
[0065] Specifically, the serial communication sending circuit 5 includes a transistor Q21, a resistor R30, a resistor R32, a resistor R34, a resistor R36, a TXD terminal, a TXD-OUT terminal and a capacitor C18, the TXD terminal is connected to the resistor R30, the resistor R30 is connected to the B terminal of the transistor Q21, the resistor R34 is connected to the C terminal of the transistor Q21, the C terminal of the transistor Q21 and the common terminal of the resistor R34 are connected to a resistor R36, the resistor R36 is connected to the TXD-OUT terminal, the common terminal of the resistor R36 and the TXD-OUT terminal is connected to one end of the capacitor C18, the other end of the capacitor C18 is connected to the E terminal of the transistor Q21, one end of the resistor R32 is connected to the B terminal of the transistor Q21, and the other end of the resistor R32 is connected to the E terminal of the transistor Q21; the TXD terminal is connected to pin 18 of the control chip IC1.
[0066] The serial communication receiving circuit 6 includes a transistor Q22, a resistor R31, a resistor R33, a capacitor C15, a capacitor C17, a resistor R35, a resistor R37, an RXD terminal, a diode DZ3 and an RXD-OUT terminal, wherein the resistor R37, the diode DZ3 and the RXD-OUT terminal are connected in series, one end of the resistor R37 is connected to the B pin of the transistor Q22, the capacitor C15 and the resistor R35 are connected in parallel, one side common end of the capacitor C15 and the resistor R35 is connected to the B pin of the transistor Q22, the other side common end of the capacitor C15 and the resistor R35 is connected to the E pin of the transistor Q22, the RXD terminal is connected to one end of the resistor R31, the other end of the resistor R31 is connected to the resistor R33, and the common end between the other end of the resistor R31 and the resistor R33 is connected to the C pin of the transistor Q22. The serial communication sending circuit 5 and the serial communication receiving circuit 6 are combined and used to connect external devices, such as a controller. The RXD terminal is connected to the 17th pin of the control chip IC1.
[0067] Specifically, the power supply circuit 3 includes a buck chip IC2 and a buck chip IC3, and the pin 2 of the buck chip IC2 is connected to the pin 3 of the buck chip IC3;
[0068] The DC fan interface circuit 4 includes a transistor Q19 and a DC fan interface, the FAN-PWM terminal of the DC fan interface is connected to the transistor Q19, the FAN-FB terminal of the DC fan interface is connected to the DCFAN-FB terminal, and a resistor R8 is connected between the FAN-FB terminal and the DCFAN-FB terminal. The DC fan interface circuit 4 is used to connect to the DC fan. The DCFAN-FB terminal is connected to the 64th pin of the control chip IC1. The DCFAN-FB terminal is connected to the 64th pin of the control chip IC1, the DCFAN-FB terminal is connected to the base of the transistor Q19, and the DCFAN-FB terminal is also connected to the 12th pin of the control chip IC1.
[0069] Specifically, the external circuit 2 includes a chip IC4, a connector CN3, a resistor R59, a resistor R60, a resistor R61 and a capacitor C23, pin 8 of the chip IC4 is connected to the resistor R59, pin 7 of the chip IC4 is connected to the resistor R62, pin 6 of the chip IC4 is connected to the resistor R60, pin 5 of the chip IC4 is connected to the resistor R61, the two ends of the capacitor C23 are respectively connected to pin 1 and pin 8 of the chip IC4, and the connector CN3 is connected to the chip IC4; the external circuit 2 is used to assist in connecting equipment.
[0070] The present invention discloses a parking air conditioner using an ultra-low voltage DC variable frequency controller, which includes the ultra-low voltage DC variable frequency controller mentioned above.
[0071] Although the embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.
Claims
1. An ultra-low voltage DC frequency conversion controller, comprising a power supply circuit (3), characterized in that: A DC output assembly circuit (7), the DC output assembly circuit (7) is used to connect to the compressor and output a 24V DC voltage to the compressor; A DC fan interface circuit (4), the DC fan interface circuit (4) is used to connect to the fan, and the DC fan interface circuit (4) is also connected to a compressor phase current overcurrent protection circuit (704) and a sampling circuit (705); the compressor phase current overcurrent protection circuit (704) is used to limit the output voltage value of the DC output assembly circuit (7), and the sampling circuit (705) is used to detect the voltage signal of the DC output assembly circuit (7); The control circuit (1) comprises a control chip IC1, the model of the control chip IC1 is R5F24TXADFM, the control circuit (1) is respectively connected to a serial communication sending circuit (5), a serial communication receiving circuit (6) and an external circuit (2), the compressor phase current overcurrent protection circuit (704) and the sampling circuit (705) respectively transmit the detection parameters to the control circuit (1), and the DC fan interface circuit (4) and the DC output assembly circuit (7) are respectively connected to the control circuit (1); The power supply circuit (3) supplies power to the DC fan interface circuit (4), the DC output assembly circuit (7), the control circuit (1), the serial communication sending circuit (5), the serial communication receiving circuit (6) and the external circuit (2) respectively; The compressor phase current overcurrent protection circuit (704) comprises an operational amplifier IC5A, an operational amplifier IC5B, an FO terminal, a resistor RS1, a resistor RS2 and a resistor RS3, wherein the resistors RS1, RS2 and RS3 are connected in parallel, a common end of one side of the resistors RS1, RS2 and RS3 is connected to pin 6 of the operational amplifier IC5B, a common end of the other side of the resistors RS1, RS2 and RS3 is connected to pin 5 of the operational amplifier IC5B, pin 7 of the operational amplifier IC5B is connected to pin 3 of the operational amplifier IC5A, and pin 1 of the operational amplifier IC5A is connected to the FO terminal; The sampling circuit (705) comprises a sampling chip IC9, an I-MOS terminal, a resistor R95, a resistor R96, a capacitor C50, a resistor R118 and a resistor R119, wherein the resistor R95 and the resistor R96 are connected in series, the common end of the resistor R95 and the resistor R96 is connected to the 3rd pin of the sampling chip IC9, the 7th pin of the sampling chip IC9 is connected to the I-MOS terminal, the 6th pin of the sampling chip IC9 is connected to the resistor R118, and the 5th pin of the sampling chip IC9 is connected to the resistor R119. The serial communication transmission circuit (5) comprises a transistor Q21, a resistor R30, a resistor R32, a resistor R34, a resistor R36, a TXD terminal, a TXD-OUT terminal and a capacitor C18, the TXD terminal is connected to the resistor R30, the resistor R30 is connected to the B terminal of the transistor Q21, the resistor R34 is connected to the C terminal of the transistor Q21, The C end of the transistor Q21 and the common end of the resistor R34 are connected to a resistor R36, the resistor R36 is connected to the TXD-OUT end, the common end of the resistor R36 and the TXD-OUT end is connected to one end of the capacitor C18, the other end of the capacitor C18 is connected to the E end of the transistor Q21, one end of the resistor R32 is connected to the B end of the transistor Q21, and the other end of the resistor R32 is connected to the E end of the transistor Q21; The serial communication receiving circuit (6) comprises a transistor Q22, a resistor R31, a resistor R33, a capacitor C15, a capacitor C17, a resistor R35, a resistor R37, a RXD terminal, a diode DZ3 and a RXD-OUT terminal, wherein the resistor R37, the diode DZ3 and the RXD-OUT terminal are connected in series, one end of the resistor R37 is connected to the B pin of the transistor Q22, the capacitor C15 and the resistor R35 are connected in parallel, a common end of one side of the capacitor C15 and the resistor R35 is connected to the B pin of the transistor Q22, and the other common end of the capacitor C15 and the resistor R35 is connected to the E pin of the transistor Q22, the RXD terminal is connected to one end of the resistor R31, the other end of the resistor R31 is connected to the resistor R33, and the common end between the other end of the resistor R31 and the resistor R33 is connected to the C pin of the transistor Q22.
2. The ultra-low voltage DC frequency conversion controller according to claim 1, characterized in that: The DC output assembly circuit (7) comprises a first DC output circuit (701), a second DC output circuit (702) and a third DC output circuit (703).
3. The ultra-low voltage DC frequency conversion controller according to claim 2 is characterized in that: The first DC output circuit (701) comprises a chip IC6, a transistor Q23, a transistor Q24, a field effect transistor Q1, a field effect transistor Q2, a field effect transistor Q3, a field effect transistor Q4, a capacitor C55 and a capacitor E14, pin 2 of the chip IC6 is connected to a resistor R66, the resistor R66 is connected to the RWM-UP terminal, pin 3 of the chip IC6 is connected to a resistor R67, the resistor R67 is connected to the RWM-UN terminal, pin 7 of the chip IC6 is connected to the base of the transistor Q23, pin E of the transistor Q23 is respectively connected to pin 1 of the field effect transistor Q1 and pin 1 of the field effect transistor Q2, pin 2 of the field effect transistor Q1 is connected to pin 2 of the field effect transistor Q2, and pin C of the transistor Q23 is respectively connected to pin 3 of the field effect transistor Q1 and pin 3 of the field effect transistor Q2; Pin 5 of chip IC6 is connected to the base of transistor Q24, pin E of transistor Q24 is respectively connected to pin 1 of field effect transistor Q3 and pin 1 of field effect transistor Q4, pin 2 of field effect transistor Q3 is connected to pin 2 of field effect transistor Q4, and pin C of transistor Q24 is respectively connected to pin 3 of field effect transistor Q3 and pin 3 of field effect transistor Q4; The common end between the 3rd pin of the field effect transistor Q1, the 3rd pin of the field effect transistor Q2, the 2nd pin of the field effect transistor Q3 and the 2nd pin of the field effect transistor Q4 is connected with the U end; The common end between pin 2 of field effect transistor Q1 and pin 2 of field effect transistor Q2 is connected to the DCBUS end, and the DCBUS end is also connected to the V-DCBUS end. Capacitor C55 and capacitor E14 are connected in parallel, and one side of the common end of capacitor C55 and capacitor E14 is connected to the DCBUS end, and the other side of the common end of capacitor C55 and capacitor E14 is connected to the ground terminal GND2.
4. The ultra-low voltage DC frequency conversion controller according to claim 2, characterized in that: The second DC output circuit (702) comprises a chip IC7, a transistor Q25, a transistor Q26, a field effect transistor Q5, a field effect transistor Q6, a field effect transistor Q7, a field effect transistor Q8, a capacitor C57 and a capacitor E16, pin 2 of the chip IC7 is connected to a resistor R68, the resistor R68 is connected to the RWM-VP terminal, pin 3 of the chip IC7 is connected to a resistor R69, the resistor R69 is connected to the RWM-VN terminal, pin 7 of the chip IC7 is connected to the base of the transistor Q25, pin E of the transistor Q25 is respectively connected to pin 1 of the field effect transistor Q5 and pin 1 of the field effect transistor Q6, pin 2 of the field effect transistor Q5 is connected to pin 2 of the field effect transistor Q6, and pin C of the transistor Q25 is respectively connected to pin 3 of the field effect transistor Q5 and pin 3 of the field effect transistor Q6; Pin 5 of chip IC7 is connected to the base of transistor Q26, pin E of transistor Q26 is respectively connected to pin 1 of field effect transistor Q7 and pin 1 of field effect transistor Q8, pin 2 of field effect transistor Q7 is connected to pin 2 of field effect transistor Q8, and pin C of transistor Q26 is respectively connected to pin 3 of field effect transistor Q7 and pin 3 of field effect transistor Q8; The common end between the 3rd pin of the field effect transistor Q5, the 3rd pin of the field effect transistor Q6, the 2nd pin of the field effect transistor Q7 and the 2nd pin of the field effect transistor Q8 is connected to the V end; The common end between pin 2 of field effect transistor Q5 and pin 2 of field effect transistor Q2 is connected to the DCBUS end, capacitor C55 and capacitor E14 are connected in parallel, one side of the common end of capacitor C55 and capacitor E14 is connected to the DCBUS end, and the other side of the common end of capacitor C55 and capacitor E14 is connected to the ground terminal GND2.
5. The ultra-low voltage DC frequency conversion controller according to claim 2, characterized in that: The third DC output circuit (703) comprises a chip IC8, a transistor Q27, a transistor Q28, a field effect transistor Q9, a field effect transistor Q10, a field effect transistor Q11, a field effect transistor Q12, a capacitor C56 and a capacitor E15, pin 2 of the chip IC8 is connected to a resistor R70, the resistor R70 is connected to the RWM-WP terminal, pin 3 of the chip IC8 is connected to a resistor R71, the resistor R71 is connected to the RWM-WN terminal, pin 7 of the chip IC8 is connected to the base of the transistor Q27, pin E of the transistor Q27 is respectively connected to pin 1 of the field effect transistor Q9 and pin 1 of the field effect transistor Q10, pin 2 of the field effect transistor Q9 is connected to pin 2 of the field effect transistor Q10, and pin C of the transistor Q27 is respectively connected to pin 3 of the field effect transistor Q9 and pin 3 of the field effect transistor Q10; Pin 5 of chip IC8 is connected to the base of transistor Q28, pin E of transistor Q28 is respectively connected to pin 1 of field effect transistor Q11 and pin 1 of field effect transistor Q12, pin 2 of field effect transistor Q11 is connected to pin 2 of field effect transistor Q12, and pin C of transistor Q28 is respectively connected to pin 3 of field effect transistor Q11 and pin 3 of field effect transistor Q12; The common end between the 3rd pin of the field effect transistor Q9, the 3rd pin of the field effect transistor Q10, the 2nd pin of the field effect transistor Q11 and the 2nd pin of the field effect transistor Q12 is connected to the W end; The common end between pin 2 of field effect transistor Q9 and pin 2 of field effect transistor Q10 is connected to the DCBUS end, capacitor C55 and capacitor E14 are connected in parallel, one side common end of capacitor C56 and capacitor E15 is connected to the DCBUS end, and the other side common end of capacitor C56 and capacitor E15 is connected to the ground terminal GND2.
6. The ultra-low voltage DC frequency conversion controller according to claim 1, characterized in that: The power supply circuit (3) comprises a buck chip IC2 and a buck chip IC3, wherein pin 2 of the buck chip IC2 is connected to pin 3 of the buck chip IC3; The DC fan interface circuit (4) comprises a transistor Q19 and a DC fan interface, wherein a FAN-PWM terminal of the DC fan interface is connected to the transistor Q19, a FAN-FB terminal of the DC fan interface is connected to a DCFAN-FB terminal, and a resistor R8 is connected between the FAN-FB terminal and the DCFAN-FB terminal.
7. The ultra-low voltage DC frequency conversion controller according to claim 1, characterized in that: The external circuit (2) comprises a chip IC4, a connector CN3, a resistor R59, a resistor R60, a resistor R61 and a capacitor C23, wherein the 8th pin of the chip IC4 is connected to the resistor R59, the 7th pin of the chip IC4 is connected to the resistor R62, the 6th pin of the chip IC4 is connected to the resistor R60, the 5th pin of the chip IC4 is connected to the resistor R61, the two ends of the capacitor C23 are respectively connected to the 1st pin and the 8th pin of the chip IC4, and the connector CN3 is connected to the chip IC4.
8. The parking air conditioner using an ultra-low voltage DC variable frequency controller is characterized by: It comprises an ultra-low voltage DC frequency conversion controller, and the ultra-low voltage DC frequency conversion controller comprises the ultra-low voltage DC frequency conversion controller according to any one of claims 1 to 7.