A low noise amplifier and base station radio frequency front end

Abstract

The present invention discloses a low noise amplifier and a base station radio frequency front end, the low noise amplifier comprises a TTD control circuit, a current control circuit, an input matching circuit, an output matching circuit, a first-stage transistor, a second-stage transistor, a feedback circuit and a harmonic suppression circuit. The present invention can simultaneously meet the needs of time division multiplexing and frequency division multiplexing, as well as a wide frequency band range, covering 2G, 3G, 4G and 5G applications, and can reduce the design difficulty and cost of the base station radio frequency front end; at the same time, the low noise amplifier has extremely high linearity through the harmonic suppression circuit and the current control circuit, and improves the adjacent channel interference of the base station radio frequency front end; the pHEMT process and two-stage amplification are adopted to make the low noise amplifier have extremely low noise coefficient and high gain, and improve the receiving sensitivity of the base station radio frequency front end system.

Description

Technical Field

[0001] The present invention relates to the field of radio frequency front ends, and in particular to a low noise amplifier and a base station radio frequency front end. Background Art

[0002] With the rapid development of wireless communication technology, the operating frequency of base stations has expanded from the initial 2G (800-900MHz), 3G (1900-2200MHz), 4G (2300-2700MHz), to the rapidly developing 5G (3300-4200MHz), and the frequency range is getting wider and wider. The expansion of the frequency range has also continuously expanded the spectrum capacity of base stations, but this has also made the base station working system face more severe alternating distortion and adjacent channel interference. At the same time, the surrounding environment of the base station is complex, and the signal requires a wide coverage range. For this reason, the base station RF front end must also have a high receiving sensitivity. As a key module in the base station RF front end circuit, the low noise amplifier needs to be able to simultaneously meet the requirements of time division duplexing (TDD) and frequency division duplexing (FDD) and a wide frequency band range, which can reduce the design difficulty and cost of the base station RF front end; at the same time, the noise coefficient and gain of the low noise amplifier also determine the receiving sensitivity of the base station RF front end system. A high receiving sensitivity requires lower noise and higher gain; the high linearity of the low noise amplifier is also indispensable, which can make the base station RF front end have stronger anti-interference ability, improve spectrum utilization, and ensure the spectrum capacity of the base station. Therefore, there is an urgent need for a low noise amplifier that meets the above requirements. Summary of the invention

[0003] The purpose of the present invention is to solve the problems mentioned in the above background technology part through a low noise amplifier and a base station radio frequency front end.

[0004] To achieve this object, the present invention adopts the following technical solutions:

[0005] A low noise amplifier comprises a TTD control circuit, a current control circuit, an input matching circuit, an output matching circuit, a first-stage transistor M001, a second-stage transistor M002, a feedback circuit and a harmonic suppression circuit; wherein one end of the TTD control circuit is connected to a control port VSD, and the other end is connected to one end of a resistor R001, one end of a resistor R002, one end of a second-stage transistor M002 and one end of a harmonic suppression circuit; the other end of the resistor R001 is connected to a second connection terminal of the second-stage transistor M002 and one end of the output matching circuit; the other end of the output matching circuit is connected to an output port RFOUT; and the third connection terminal of the second-stage transistor M002 is connected to the harmonic suppression circuit. The second terminal of the current control circuit is connected to the current control port VB, and the other end is connected to one end of the feedback circuit. The second terminal of the feedback circuit is connected to one end of the input matching circuit and one end of the first-stage transistor M001. The other end of the input matching circuit is connected to the input port RFIN. The second terminal of the first-stage transistor M001 is connected to the third terminal of the harmonic suppression circuit and one end of the capacitor C001. The other end of the capacitor C001 is connected to the fourth terminal of the harmonic suppression circuit. The third terminal of the feedback circuit is connected to the fifth terminal of the harmonic suppression circuit. The third terminal of the first-stage transistor M001 is connected to one end of the inductor BL001, and the other end of the inductor BL001 is grounded.

[0006] In particular, the TTD control circuit is composed of n inverters connected in series to drive the pull-down transistor M003, wherein n is an integer greater than or equal to zero.

[0007] In particular, the current control circuit includes a capacitor C031, a resistor R031, a resistor R032, a transistor M004, and a resistor R033; one end of the capacitor C031 is grounded, and the other end is connected to the A2 end of the current control circuit, one end of the resistor R031, and one end of the resistor R032; the other end of the resistor R031 is connected to one end of the transistor M004; the second terminal of the transistor M004 is grounded; the third terminal of the transistor M004 is connected to one end of the resistor R032 and one end of the resistor R033; the other end of the resistor R033 is connected to the current control port VB.

[0008] In particular, the feedback circuit includes a resistor R003 and a capacitor C002; one end of the resistor R003 is connected to one end of the input matching circuit, the other end of the resistor R003 is connected to one end of the capacitor C002, and the other end of the capacitor C002 is connected to the harmonic suppression circuit.

[0009] In particular, the harmonic suppression circuit includes an inductor L002, an inductor L003, a capacitor C003, and a capacitor C004; one end of the inductor L002 is connected to one end of the inductor L003 and the capacitor C004, the other end of the capacitor C004 is grounded, the other end of the inductor L002 is connected to one end of the capacitor C003, and the other end of the capacitor C003 is grounded.

[0010] In particular, the input matching circuit is implemented by, but not limited to, a gold wire inductor, an on-chip active or passive device, or an off-chip discrete device.

[0011] In particular, the output matching circuit is implemented by, but not limited to, a gold wire inductor, an on-chip active or passive device, or an off-chip discrete device.

[0012] In particular, the first-stage transistor M001 and the second-stage transistor M002 are both made of, but not limited to, field effect transistors (FETs) or bipolar junction transistors (BJTs).

[0013] In particular, the harmonic suppression circuit adopts but is not limited to any one of an L-type filter circuit, a T-type filter circuit, and a π-type filter circuit.

[0014] The present invention also discloses a base station radio frequency front end, which adopts the above-mentioned low noise amplifier.

[0015] The low noise amplifier and base station radio frequency front end proposed in the present invention enable the low noise amplifier to be simultaneously applied to the TTD system and FDD system of the base station through a TDD control circuit; the two-stage amplification and ultra-wideband design enable the low noise amplifier to have a high gain and cover a working frequency band of 0.6-4.2 GHz, so that it can be applied to 2G, 3G, 4G and the rapidly developing 5G communication systems, achieving the purposes of high integration, cost saving and reducing the design complexity of the base station radio frequency front end; the harmonic suppression circuit enables the low noise amplifier to ensure very high linearity within the range of 0.6-4.2 GHz, thereby improving intermodulation distortion and adjacent channel interference, and at the same time, through the current control circuit, the total current of the low noise amplifier can be adjusted to control the linearity, so that the user can compromise the linearity and power consumption of the low noise amplifier according to different application scenarios. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 A structural block diagram of a low noise amplifier provided in an embodiment of the present invention;

[0017] Figure 2 A schematic diagram of a TDD control circuit provided by an embodiment of the present invention;

[0018] Figure 3 A schematic diagram of a current control circuit provided by an embodiment of the present invention;

[0019] Figure 4 This is a circuit diagram of a low noise amplifier provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0020] In order to facilitate the understanding of the present invention, the present invention will be described more fully below with reference to the relevant drawings. Preferred embodiments of the present invention are given in the drawings. However, the present invention can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present invention more thoroughly and comprehensively understood. It should be noted that when an element is considered to be "connected" to another element, it can be directly connected to another element or there may be a centering element at the same time. Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those generally understood by technicians in the technical field of the present invention. The terms used in the specification of the present invention herein are only for the purpose of describing specific embodiments and are not intended to limit the present invention. The term "and / or" used herein includes any and all combinations of one or more related listed items.

[0021] Embodiment 1

[0022] The low noise amplifier in this embodiment specifically includes a TTD control circuit 001, an output matching circuit 002, a current control circuit 003, an input matching circuit 004, a first-stage transistor M001, a second-stage transistor M002, a feedback circuit, and a harmonic suppression circuit 005. One end of the TTD control circuit 001 is connected to the control port VSD, and the other end is connected to one end of the resistor R001, one end of the resistor R002, one end of the second-stage transistor M002, and one end of the harmonic suppression circuit 005. The other end of the resistor R001 is connected to the second terminal of the second-stage transistor M002 and one end of the output matching circuit 002. The other end of the output matching circuit 002 is connected to the output port RFOUT. The third terminal of the second-stage transistor M002 is connected to the second terminal of the harmonic suppression circuit 005. One end of the current control circuit 003 is connected to the current control port VB, and the other end is connected to the feedback circuit one end of the feedback circuit, the second terminal of the feedback circuit is connected to one end of the input matching circuit 004 and one end of the first-stage transistor M001, the other end of the input matching circuit 004 is connected to the input port RFIN, the second terminal of the first-stage transistor M001 is connected to the third terminal of the harmonic suppression circuit 005 and one end of the capacitor C001, the other end of the capacitor C001 is connected to the fourth terminal of the harmonic suppression circuit 005, the third terminal of the feedback circuit is connected to the fifth terminal of the harmonic suppression circuit 005, the third terminal of the first-stage transistor M001 is connected to one end of the inductor BL001, and the other end of the inductor BL001 is grounded.

[0023] Embodiment 2

[0024] Please refer to Figure 1 As shown, Figure 1 This is a structural block diagram of a low noise amplifier provided in an embodiment of the present invention.

[0025] The low noise amplifier in this embodiment specifically includes a TTD control circuit 001, an output matching circuit 002, a current control circuit 003, an input matching circuit 004, a first-stage transistor M001, a second-stage transistor M002, a feedback circuit, and a harmonic suppression circuit 005. One end of the TTD control circuit 001 is connected to the control port VSD, and the other end is connected to one end of the resistor R001, one end of the resistor R002, one end of the second-stage transistor M002, and one end of the harmonic suppression circuit 005. The other end of the resistor R001 is connected to the second terminal of the second-stage transistor M002 and one end of the output matching circuit 002. The other end of the output matching circuit 002 is connected to the output port RFOUT. The third terminal of the second-stage transistor M002 is connected to the second terminal of the harmonic suppression circuit 005. One end of the current control circuit 003 is connected to the current control port VB, and the other end is connected to the feedback circuit one end of the feedback circuit, the second terminal of the feedback circuit is connected to one end of the input matching circuit 004 and one end of the first-stage transistor M001, the other end of the input matching circuit 004 is connected to the input port RFIN, the second terminal of the first-stage transistor M001 is connected to the third terminal of the harmonic suppression circuit 005 and one end of the capacitor C001, the other end of the capacitor C001 is connected to the fourth terminal of the harmonic suppression circuit 005, the third terminal of the feedback circuit is connected to the fifth terminal of the harmonic suppression circuit 005, the third terminal of the first-stage transistor M001 is connected to one end of the inductor BL001, and the other end of the inductor BL001 is grounded.

[0026] Specifically, in this embodiment, Figure 2 As shown, the TTD control circuit 001 is composed of a total of n unequal inverters 021-02n driving the pull-down transistor M003, wherein n is an integer greater than or equal to zero, and n can be 0. According to the logic control decision, when the low noise amplifier works in the TDD system, it is used to enable the low noise amplifier, so that the low noise amplifier can be turned on and off at any time as needed, and the TTD control circuit 001 also ensures that the low noise amplifier has a very high isolation when it is turned off.

[0027] In this embodiment, the current control circuit 003 mainly controls the voltage change of the current control circuit 003 port to control the current change in the current control circuit 003 to achieve the control of the current of the low noise amplifier. Figure 3As shown, in this embodiment, the current control circuit 003 includes a capacitor C031, a resistor R031, a resistor R032, a transistor M004, and a resistor R033; one end of the capacitor C031 is grounded, and the other end is connected to the A2 end of the current control circuit 003, one end of the resistor R031, and one end of the resistor R032; the other end of the resistor R031 is connected to one end of the transistor M004, the second terminal of the transistor M004 is grounded, the third terminal of the transistor M004 is connected to one end of the resistor R032 and one end of the resistor R033, and the other end of the resistor R033 is connected to the current control port VB. Specifically, in this embodiment, the feedback circuit includes a resistor R003 and a capacitor C002; one end of the resistor R003 is connected to one end of the input matching circuit 004, the other end of the resistor R003 is connected to one end of the capacitor C002, and the other end of the capacitor C002 is connected to the harmonic suppression circuit 005. When the current control circuit 003 is working, the current of the transistor M004 is controlled by controlling the voltage at the VB terminal, and then the current of the low noise amplifier is controlled, so as to achieve the purpose of controlling the linearity and power consumption of the low noise amplifier. The A2 terminal of the current control circuit 003 is connected to the resistor R003 and the capacitor C002. When a higher linearity is required in the working system to suppress the interference of adjacent channels, the working current can be increased by increasing the voltage at VB to improve the linearity; when the working system is more concerned about power consumption and the linearity requirement is not too high, the working current can be reduced by reducing the voltage at VB to achieve the purpose of reducing power consumption.

[0028] Specifically, in this embodiment, the first-stage transistor M001 and the second-stage transistor M002 are both, but not limited to, field effect transistors (FETs) or bipolar junction transistors (BJTs).

[0029] Specifically, in this embodiment, the harmonic suppression circuit 005 adopts but is not limited to any one of an L-shaped filter circuit, a T-type filter circuit, and a π-type filter circuit. The main function of the harmonic suppression circuit 005 is to suppress the harmonics and intermodulation components coming out of the first-stage transistor M001. When the signal comes out of the first-stage transistor M001, it is divided into two paths to the harmonic suppression network, in which a part of the high-frequency signal enters the harmonic suppression network through the capacitor C002 and enters the second-stage transistor M002, and the remaining signal directly enters the harmonic suppression circuit 005. The filter network in the harmonic suppression circuit 005 will filter out most of the intermodulation components and high-order harmonics, thereby improving linearity. At the same time, the harmonic suppression circuit 005 also acts as a part of the inter-stage matching between the first-stage transistor M001 and the second-stage transistor M002, thereby expanding the bandwidth.

[0030] Embodiment 3

[0031] Please refer to Figure 4 As shown, Figure 4This is a structural block diagram of a low noise amplifier provided in an embodiment of the present invention.

[0032] The low noise amplifier in this embodiment specifically includes a TTD control circuit 001, an output matching circuit 002, a current control circuit 003, an input matching circuit 004, a first-stage transistor M001, a second-stage transistor M002, a feedback circuit, and a harmonic suppression circuit 005. One end of the TTD control circuit 001 is connected to the control port VSD, and the other end is connected to one end of the resistor R001, one end of the resistor R002, one end of the second-stage transistor M002, and one end of the harmonic suppression circuit 005. The other end of the resistor R001 is connected to the second terminal of the second-stage transistor M002 and one end of the output matching circuit 002. The other end of the output matching circuit 002 is connected to the output port RFOUT. The third terminal of the second-stage transistor M002 is connected to the second terminal of the harmonic suppression circuit 005. One end of the current control circuit 003 is connected to the current control port VB, and the other end is connected to the feedback circuit one end of the feedback circuit, the second terminal of the feedback circuit is connected to one end of the input matching circuit 004 and one end of the first-stage transistor M001, the other end of the input matching circuit 004 is connected to the input port RFIN, the second terminal of the first-stage transistor M001 is connected to the third terminal of the harmonic suppression circuit 005 and one end of the capacitor C001, the other end of the capacitor C001 is connected to the fourth terminal of the harmonic suppression circuit 005, the third terminal of the feedback circuit is connected to the fifth terminal of the harmonic suppression circuit 005, the third terminal of the first-stage transistor M001 is connected to one end of the inductor BL001, and the other end of the inductor BL001 is grounded.

[0033] Specifically, in this embodiment, the feedback circuit includes a resistor R003 and a capacitor C002; one end of the resistor R003 is connected to one end of the input matching circuit 004, the other end of the resistor R003 is connected to one end of the capacitor C002, and the other end of the capacitor C002 is connected to the harmonic suppression circuit 005. Specifically, in this embodiment, the input matching circuit 004 is implemented by but not limited to a gold wire inductor, an on-chip active or passive device, or an off-chip separate device. The output matching circuit 002 is implemented by but not limited to a gold wire inductor, an on-chip active or passive device, or an off-chip separate device. Figure 4As shown, the gold wire inductors BL002 and BL003 constitute input-output matching. The harmonic suppression circuit 005 includes an inductor L002, an inductor L003, a capacitor C003, and a capacitor C004; one end of the inductor L002 is connected to one end of the inductor L003 and the capacitor C004, the other end of the capacitor C004 is grounded, the other end of the inductor L002 is connected to one end of the capacitor C003, and the other end of the capacitor C003 is grounded, wherein C003, L002, C004, and L003 form a π-type harmonic suppression circuit 005, and the feedback capacitor C002 is connected to the right side of the inductor L002. It should be noted that the feedback capacitor C002 can be connected to the left or right end of the inductor L002.

[0034] It should be noted that the manufacturing process of the low noise amplifier provided in the example of the present invention can be CMOS (Complementary Metal Oxide Semiconductor), SOI (Silicon-On-Insulator), SiGe, GaAs-pHEMT (Pseudomorphic HEMT), HBT (Hetero-junction Bipolar Transistor), BJT (Bipolar Junction Transistor), Bipolar junction transistor, BiCMOS and other processes.

[0035] Embodiment 4

[0036] This embodiment provides a base station radio frequency front end, which uses but is not limited to any low noise amplifier disclosed in the above embodiments 1 to 3.

[0037] The technical solution proposed in the present invention enables the low noise amplifier to be applied to both the TTD system and the FDD system of the base station through the TDD control circuit; through the two-stage amplification and ultra-wideband design, the low noise amplifier has a high gain and covers the working frequency band of 0.6-4.2GHz, so that it can be applied to 2G, 3G, 4G and the rapidly developing 5G communication system, achieving the purpose of high integration, cost saving and reducing the design complexity of the base station RF front end; through the harmonic suppression circuit, the low noise amplifier can be guaranteed to have very high linearity in the range of 0.6-4.2GHz, thereby improving intermodulation distortion and adjacent channel interference, and through the current control circuit, the total current of the low noise amplifier can be adjusted to control the linearity, so that the user can compromise the linearity and power consumption of the low noise amplifier according to different application scenarios. In addition, the use of pHEMT process and two-stage amplification makes the low noise amplifier have an extremely low noise coefficient and a high gain, which improves the receiving sensitivity of the base station RF front-end system.

[0038] Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A low noise amplifier, characterized in that: The invention comprises a TTD control circuit, a current control circuit, an input matching circuit, an output matching circuit, a first-stage transistor M001, a second-stage transistor M002, a feedback circuit and a harmonic suppression circuit; wherein one end of the TTD control circuit is connected to a control port VSD, and the other end is connected to one end of a resistor R001, one end of a resistor R002, one end of a second-stage transistor M002 and one end of a harmonic suppression circuit; the other end of the resistor R001 is connected to a second wiring terminal of the second-stage transistor M002 and one end of the output matching circuit; the other end of the output matching circuit is connected to an output port RFOUT; and a third wiring terminal of the second-stage transistor M002 is connected to a second wiring terminal of the harmonic suppression circuit. end, one end of the current control circuit is connected to the current control port VB, and the other end is connected to one end of the feedback circuit, the second terminal of the feedback circuit is connected to one end of the input matching circuit and one end of the first-stage transistor M001, the other end of the input matching circuit is connected to the input port RFIN, the second terminal of the first-stage transistor M001 is connected to the third terminal of the harmonic suppression circuit and one end of the capacitor C001, the other end of the capacitor C001 is connected to the fourth terminal of the harmonic suppression circuit, the third terminal of the feedback circuit is connected to the fifth terminal of the harmonic suppression circuit, the third terminal of the first-stage transistor M001 is connected to one end of the inductor BL001, and the other end of the inductor BL001 is grounded; The TTD control circuit is composed of n inverters connected in series to drive the pull-down transistor M003, where n is an integer greater than or equal to zero; The current control circuit includes a capacitor C031, a resistor R031, a resistor R032, a transistor M004, and a resistor R033; one end of the capacitor C031 is grounded, and the other end is connected to the A2 end of the current control circuit, one end of the resistor R031, and one end of the resistor R032; the other end of the resistor R031 is connected to one end of the transistor M004; the second terminal of the transistor M004 is grounded; the third terminal of the transistor M004 is connected to one end of the resistor R032 and one end of the resistor R033; the other end of the resistor R033 is connected to the current control port VB; The feedback circuit includes a resistor R003 and a capacitor C002; one end of the resistor R003 is connected to one end of the input matching circuit, the other end of the resistor R003 is connected to one end of the capacitor C002, and the other end of the capacitor C002 is connected to the harmonic suppression circuit; The harmonic suppression circuit includes an inductor L002, an inductor L003, a capacitor C003, and a capacitor C004; one end of the inductor L002 is connected to one end of the inductor L003 and the capacitor C004, the other end of the capacitor C004 is grounded, the other end of the inductor L002 is connected to one end of the capacitor C003, and the other end of the capacitor C003 is grounded.

2. The low noise amplifier according to claim 1, characterized in that: The input matching circuit is implemented by, but not limited to, a gold wire inductor, an on-chip active or passive device, or an off-chip discrete device.

3. The low noise amplifier according to claim 1, characterized in that: The output matching circuit is implemented by, but not limited to, any one of a gold wire inductor, an on-chip active or passive device, and an off-chip discrete device.

4. The low noise amplifier according to claim 1, characterized in that: The first-stage transistor M001 and the second-stage transistor M002 are both made of, but not limited to, field effect transistors or bipolar transistors.

5. The low noise amplifier according to any one of claims 1 to 4, characterized in that: The harmonic suppression circuit adopts but is not limited to any one of an L-shaped filter circuit, a T-shaped filter circuit, and a π-shaped filter circuit.

6. A base station radio frequency front end, characterized in that: The base station radio frequency front end adopts the low noise amplifier described in claim 1.

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