A ZVS adaptive control method and circuit for active clamp converter
By sampling the drain-source DS voltage of the main switch tube and adaptively adjusting the opening time of the clamp switch tube, the full-condition soft switch of the active clamp converter under high switching frequency and high power density conditions is realized, solving the problem of The problems of low efficiency and poor reliability in the prior art are improved, and the efficiency and reliability of the converter are improved.
Patent Information
- Application Number
- CN202111306671.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-11-05
- Publication Date
- 2025-02-07
- Estimated Expiration
- 2041-11-05
AI Technical Summary
In the application scenarios of high switching frequency and high power density, it is difficult to effectively enable zero voltage activation of the main switching tube, resulting in low converter efficiency and poor system reliability.
By sampling the drain-source DS voltage of the main switch tube, combining volt-second balance and feature information closed-loop control, the opening time of the clamp switch tube is adaptively adjusted to realize closed-loop control of the negative current of the transformer, ensuring the main switch tube and clamp Reliable ZVS operation of switch tubes.
It realizes the full-service soft switch of the converter under high switching frequency and high power density conditions, improves the efficiency and reliability of the converter, reduces additional losses and interference, and is suitable for small-volume and high-power density switching power supplies.
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Figure CN113872450B_ABST
Abstract
Description
Technical Field
[0001] The invention belongs to the technical field of converter control, and in particular to a ZVS adaptive control method and circuit for an active clamping converter. Background Art
[0002] With the development of modern electronic systems, the demand for high power density and high efficiency switching power converters is becoming more and more widespread. Active clamp converters, such as active clamp flyback converter, active clamp forward converter, double clamp ZVS converter, etc., have been widely studied and applied in academia and industry due to their excellent characteristics such as high efficiency, full range soft switching, and adaptability to high switching frequency.
[0003] Figure 1 The typical topology of the active clamp type topology - active clamp flyback converter is given. The first switch tube Q1 is a high-frequency chopper switch tube, which is used to control the output voltage of the converter; the second switch tube Q2 is a clamp switch tube, which cooperates with the clamp capacitor C c For recycling transformer T r In addition, by properly controlling the on-time of the clamp switch tube Q2, the zero voltage (ZVS) on-time characteristic of the first switch tube Q1 can be achieved to reduce the switching loss of the converter and improve the efficiency of the converter. r The secondary side is connected to the first diode D1 and the filter capacitor C Ld and output load R Ld .
[0004] The key technology of active clamping converters is to effectively control the clamping switch tube to achieve zero voltage turn-on of the main switch tube within the full input voltage and full load range to improve the efficiency of the converter. Chinese invention patent CN111953185A provides a control method for adaptive dead time of active clamping flyback topology. This method realizes ZVS control of the main switch tube by connecting a sampling resistor in series with the main switch tube loop of the primary side of the converter to sample the transformer leakage inductance current. Although this method is simple and effective, the additional sampling resistor will inevitably increase the converter loss and affect the converter efficiency. On the other hand, due to the small sampling resistor, the sampled current signal is weak, and the system is very susceptible to interference. This method is limited in applications with high switching frequency and high power density. Chinese invention patent CN111682769A provides an active clamping forward converter and its adaptive synchronous rectification digital control method. This method predicts the moment when the current in the filter inductor reaches zero through DSP theoretical calculation and adaptively controls the converter. However, the theoretical calculation method has high requirements on the parameter consistency of the converter and cannot reliably guarantee the reliable operation of the converter in large dynamic scenarios. US invention patent US9083254B1 proposes a solution for sampling the drive of the secondary synchronous rectifier tube to control the clamp switch tube through an isolator for double-clamped ZVS converters. However, this aspect is complex to implement and requires additional isolation circuits, which is not conducive to achieving small size and high power density of the switching power supply. US invention patent US10418912B2 proposes a solution for active clamped flyback converters to control the turn-on time of the clamp switch tube through delay circuits, the "critical inflection point" of the main switch drain-source voltage, etc. This solution is relatively complex to implement and has a high dependence on the "critical inflection voltage" of the main switch drain-source voltage, which is not conducive to the reliability of the converter system. Summary of the invention
[0005] The object of the present invention is to provide a ZVS adaptive control method and circuit for an active clamping converter in view of the problems existing in the above-mentioned prior art.
[0006] The technical solution for achieving the purpose of the present invention is: a ZVS adaptive control method for an active clamping converter, the method comprising the following steps:
[0007] Step 1: Collect the input voltage v of the active clamp converter topology ins , output voltage v os And the drain-source voltage v of the main switch tube Q1 dsp ;
[0008] Step 2, according to the sampling value of step 1, respectively obtain the conduction time values T1 and T2 of the main switch tube Q1 and the clamp switch tube Q2;
[0009] Step 3, obtaining driving pulses QS1 and QS2 of the main switch tube Q1 and the clamp switch tube Q2 according to the conduction time values T1 and T2;
[0010] Step 4: the drain-source voltage v dsp Perform logical operations with the drive pulse and amplify the drive capability to generate a power drive signal Q g1 and Q g2 , driving the main switch tube Q1 and the clamp switch tube Q2 respectively to achieve ZVS operation of the converter.
[0011] Furthermore, in step 2, based on the sampled value in step 1, the conduction time value T1 of the main switch tube Q1 is obtained, and the specific process includes:
[0012] Step 21-1, input voltage v ins , output voltage v os The sampling value performs closed-loop regulation on the converter output voltage via a proportional-integral regulator;
[0013] Step 21-2, based on the output value v of the proportional integral regulator er Calculate the on-time T1 of the main switch tube Q1.
[0014] Furthermore, in step 2, based on the sampled value in step 1, the conduction time value T2 of the clamp switch tube Q2 is obtained, and the specific process includes:
[0015] Step 22-1, the on-time T of the clamp switch tube Q2 is calculated from the on-time T1 of the main switch tube Q1 by using the volt-second balance. 20 ;
[0016] Step 22-2, the drain-source voltage v of the main switch tube Q1 dsp The comparator gets v pls Signal;
[0017] Step 22-3, obtain v by pulse width capture pls Signal low level duration T ps ;
[0018] Step 22-4, low level duration T ps Subtract the on-time T2 of the clamp switch tube Q2 in the previous switching cycle to obtain the characteristic time value T that identifies the ZVS characteristic of the main switch tube Q1 psf ;
[0019] Step 22-5, for the characteristic time value T psf Perform proportional-integral closed-loop regulation to obtain the switching time adjustment value dT of the clamp switch tube Q2 z ;
[0020] Step 22-6, adjust the switching time to dTz Superimposed to T 20 The final on-time value T2 of the clamp switch tube Q2 is obtained.
[0021] Furthermore, in step 4, the drain-source voltage v dsp Perform logical operations with the drive pulse and amplify the drive capability to generate a power drive signal Q g1 and Q g2 The specific process includes:
[0022] Step 4-1: The drain-source voltage v of the main switch tube Q1 is dsp Q is obtained through the comparator sp Signal;
[0023] Step 4-2, the Q sp The signal and QS2 signal are connected to the QS2 signal through a dual-input AND gate. sp2 Signal;
[0024] Step 4-3, the Q sp2 The signal and QS1 signal are outputted through the half-bridge drive circuit. g1 and Q g2 Two signals drive the main switch tube Q1 and the clamp switch tube Q2 respectively.
[0025] A ZVS adaptive control circuit for an active clamped converter, the circuit comprising: an active clamped flyback converter, a digital controller, an isolation sampling circuit, a first resistor voltage division sampling circuit, a second resistor voltage division sampling circuit and a drive and control circuit; wherein the main power circuit of the active clamped flyback converter comprises a main switch tube Q1 and a clamping switch tube Q2;
[0026] The active clamp flyback converter output voltage V o Converted into analog sampling signal v through isolation sampling circuit os connected to a digital controller for closed-loop control of a flyback converter; the input voltage source V in The first resistor voltage divider sampling circuit converts the analog sampling signal v ins connected to the digital controller, used to calculate the turn-on time parameters of the main switch tube Q1 and the clamp switch tube Q2 of the flyback converter; the drain-source voltage V dsQ1 The second resistor voltage divider sampling circuit converts the analog sampling signal v dsp connected to a digital controller for realizing adaptive ZVS control of the main switch tube Q1 of the flyback converter; the digital controller outputs drive pulses QS1 and QS2; the drive pulses QS1 and QS2 and the output signal v of the second resistor voltage divider sampling circuit dspConnected to the driving and control circuit, the driving and control circuit outputs a driving signal Q g1 and Q g2 They respectively drive the main switch tube Q1 and the clamp switch tube Q2 of the flyback converter.
[0027] Furthermore, the digital controller includes an output voltage closed-loop regulation module, a Q1 and Q2 switch tube opening time parameter calculation module, a pulse width extraction module, a pulse width closed-loop regulation module and a PWM generation module;
[0028] Output voltage sampling value v os Connected to the output voltage closed-loop regulation module, which is used to close the loop to control the output voltage of the active clamp flyback converter and perform proportional integral regulator operation, that is, v er =(k p +k i / s)×(V oref -v os ), where V oref Indicates the converter output voltage reference value, k p and k i are proportional and integral coefficient constants respectively; drain-source voltage v dsp After passing through the pulse width extraction module and the pulse width closed-loop regulation module, the pulse width regulation output value dT is output z , as the switching time adjustment value of the clamp switch tube Q2; the regulator output value v er , input voltage sampling value v ins , output voltage sampling value v os And the pulse width modulation output value dT z They are all connected to the Q1 and Q2 switch tube turn-on time parameter calculation module, which is used to calculate the turn-on time parameters T1 and T2 of the main switch tube Q1 and the clamp switch tube Q2; the turn-on time parameters T1 and T2 generate drive pulses QS1 and QS2 of the main switch tube Q1 and the clamp switch tube Q2 via the PWM generation module.
[0029] Furthermore, the calculation formulas of the turn-on time parameters T1 and T2 of the main switch tube Q1 and the clamp switch tube Q2 are respectively:
[0030]
[0031] Where n represents the primary-to-secondary turns ratio of the flyback converter transformer.
[0032] Furthermore, the pulse width extraction module and the pulse width closed-loop regulation module include a first analog comparator, a pulse width capture module and a PI regulator;
[0033] Drain-source voltage v dsp , threshold v th2are connected to the positive and negative terminals of the first analog comparator respectively, and the output signal v pls Connected to the pulse width capture module, which is used to obtain v pls High level duration T ps , T ps The characteristic time length T is obtained by subtracting the time T2 from the subtractor. psf , T psf With reference time T ref The difference T is obtained by the subtractor er , T er The PI regulator outputs the switching time adjustment value dT of the clamp switch tube Q2 z .
[0034] Further, the driving and control circuit includes a second analog comparator, a dual-input AND gate and a half-bridge driving circuit;
[0035] Drain-source voltage v dsp , comparator reference v th1 are connected to the negative terminal and the positive terminal of the second analog comparator respectively, and the output signal Q sp , QS2 output by the PWM generation module is connected to the two input terminals of the dual-input AND gate, and the output signal Q sp2 The QS1 output from the PWM generation module is connected to the half-bridge drive circuit, which outputs two drive signals Q g1 and Q g2 They respectively drive the main switch tube Q1 and the clamp switch tube Q2 of the flyback converter.
[0036] The present invention indirectly obtains characteristic information of the ZVS characteristic of the main switch tube by sampling the DS voltage of the drain-source electrode of the main switch tube, combines the volt-second balance and the adjustment value obtained by the closed-loop control of the characteristic information, realizes adaptive adjustment of the opening time of the clamp switch tube, realizes closed-loop control of the negative current of the transformer, and finally realizes reliable ZVS operation of the main switch tube and the clamp switch tube of the active clamping topology in combination with a specific logic circuit. Compared with the prior art, the present invention has the following significant advantages: 1) DS voltage sampling is performed only through resistance, and the sampling scheme is simple and convenient and has a wide range of applications. Compared with the existing shunt sampling scheme, it has a small volume and does not introduce additional losses, which has great benefits for improving the power density of the converter; 2) By closed-loop adaptive adjustment of the negative current, the magnitude of the negative current of the converter is not affected by factors such as the input voltage and output load of the converter, which is conducive to realizing soft opening of the converter under all working conditions; 3) The drain-source voltage signal of the main switch tube is sampled by resistance, and the signal has a large amplitude and obvious characteristic information, and has the advantages of high reliability and strong anti-interference ability.
[0037] The present invention is further described in detail below in conjunction with the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS
[0038] Figure 1 Schematic diagram of an active clamp flyback converter.
[0039] Figure 2A Schematic diagram of the active clamp flyback converter and its key voltage points.
[0040] Figure 2B Schematic diagram of possible typical waveform B of an active clamp flyback converter.
[0041] Figure 2C Schematic diagram of possible typical waveform C of an active clamp flyback converter.
[0042] Figure 2D Schematic diagram of possible typical waveform D of active clamp flyback converter.
[0043] Figure 2E Schematic diagram of possible typical waveform E of an active clamp flyback converter.
[0044] Figure 3A Schematic diagram of mode A of the active clamp flyback converter.
[0045] Figure 3B Schematic diagram of mode B of the active clamp flyback converter.
[0046] Figure 3C Schematic diagram of mode C of the active clamp flyback converter.
[0047] Figure 3D Schematic diagram of mode D of the active clamp flyback converter.
[0048] Figure 4 The present invention is a flowchart of a ZVS adaptive control method for an active clamping converter according to an embodiment of the present invention.
[0049] Figure 5 It is an implementation block diagram of an embodiment of the present invention.
[0050] Figure 6 FIG. 4 is a block diagram of a driving and control circuit according to an embodiment of the present invention.
[0051] Figure 7 The figure is a block diagram of pulse width extraction and pulse width closed-loop regulation according to an embodiment of the present invention.
[0052] Figure 8 It is an implementation block diagram of a double-clamped ZVS buck-boost converter according to an embodiment of the present invention.
[0053] Fig. 9 This is a waveform diagram of a test prototype of an embodiment of the present invention. DETAILED DESCRIPTION
[0054] The technical solutions in the examples of the present application will be described clearly and completely below in conjunction with the drawings in the examples of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, rather than all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those skilled in the art without making any creative work are within the scope of protection of the present application.
[0055] The example of the present application takes the active clamped flyback converter as an embodiment. It should be pointed out that the scheme of the present application is also applicable to other active clamped topologies such as active clamped forward converter and double clamped ZVS buck-boost converter.
[0056] To illustrate the key technology of the present invention, the following will be combined with FIG. 2A to FIG. 2E as well as FIG. 3A to FIG. 3D Expand for detailed instructions. Figure 2A The topological structure diagram of the active clamp flyback converter is given, and the transformer T is selected r The excitation current i Lm , Transformer leakage inductance L r The current i Lr , the driving of the main switch tube Q1 and the clamp switch tube Q2 and the drain-source voltage V dsQ1 As the research focus, all leakage inductance current i Lr The positive direction of Figure 2A shown.
[0057] See also Figure 2B , a switching cycle of the active clamp flyback converter is mainly divided into three time periods: t0~t1, t1~t2, and t2~t3. Figure 3A In the time period t0 to t1, the main switch tube Q1 is turned on, and the primary side of the converter is supplied with voltage from the input voltage source Vin through the main switch tube Q1 to the transformer T r The secondary side of the converter is disconnected and the output filter capacitor C Ld To load R Ld Support power supply. At this stage, the excitation induction current i Lm and leakage inductance current i Lr Synchronous linear rise. Figure 3B In the stage from t1 to t2, the main switch tube Q1 is turned off and the clamp switch tube Q2 is turned on. On the one hand, the excitation current decreases linearly, and on the other hand, the transformer T r The secondary side is turned on, the secondary current is reflected to the primary side, and the leakage inductance current i Lr Resonance drops; at t1_2, the leakage inductance current and the excitation inductance current are equal, and the transformer T r The secondary side is disconnected, and the output filter capacitor C Ld To load R Ld Support power supply. Figure 3C, from t1_2 to t2, since the clamp switch tube Q2 is continuously turned on, the clamp capacitor voltage is continuously added to the primary side of the transformer, and the excitation induction current i Lm and the resonant inductive current i Lr The current continues to decrease synchronously until the clamp switch Q2 is turned off at time t2. Under normal circumstances, the excitation current i Lm Decreases to negative values. Figure 3D During the time period from t2 to t3, the main switch tube Q1 and the clamp switch tube Q2 are both turned off, and the excitation current i Lm The parasitic capacitance of the main switch tube Q1 is discharged and the parasitic capacitance of the clamp switch tube Q2 is charged. The drain-source voltage of the Q1 switch tube gradually decreases. When the parasitic capacitance of the main switch tube Q1 is discharged, the drain-source voltage of the Q1 switch tube V dsQ1 When it drops to 0, the main switch tube Q1 is turned on, and the converter starts the next switching cycle. At this time, the main switch tube Q1 is turned on with zero voltage, which is beneficial to reduce the turn-on loss of Q1 and improve the efficiency of the converter.
[0058] The reliable realization of zero voltage turn-on of the main switch of the active clamp flyback converter is a key technology to improve the converter. During the t2-t3 stage, i.e., the dead time of the main switch and the clamp switch, the transformer excitation current i Lm Whether the parasitic capacitance energy of the main switch tube can be effectively discharged directly determines whether the main switch tube Q1 can effectively achieve ZVS. Figure 2B and Figure 3D , assuming that the excitation current at time t2 is -i Lm _t2, assuming that i Lm _t2 is large enough. In addition, considering that the magnetizing inductance is much larger than the parasitic capacitance of the main switch tube and the clamp switch tube, the transformer T r The excitation current discharge time is,
[0059]
[0060] Among them C oss1 and C oss2 They refer to the parasitic capacitance of the main switch tube Q1 and the clamp switch tube Q2 respectively. It can be seen from the formula (1) that the time for the excitation current to discharge the parasitic capacitance is related to the excitation current i Lm_t2 Inversely proportional, that is, the greater the reverse excitation induction current value at time t2, the shorter the required discharge time; conversely, the longer the discharge time.
[0061] See also Figure 2B to Figure 2D , and the converter operation waveform corresponding to the excitation induction current at different times t2 is given. Figure 2C In the example, the on-time of the clamp switch Q2 is shorter than that of Figure 2B slightly longer, resulting in the reverse excitation current i at time t2 Lm_t2This is conducive to quickly discharging the parasitic capacitance of the main switch tube Q1 and the clamp switch tube Q2 at time t2-t3, and reliably ensuring the ZVS opening of the main switch tube Q1. However, excessive reverse excitation current will inevitably lead to increased conduction loss of the transformer, affecting the efficiency of the converter. Figure 2D In the example, the on-time of the clamp switch Q2 is shorter than that of Figure 2B This makes the transformer reverse excitation current i Lm_t2 Although this is beneficial to reducing the conduction loss of the transformer, it makes the time for the excitation current to discharge the parasitic capacitance of Q1 and Q2 longer. It may happen that after the dead time, the parasitic capacitance charge of Q1 is still not completely discharged, that is, the main switch tube Q1 cannot reliably achieve ZVS opening. In addition, when the input voltage or output load changes, the reverse excitation current i Lm_t2 It will also change accordingly. How to reliably ensure the ZVS opening of the switch tube Q1 is the key issue.
[0062] For further information, see Figure 2E , if the excitation current i at the moment t2, i.e. the moment when the clamp tube Q2 is turned off, Lm_t2 If it is too small, the time for the excitation current to discharge the parasitic capacitance will be longer, and the drain-source voltage of the Q1 switch tube cannot resonate to zero level during the time period t2-t3, which means that the main switch tube Q1 will not be able to achieve ZVS soft switching, which will seriously affect the conversion efficiency of the converter.
[0063] For further information, see Figure 2B to Figure 2D It can be seen that the larger the reverse excitation current of the transformer at time t2, the smaller the time period from the main switch tube Q1 resonating to zero voltage after the clamp switch tube Q2 is turned off, and vice versa; see Figure 2E If the reverse excitation current of the transformer is too small at time t2, the main switch tube Q1 cannot resonate to zero voltage, that is, the time period from the resonance of the main switch tube Q1 to zero voltage after the clamp switch tube Q2 is turned off is "infinitely long"; in summary, the time length from the resonance of the main switch tube Q1 to zero voltage after the clamp switch tube Q2 is turned off can indirectly reflect the size of the reverse excitation current of the transformer. By reasonably controlling the time length, the ZVS opening of the main switch tube Q1 can be reliably guaranteed, and the control of the time length from resonance to zero voltage can be achieved by controlling the opening time of Q2.
[0064] Combination Figure 4 In one embodiment, a ZVS adaptive control method for an active clamping converter is provided, the method comprising the following steps:
[0065] Step 1: Collect the input voltage v of the active clamp converter topology ins , output voltage v os And the drain-source voltage v of the main switch tube Q1dsp ;
[0066] Step 2, according to the sampling value of step 1, respectively obtain the conduction time values T1 and T2 of the main switch tube Q1 and the clamp switch tube Q2;
[0067] Step 3, obtaining driving pulses QS1 and QS2 of the main switch tube Q1 and the clamp switch tube Q2 according to the conduction time values T1 and T2;
[0068] Step 4: the drain-source voltage v dsp Perform logical operations with the drive pulse and amplify the drive capability to generate a power drive signal Q g1 and Q g2 , driving the main switch tube Q1 and the clamp switch tube Q2 respectively to achieve ZVS operation of the converter.
[0069] Furthermore, in one embodiment, the step 2 of obtaining the on-time value T1 of the main switch tube Q1 according to the sampled value of step 1 specifically includes:
[0070] Step 21-1, input voltage v ins , output voltage v os The sampling value performs closed-loop regulation on the converter output voltage via a proportional-integral regulator;
[0071] Step 21-2, based on the output value v of the proportional integral regulator er Calculate the on-time T1 of the main switch tube Q1.
[0072] Furthermore, in one embodiment, in step 2, the on-time value T2 of the clamp switch tube Q2 is obtained based on the sampled value of step 1, and the specific process includes:
[0073] Step 22-1, the on-time T of the clamp switch tube Q2 is calculated from the on-time T1 of the main switch tube Q1 by using the volt-second balance. 20 ;
[0074] Step 22-2, the drain-source voltage v of the main switch tube Q1 dsp The comparator gets v pls Signal;
[0075] Step 22-3, obtain v by pulse width capture pls Signal low level duration T ps ;
[0076] Step 22-4, low level duration T ps Subtract the on-time T2 of the clamp switch tube Q2 in the previous switching cycle to obtain the characteristic time value T that identifies the ZVS characteristic of the main switch tube Q1 psf ;
[0077] Step 22-5, for the characteristic time value T psf Perform proportional-integral closed-loop regulation to obtain the switching time adjustment value dT of the clamp switch tube Q2 z ;
[0078] Step 22-6, adjust the switching time to dT z Superimposed to T 20 The final on-time value T2 of the clamp switch tube Q2 is obtained.
[0079] Further, in one embodiment, the drain-source voltage v dsp Perform logical operations with the drive pulse and amplify the drive capability to generate a power drive signal Q g1 and Q g2 The specific process includes:
[0080] Step 4-1: The drain-source voltage v of the main switch tube Q1 is dsp Q is obtained through the comparator sp Signal;
[0081] Step 4-2, the Q sp The signal and QS2 signal are connected to the QS2 signal through a dual-input AND gate. sp2 Signal;
[0082] Step 4-3, the Q sp2 The signal and QS1 signal are outputted through the half-bridge drive circuit. g1 and Q g2 Two signals drive the main switch tube Q1 and the clamp switch tube Q2 respectively.
[0083] See also Figure 5 , which is a principle block diagram of an embodiment of the present invention, includes an active clamp flyback converter 400, a digital controller 410, an isolation sampling circuit 401, a first resistor voltage division sampling circuit 402, a second resistor voltage division sampling circuit 404, and a drive and control circuit 403. The digital controller 410 further includes modules such as 411 to 415.
[0084] Specifically, the active clamp flyback converter output voltage V o The isolated sampling circuit 401 converts the sampled signal into an analog sampled signal v os connected to the digital controller 410 for closed-loop control of the flyback converter; the input voltage source V in The first resistor voltage divider sampling circuit 402 converts the analog sampling signal v ins connected to the digital controller 410, used to calculate the turn-on time parameters of the main switch tube Q1 and the clamp switch tube Q2 of the flyback converter; the drain-source voltage VdsQ1 The second resistor voltage divider sampling circuit 404 converts the analog sampling signal v dsp connected to the digital controller 410, for implementing the adaptive ZVS control of the main switch tube Q1 of the converter; the digital controller 410 outputs the pulse width drive signals QS1 and QS2; the pulse width signals QS1 and QS2 and the output signal v of the second resistor voltage divider sampling circuit 404 dsp Connected to the driving and control circuit 403; the driving and control circuit 403 outputs a driving signal Q g1 and Q g2 Directly drives the main switch tube Q1 and the clamp switch tube Q2 of the flyback converter.
[0085] Specifically, the digital controller 410 module includes modules 411 to 415. The output voltage sampling value v os Connected to the output voltage closed-loop regulation module 411, which outputs the signal regulator output value v er The module 412 is connected to the Q1 and Q2 switch on-time parameter calculation module; the output voltage closed-loop regulation module 411 is used to close the loop to control the output voltage of the active clamp flyback converter. This module mainly performs proportional integral regulator operation, that is, v er =(k p +k i / s)×(V oref -v os );V oref Indicates the converter output voltage reference value, k p and k i are proportional and integral coefficient constants respectively, and their specific values can be optimized according to the specific working conditions of the four-switch buck-boost converter. The regulator output v er , input voltage sampling value v ins , output voltage sampling value v os And the pulse width modulation output dT z The four input signals are connected to the Q1 and Q2 switch on-time parameter calculation module 412. The module 412 is used to calculate the on-time parameters T1 and T2 of the main switch Q1 and the clamp switch Q2 of the flyback converter. The detailed calculation formula is as follows:
[0086]
[0087] T1 in formula (2) represents the on-time of the main switch of the flyback converter. Its calculated value and input voltage V in Inversely proportional to improve the dynamic response of the converter under input voltage jump conditions; the value of T1 is simultaneously proportional to the output value V of the output voltage closed-loop regulation module 411 eris proportional to the output voltage of the flyback converter. o When the output voltage drops, the T1 time is increased. o When it increases, the T1 time is reduced.
[0088] Where n in equation (3) represents the primary-to-secondary turns ratio of the flyback converter transformer. Equation (3) consists of two terms. The first term is This term is obtained from the volt-second balance of the transformer; the second term T 21 =dT z It is used to fine-tune the on-time of the clamp switch tube, so as to accurately control the negative current of the transformer excitation current when the clamp tube is turned off (see Figure 2B The T2 moment) can reliably ensure the ZVS of the main switch tube Q1 to improve the efficiency of the converter. 21 =dT z Depend on Figure 4 The pulse width closed-loop adjustment module 414 in the digital controller shown is obtained, and the specific mechanism of this module will be described in detail below.
[0089] The first term in the formula (3) is explained below. The physical mechanism of Figure 2B , in the time period of t0 to t1, the main switch tube Q1 of the flyback converter is turned on, the input voltage is applied to the primary side of the transformer, and the transformer excitation current rises linearly. The change of the excitation current is as follows:
[0090]
[0091] Among them, i Lm_t1 and i Lm_t0 They represent the current of the magnetizing inductor at time t1 and t0 respectively, L m Indicates the magnetic induction value.
[0092] See also Figure 2B In the time period from t1 to t2, the main switch tube Q1 is turned off, the clamp switch tube Q2 is turned on, and the clamp capacitor voltage is reversely applied to the primary side of the transformer of the flyback converter. The transformer excitation current decreases linearly, and the change in the excitation current is as follows:
[0093]
[0094] Among them, i Lm_t2 and i Lm_t1 They represent the current of the magnetizing inductor at t2 and t1 respectively, v clp Indicates the voltage across the clamping capacitor. Under steady-state conditions, the clamping capacitor voltage is equal to the voltage reflected from the output voltage to the primary side of the transformer, that is, v clp =n×v osObviously, under steady-state working conditions, the excitation inductance of the active clamp flyback converter needs to satisfy the volt-second balance, that is:
[0095] i Lm_t1 -i Lm_t0 =i Lm_t1 -i Lm_t2 (6)
[0096] thereby,
[0097]
[0098] It should be pointed out that the above derivation process ignores the leakage inductance of the transformer and the dead time of the main switch tube Q1 and the clamp switch tube Q2 of the flyback converter, so the formula (7) shown is only an approximation. This is the reason for introducing the second term T 21 =dT z The reason, dT z It is used to accurately control the turn-on time of the clamp switch tube Q2, realize accurate control of the reverse excitation current of the converter transformer, and finally reliably realize the ZVS turn-on of the main switch tube Q1. It should be pointed out that the method and device applied for by the present invention can adaptively adjust the turn-on time of the clamp switch tube Q2 to ensure that the reliable ZVS turn-on of the main switch tube Q1 can be achieved under different input voltages and different load conditions.
[0099] See also Figure 5 Specifically, the output T1 and T2 time parameters of the Q1 and Q2 switch on-time parameter calculation module 412 are connected to the PWM generation module 415 to generate PWM signals QS1 and QS2. The signals QS1 and QS2 and the output signal v of the second resistor voltage sampling circuit 404 are dsp The driving and control circuit 403 is connected to the input of the driving and control circuit 403, and the driving and control circuit 403 finally generates the driving signal Q1 of the main switch tube Q1 and the auxiliary switch tube Q2 of the active clamp flyback converter. g1 and Q g2 .
[0100] See also Figure 6 , is a circuit block diagram of the driving and control circuit, which is further divided into a second analog comparator 500, a dual-input AND gate 501 and a half-bridge driving circuit 502. The positive input terminal of the analog comparator 500 is connected to the reference v th1 The reference value is usually about 1V. The negative input terminal of the second analog comparator 500 is connected to the value v of the drain-source voltage of the main switch tube Q1 after being sampled by a resistor. dsp The second analog comparator 500 outputs a signal Q sp Connected to one end of the dual-input AND gate 501, and the other end of the dual-input AND gate is connected to Figure 5 The output signal QS2 of the PWM generation module 415, the dual-input AND gate output signal Q sp2 and Figure 4 Another output signal QS1 of the PWM generation module 415 is connected to the input of the half-bridge driving circuit 502. The two output signals Q g1 and Q g2 They are used to drive the main switch tube Q1 and the clamp switch tube Q2 of the active clamp flyback converter respectively.
[0101] See also Figure 6 The present invention applies the information v of the drain-source voltage of the main switch tube Q1 dsp The second analog comparator 500 is introduced into the driving circuit, that is, only when the v dsp The voltage is lower than the threshold voltage v th1 When the comparator flips and outputs a high level, the drive signal Q g2 Only then can Q1 be driven to turn on, thus ensuring that the drain-source voltage V dsQ1 It has dropped to a lower potential, so that ZVS can be turned on reliably. It should be pointed out that Figure 6 The prerequisite for the normal operation of the driving and control circuit shown is to reasonably control the opening time of the clamp switch tube Q2 to ensure sufficient reverse excitation induction current to discharge the parasitic capacitance of the main switch tube Q1 within the dead time. The adjustment of the opening time of the clamp switch tube Q2 depends on the second term of formula (3), namely T 21 =dT z , the dT z Further by Figure 5 The pulse width extraction module 413 and the pulse width closed-loop adjustment module 414 are obtained.
[0102] See also Figure 7 , for the Figure 5 The pulse width extraction module 413 and the pulse width closed-loop regulation module 414 are schematic diagrams, and the drain-source voltage V of the main switch Q1 is dsQ1 The signal v after voltage division sampling dsp Connected to the positive terminal of the first analog comparator 600, the threshold value v th2 is connected to the negative terminal of the first analog comparator 600, the comparator output signal v pls Connected to the pulse width capture module 601 to obtain v pls High level duration T ps , T ps The characteristic time length T is obtained by subtracting T2 time from the subtractor. psf , the T psf Time is Figure 2B to Figure 2CThe time length from t2 to t3 represents the magnitude of the transformer reverse excitation current when the clamp switch tube Q2 of the converter is turned off. The larger the reverse excitation current, the larger the T psf The smaller the transformer is, the smaller the voltage is, and vice versa. Furthermore, the reverse excitation current of the transformer determines whether the parasitic capacitance of the main switch Q1 of the flyback converter can be reliably discharged during the dead time, and further determines the reliable ZVS opening of the main switch Q1. Therefore, controlling T psf A reasonable time length can achieve reliable ZVS of Q1. Figure 7 , the T psf Time and base time T ref Subtract the difference T er , the difference T er The adjustment value dT of the on-time of the clamp switch tube Q2 of the active clamp flyback converter can be obtained through the PI regulator 602 module. z The present invention applies a PI regulator to adjust the characteristic time T psf When controlled at the desired benchmark T ref In this way, the reverse excitation current of the flyback converter transformer is controlled, and the reliable ZVS of the main switch tube Q1 is further realized. It should be pointed out that the solution applied by the present invention does not depend on the specific input voltage and converter load conditions. By adjusting the expected reference value T ref The ZVS opening of the active clamp flyback converter can be realized adaptively, and has the excellent characteristics of being convenient and having a wide range of applications. The reference value T of the characteristic time ref It needs to be determined based on the input and output conditions of the specific converter, the parasitic capacitance of the converter switch tube, the transformer magnetizing inductance and other information, and is usually 1% to 3% of the switching period.
[0103] To further illustrate the effect of this control method on improving efficiency, a double-clamped ZVS buck-boost converter is constructed according to an example of the present invention. Figure 8 Under the conditions of 36V input voltage, 5V output voltage, and 30V clamping capacitor voltage, the converter steady-state waveform is measured, as shown in Fig. 9 As shown, it can be seen that the embodiment of the present invention can effectively and accurately control the reverse excitation current of the flyback converter transformer, thereby achieving adaptive ZVS opening of the converter.
[0104] The above are only preferred embodiments of the present invention, and the protection scope of the present invention is not limited to the above embodiments. All technical solutions under the concept of the present invention belong to the protection scope of the present invention. It should be pointed out that for ordinary technicians in this technical field, some improvements and modifications without departing from the principle of the present invention should be regarded as the protection scope of the present invention.
Claims
1. A ZVS adaptive control method for an active clamping converter, characterized in that: The method comprises the following steps: Step 1: Collect the input voltage v of the active clamp converter topology ins 、Output voltage v os And the drain-source voltage v of the main switch tube Q1 dsp ; Step 2, according to the sampling value of step 1, respectively obtain the conduction time values T1 and T2 of the main switch tube Q1 and the clamp switch tube Q2; Step 3, obtaining driving pulses QS1 and QS2 of the main switch tube Q1 and the clamp switch tube Q2 according to the conduction time values T1 and T2; Step 4: the drain-source voltage v dsp Perform logical operations with the drive pulse and amplify the drive capability to generate a power drive signal Q g1 and Q g2 , respectively drive the main switch tube Q1 and the clamp switch tube Q2 to achieve ZVS operation of the converter; Step 2 is to obtain the on-time value T1 of the main switch tube Q1 based on the sampled value in step 1. The specific process includes: Step 21-1, input voltage v ins , output voltage v os The sampling value performs closed-loop regulation on the converter output voltage via a proportional-integral regulator; Step 21-2, based on the output value v of the proportional integral regulator er Calculate the conduction time T of the main switch tube Q1 1; In step 2, based on the sampled value in step 1, the conduction time value T2 of the clamp switch tube Q2 is obtained. The specific process includes: Step 22-1, the on-time T of the clamp switch tube Q2 is calculated from the on-time T1 of the main switch tube Q1 by using the volt-second balance. 20 ; Step 22-2, the drain-source voltage v of the main switch tube Q1 dsp The comparator gets v pls Signal; Step 22-3, obtain v by pulse width capture pls Signal low level duration T ps ; Step 22-4, low level duration T ps Subtract the on-time T2 of the clamp switch tube Q2 in the previous switching cycle to obtain the characteristic time value T that identifies the ZVS characteristic of the main switch tube Q1 psf ; Step 22-5, for the characteristic time value T psf Perform proportional-integral closed-loop regulation to obtain the switching time adjustment value dT of the clamp switch tube Q2 z ; Step 22-6, adjust the switching time to dT z Superimposed to T 20 The final on-time value T2 of the clamp switch tube Q2 is obtained; Step 4: the drain-source voltage v dsp Perform logical operations with the drive pulse and amplify the drive capability to generate a power drive signal Q g1 and Q g2 The specific process includes: Step 4-1: The drain-source voltage v of the main switch tube Q1 is dsp Q is obtained through the comparator sp Signal; Step 4-2, the Q sp The signal and QS2 signal are connected to the QS2 signal through a dual-input AND gate. sp2 Signal; Step 4-3, the Q sp2 The signal and QS1 signal are outputted through the half-bridge drive circuit. g1 and Q g2 Two signals drive the main switch tube Q1 and the clamp switch tube Q2 respectively.
2. A ZVS adaptive control circuit for an active clamping converter based on the method of claim 1, characterized in that: The circuit comprises: an active clamp flyback converter (400), a digital controller (410), an isolation sampling circuit (401), a first resistor voltage division sampling circuit (402), a second resistor voltage division sampling circuit (404) and a drive and control circuit (403); wherein the main power circuit of the active clamp flyback converter (400) comprises a main switch tube Q1 and a clamp switch tube Q2; The active clamp flyback converter (400) outputs a voltage V o The isolated sampling circuit (401) converts the sampled signal into an analog sampled signal v os connected to a digital controller (410) for closed-loop control of a flyback converter; an input voltage source V in The first resistor voltage dividing sampling circuit (402) converts the analog sampling signal v into ins connected to the digital controller (410) and used to calculate the turn-on time parameters of the main switch tube Q1 and the clamp switch tube Q2 of the flyback converter; the drain-source voltage V dsQ1 The second resistor voltage dividing sampling circuit (404) converts the analog sampling signal v into dsp connected to a digital controller (410) for implementing adaptive ZVS control of a main switch tube Q1 of a flyback converter; the digital controller (410) outputs drive pulses QS1 and QS2; the drive pulses QS1 and QS2 and the output signal v of the second resistor voltage-dividing sampling circuit (404) dsp Connected to the driving and control circuit (403), the driving and control circuit (403) outputs a driving signal Q g1 and Q g2 They respectively drive the main switch tube Q1 and the clamp switch tube Q2 of the flyback converter.
3. The ZVS adaptive control circuit of the active clamping converter according to claim 2, characterized in that: The digital controller (410) comprises an output voltage closed-loop regulation module (411), a Q1 and Q2 switch tube opening time parameter calculation module (412), a pulse width extraction module (413), a pulse width closed-loop regulation module (414) and a PWM generation module (415); Output voltage sampling value v os connected to an output voltage closed-loop regulation module (411), which is used for closed-loop control of the output voltage of the active clamp flyback converter and performs proportional-integral regulator operation, i.e., v er =(k p +k i / s)×(V oref -v os ), where V oref Indicates the converter output voltage reference value, k p and k i are proportional and integral coefficient constants respectively; drain-source voltage v dsp After passing through the pulse width extraction module (413) and the pulse width closed-loop regulation module (414), the pulse width regulation output value dT is output. z , as the switching time adjustment value of the clamp switch tube Q2; the regulator output value v er , input voltage sampling value v ins , output voltage sampling value v os And the pulse width modulation output value dT z They are all connected to the Q1 and Q2 switch tube turn-on time parameter calculation module (412), which is used to calculate the turn-on time parameters T1 and T2 of the main switch tube Q1 and the clamp switch tube Q2; the turn-on time parameters T1 and T2 generate drive pulses QS1 and QS2 of the main switch tube Q1 and the clamp switch tube Q2 via the PWM generation module (415).
4. The ZVS adaptive control circuit of the active clamping converter according to claim 3, characterized in that: The calculation formula of the turn-on time parameter T1 of the main switch tube Q1 is:
5. The ZVS adaptive control circuit of the active clamping converter according to claim 4, characterized in that: The calculation formula of the opening time parameter T2 of the clamp switch tube Q2 is: Where n represents the primary-to-secondary turns ratio of the flyback converter transformer.
6. The ZVS adaptive control circuit of the active clamping converter according to claim 5, characterized in that: The pulse width extraction module (413) and the pulse width closed-loop adjustment module (414) include a first analog comparator (600), a pulse width capture module (601) and a PI regulator (602); Drain-source voltage v dsp , threshold v th2 are respectively connected to the positive terminal and the negative terminal of the first analog comparator (600), and the output signal v of the first analog comparator (600) pls Connected to the pulse width capture module (601), which is used to obtain v pls High level duration T ps , T ps The characteristic time length T is obtained by subtracting the time T2 from the subtractor. psf , T psf With reference time T ref The difference T is obtained by the subtractor er , T er The switching time adjustment value dT of the clamping switch tube Q2 is outputted via the PI regulator (602). z .
7. The ZVS adaptive control circuit of the active clamping converter according to claim 6, characterized in that: The driving and control circuit (403) comprises a second analog comparator (500), a dual-input AND gate (501) and a half-bridge driving circuit (502); Drain-source voltage v dsp , comparator reference v th1 are respectively connected to the negative terminal and the positive terminal of the second analog comparator (500), and the output signal Q sp , QS2 output by the PWM generation module (415) are respectively connected to the two input terminals of the dual-input AND gate (501), and the output signal Q sp2 The QS1 output by the PWM generation module (415) is connected to a half-bridge driving circuit (502), which outputs two driving signals Q g1 and Q g2 They respectively drive the main switch tube Q1 and the clamp switch tube Q2 of the flyback converter.
Citation Information
Patent Citations
Active clamping forward converter and self-adaptive synchronous rectification digital control method
CN111682769A
ZVS control method for active clamp flyback topology adaptive dead time
CN111953185A
Power converter with active clamp
US10418912B2
Primary side sampled feedback control in power converters
US9083254B1
Control circuit and control method of flyback converter
CN109525117A