Method for manufacturing circuit substrate, circuit board and method for manufacturing circuit board

Abstract

A method for manufacturing a circuit substrate comprises the following steps: providing a copper-clad substrate, the copper-clad substrate comprising a substrate layer, a first inner copper foil layer disposed on one surface of the substrate layer, and a second inner copper foil layer disposed on the other surface of the substrate layer. At least one first opening is provided in the copper-clad substrate, the first opening penetrating the first inner copper foil layer and the substrate layer. A first electroplated copper layer is formed on the first inner copper foil layer by electroplating, and the first electroplated copper layer is also filled in the first opening to form a first conductive body. At least one second opening is provided in the first conductive body and a portion of the first electroplated copper layer corresponding to the first conductive body, so as to divide the first conductive body and a portion of the first electroplated copper layer corresponding to the first conductive body into a plurality of second conductive bodies, and obtain a circuit substrate. The method for manufacturing a circuit substrate provided by the present invention is easy to process, and the outer wall of the obtained second conductive body is uniform and flat. In addition, the present invention also provides a circuit board and a method for manufacturing the same.

Description

Technical Field

[0001] The invention relates to a method for manufacturing a circuit substrate, a circuit board and a method for manufacturing the same. Background Art

[0002] The aspect ratio (AR) of a blind hole is the ratio of the depth of the blind hole to the diameter of the blind hole. As electronic products and components develop towards high-density and high-frequency transmission, the number of pins at the input / output end is increasing, making the diameter and spacing of the blind holes on the circuit board smaller and smaller. In addition, high-frequency transmission has certain requirements on the thickness of dielectric materials, so the aspect ratio of blind holes tends to increase. However, in the prior art, blind holes with high aspect ratios are difficult to process and have poor quality. In addition, in the production of blind holes in multilayer boards, in order to ensure the uniformity of electrical connectivity between multilayer boards, it is inevitable to reserve a section of pad stumps, which will affect the integrity of the signal. Summary of the invention

[0003] In view of this, it is necessary to provide a method for manufacturing a circuit substrate, which can process high-aspect-ratio blind holes with good quality and is easy to process.

[0004] In addition, it is also necessary to provide a method for manufacturing a circuit board having the above-mentioned circuit substrate.

[0005] In addition, it is necessary to provide a circuit board.

[0006] A method for manufacturing a circuit substrate comprises the steps of:

[0007] A copper-clad substrate is provided. The copper-clad substrate comprises a substrate layer, a first inner copper foil layer disposed on one surface of the substrate layer, and a second inner copper foil layer disposed on the other surface of the substrate layer.

[0008] At least one first opening is formed in the copper-clad substrate, wherein the first opening passes through the first inner copper foil layer and the base material layer.

[0009] A first electroplated copper layer is formed on the first inner copper foil layer by electroplating, and the first electroplated copper layer is also filled in the first opening to form a first conductive body.

[0010] At least one second opening is opened in the first conductive body and a portion of the first electroplated copper layer corresponding to the first conductive body to divide the first conductive body and a portion of the first electroplated copper layer corresponding to the first conductive body into a plurality of second conductive bodies, and the circuit substrate is obtained.

[0011] Furthermore, the method further comprises the steps of:

[0012] At least one third opening is formed in the copper-clad substrate. The third opening is spaced apart from the first opening and penetrates the first inner copper foil layer and the substrate layer.

[0013] Wherein, the first electroplated copper layer is also filled in the third opening to form a third conductive body.

[0014] Furthermore, the method further comprises the steps of:

[0015] The first inner copper foil layer and the electroplated copper layer on the first inner copper foil layer are etched to form an inner circuit layer, and a portion of the substrate layer is exposed from the inner circuit layer.

[0016] Furthermore, the cross-section of the first opening along the thickness direction of the copper-clad substrate is trapezoidal, and the first opening includes a first end and a second end opposite to the first end, the first end is formed on the first inner copper foil layer, and the cross-sectional length of the first end in the thickness direction is greater than the cross-sectional length of the second end in the thickness direction.

[0017] Furthermore, the end of the second conductor away from the second inner copper foil layer is a rectangle in the forward projection along the thickness direction of the circuit substrate, the length of the forward projection is 180 to 280 microns, the width of the forward projection is 15 to 275 microns, and the depth of the second conductor is 8 to 250 microns.

[0018] Furthermore, the copper-clad substrate further includes a length direction and a width direction perpendicular to each other along the extension surface, and the aspect ratio of the second conductive body along the length direction is 0.03-1.40, and the aspect ratio of the second conductive body along the width direction is 0.03-16.7.

[0019] Furthermore, the second opening is formed by laser or mechanical drilling.

[0020] A method for manufacturing a circuit board, comprising the steps of:

[0021] A single-sided copper-clad laminate is provided. The single-sided copper-clad laminate comprises a dielectric layer and an outer copper foil layer arranged on one side of the dielectric layer.

[0022] A circuit substrate as described above is provided, and the first inner copper foil layer and the first electroplated copper layer corresponding to the first inner copper foil layer are etched to form an inner circuit layer, and a portion of the base material layer is exposed from the inner circuit layer to obtain an intermediate.

[0023] The single-sided copper-clad laminate and the intermediate body are pressed together, with the dielectric layer facing the inner circuit layer and a portion of the dielectric layer filling the second opening.

[0024] A plurality of fourth openings are formed on the single-sided copper-clad laminate, wherein the fourth openings penetrate the single-sided copper-clad laminate, and the second conductive body is exposed at the bottom of the fourth openings.

[0025] Electroplating is performed on the outer copper foil layer to form a second electroplating layer, the second electroplating layer is filled in the fourth opening to form a fourth conductive body, and the fourth conductive body is electrically connected to the second conductive body.

[0026] The second electroplating layer and the outer copper foil layer are etched to obtain a first outer circuit layer, and the second inner copper foil layer is etched to obtain a second outer circuit layer, and the circuit board is obtained.

[0027] Furthermore, the method further includes the step of forming a seed layer on the side wall of the fourth opening, wherein the seed layer is electrically connected to the inner circuit layer and the outer circuit layer.

[0028] A circuit board comprises a first outer circuit layer, a dielectric layer, an inner circuit layer, a substrate layer and a second outer circuit layer which are stacked in sequence.

[0029] A first opening is provided in the first outer circuit layer and the substrate layer, a first conductor is provided in the first opening, at least one second opening is provided in the first conductor, the second opening is used to divide the first conductor into a plurality of second conductors arranged at intervals, and the second conductors are electrically connected to the first outer circuit layer and the inner circuit layer.

[0030] A plurality of fourth conductive bodies are further disposed between the first outer circuit layer and the inner circuit layer. The fourth conductive bodies are electrically connected to the second outer circuit layer and the inner circuit layer, and the fourth conductive bodies correspond to and are connected to the second conductive bodies.

[0031] The dielectric layer is also filled in the gaps of the inner circuit layer and in the second opening.

[0032] The manufacturing method of the circuit substrate provided by the present invention first forms an electroplated copper layer and a first conductive body, and then sets a second opening to divide the first conductive body and the electroplated copper layer corresponding to the conductive body, thereby obtaining a plurality of second conductive bodies. Compared with the traditional blind hole processing method with the same aspect ratio, the method is easy to process and has the advantages of high density and electrical high-frequency transmission. Moreover, the outer wall of the obtained second conductive body is uniform and flat without residual piles, which can improve the heat dissipation efficiency or the stability of signal transmission. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 A schematic diagram of a copper-clad substrate provided in an embodiment of the present invention.

[0034] Figure 2 for Figure 1 The schematic diagram shown is a copper-clad substrate after the first groove is formed.

[0035] Figure 3 for Figure 2 Top view of the .

[0036] Figure 4 for Figure 2 The schematic diagram shown is a copper clad substrate after being provided with an electroplated copper layer and a first conductive body.

[0037] Figure 5 for Figure 4 Schematic diagram of the circuit substrate obtained after setting the second opening.

[0038] Figure 6 Schematic diagram of an intermediate provided by an embodiment of the present invention.

[0039] Figure 7 for Figure 6 Top view of the intermediate shown.

[0040] Figure 8 A schematic diagram of a single-sided copper clad laminate provided by the present invention.

[0041] Fig. 9 For pressing Figure 6 The intermediates and Figure 7 Schematic diagram of the single-sided copper clad laminate.

[0042] Fig.10 for Fig. 9 Schematic diagram after the fourth opening is opened.

[0043] Fig.11 for Fig.10 Schematic diagram after setting the second electroplated copper layer.

[0044] Fig.12 A schematic diagram of a circuit board provided by an embodiment of the present invention.

[0045] Main component symbols

[0046] Circuit board 100 Intermediate 71

[0047] Copper clad substrate 10 Single-sided copper clad substrate 80

[0048] Base material layer 11 Dielectric layer 81

[0049] First inner copper foil layer 121 Fourth opening 811

[0050] Second inner copper foil layer 122 Outer copper foil layer 82

[0051] Inner circuit layer 13 Second electroplated copper layer 821

[0052] First opening 20 Fourth conductive body 85

[0053] First end portion 21 First outer circuit layer 101

[0054] Second end portion 22 Second outer circuit layer 102

[0055] The third opening 23 has a thickness of D1 and D2.

[0056] The third end 24 has a depth D3, D4

[0057] Fourth end 25 Length L1, L2, M

[0058] The first electroplated copper layer 40 has a width W1, W2, N

[0059] The diameters of the first conductive body 50 are R1 and R2.

[0060] The thickness direction O of the third conductive body 51

[0061] The second opening 52 has a width direction Q

[0062] The second conductive body 60 has a length direction P

[0063] Circuit board 70

[0064] The following specific implementation manner will further illustrate the present invention in conjunction with the above-mentioned drawings. DETAILED DESCRIPTION

[0065] The following will be combined with the drawings in the embodiments of the present invention to clearly and completely describe the technical solutions in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0066] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art of the present invention. The terms used in the specification of the present invention herein are only for the purpose of describing specific embodiments and are not intended to limit the present invention.

[0067] Please also see Figures 1 to 8 An embodiment of the present invention provides a method for manufacturing a circuit substrate 70, comprising the steps of:

[0068] S1: Please see Figure 1, a copper clad substrate 10 is provided, wherein the copper clad substrate 10 includes a substrate layer 11, a first inner copper foil layer 121 disposed on one surface of the substrate layer 11, and a second inner copper foil layer 122 disposed on the other surface of the substrate layer 11.

[0069] In this embodiment, in step S1, the material of the substrate layer 11 includes at least one of polypropylene (PP), polyimide (PI), benzocyclobutene (BCB), liquid crystal polymer (LCP), polytetrafluoroethylene (PTFE), epoxy PP semi-cured sheet, ABF carrier material, etc.

[0070] In this embodiment, in step S1 , the thickness D1 of the base material layer 11 is 8 to 250 micrometers, and the thickness D2 of the first inner copper foil layer 121 and the second inner copper foil layer 122 are both 5 to 20 micrometers.

[0071] S2: See Figure 2 At least one first opening 20 is formed on the copper clad substrate 10 , and the first opening 20 at least penetrates the base material layer 11 .

[0072] In this embodiment, the first opening 20 penetrates the first inner copper foil layer 121 and the base layer 11 of the double-sided copper clad substrate, and the second inner copper foil layer 122 is exposed at the bottom of the first opening 20 .

[0073] In this embodiment, in step S2, the first opening 20 is formed by laser or mechanical drilling.

[0074] In this embodiment, in step S2, the cross-section of the first opening 20 along the thickness direction O of the double-sided copper clad substrate 10 is roughly trapezoidal, and the first opening 20 includes a first end 21 and a second end 22 opposite to the first end 21. The first end 21 is formed on the first inner copper foil layer 121. In the thickness direction O, the cross-sectional length L1 of the first end 21 is greater than the cross-sectional length L2 of the second end 22.

[0075] In this embodiment, please refer to Figure 3 Along the thickness direction O, the forward projection S of the first end portion 21 on the double-sided copper-clad substrate 10 is roughly rectangular, the width W1 of the forward projection S is 15 to 275 microns, the length of the forward projection S (i.e., the cross-sectional length L1 of the first end portion 21) is greater than the width W1, and the difference between the length L1 and the width W1 is greater than 50 microns.

[0076] S3: See Figure 4 , a first electroplated copper layer 40 is formed on the first inner copper foil layer 121 , and the first electroplated copper layer 40 also fills the first opening 20 to form a first conductive body 50 .

[0077] In this embodiment, the process before step S3 includes the following steps: disposing a metallization layer (not shown) on the sidewall of the first opening 20 , wherein the metallization layer is electrically connected between the first inner copper foil layer 121 and the second inner copper foil layer 122 .

[0078] In this embodiment, step S3 includes: electroplating on the metallization layer to form the first conductive body 50 .

[0079] S4: See Figure 5 and Figure 7 At least one second opening 52 is formed in the portion of the first electroplated copper layer 40 corresponding to the first conductive body 50, and the second opening 52 penetrates the first electroplated copper layer 40 and the first conductive body 50, so as to divide the first conductive body 50 and the portion of the first electroplated copper layer 40 corresponding to the first conductive body 50 into a plurality of second conductive bodies 60, thereby obtaining the circuit substrate 70. In the high-frequency transmission area of ​​the circuit or the high-density area of ​​the circuit, the second conductive body 60 is used as an input / output terminal to connect the circuit substrate 70 and other electronic components.

[0080] In this embodiment, in step S4 , the second opening 52 divides the first conductive body 50 and a portion of the first electroplated copper layer 40 corresponding to the first conductive body 50 into three second conductive bodies 60 , and the second inner copper foil layer 122 is exposed in the second opening 52 .

[0081] In this embodiment, along the thickness direction O, the forward projection U of the second conductive body 60 away from the second inner copper foil layer 122 is substantially rectangular, the length M of the forward projection U is 180-280 microns, and the width N of the forward projection U is 15-275 microns. And because the forward projection U is substantially rectangular, the aspect ratio of the second conductive body 60 includes an aspect ratio AR2 along the length direction P and an aspect ratio AR3 along the width direction Q, wherein the length direction P and the width direction Q are two directions perpendicular to each other along the extension surface of the copper clad substrate 10.

[0082] The aspect ratio AR2 of the second conductive body 60 along the length direction P is D3 / M, and the depth D3 is 8 to 250 microns, and the length M is 180 to 280 microns, so the aspect ratio AR2 along the length direction P is 0.03 to 1.40. Preferably, when the depth D3 is 112 microns and the length M is 187.5 microns, the aspect ratio AR2 along the length direction P is 112 / 187.5=0.60;

[0083] The aspect ratio AR3 of the second conductive body 60 along the width direction Q is D3 / N, and the depth D3 is 8 to 250 microns, and the width N is 15 to 275, so the aspect ratio AR3 along the width direction Q is 0.03 to 16.7. Preferably, when the depth D3 is 112 microns and the width N is 100 microns, the aspect ratio AR3 along the width direction Q is 112 / 100=1.12.

[0084] In this embodiment, in step S4, since the first electroplated copper layer 40 and the first conductive body 50 are both made of copper, it is easier to process the second opening 52, so as to obtain the second conductive body 60 with a high aspect ratio (it can be understood that if a blind hole with a high aspect ratio is directly opened on the double-sided copper-clad substrate 10 as in the prior art, part of the copper and part of the insulating dielectric material need to be removed to form the blind hole, and copper and insulating dielectric materials have different mechanical or optical properties. When using a laser or a drill to process the hole, it is necessary to adjust the processing parameters for the copper and insulating dielectric materials respectively, which increases the processing difficulty and makes it difficult to ensure the quality of the blind hole).

[0085] In this embodiment, steps S2 to S4 further include the following steps:

[0086] S20: See Figure 2 At least one third opening 23 is formed on the copper clad substrate 10. The third opening 23 is spaced apart from the first opening 20. The third opening 23 penetrates the first inner copper foil layer 121 and the substrate layer 11. The second inner copper foil layer 122 is exposed at the bottom of the third opening 23.

[0087] In this example, see Figure 2 and Figure 3 In step S20, the cross-section of the third opening 23 along the thickness direction O of the double-sided copper clad substrate 10 is roughly trapezoidal, and the third opening 23 includes a third end 24 and a fourth end 25 opposite to the third end 24. The third end 24 is formed on the first inner copper foil layer 121, and the cross-sectional diameter R1 of the third end 24 in the thickness direction O is greater than the cross-sectional diameter R2 of the fourth end 25 in the thickness direction O.

[0088] In this embodiment, the forward projection T of the third end portion 24 along the thickness direction O is roughly circular, the diameter R1 is 60 to 120 microns, the diameter R2 is 30 to 50 microns, the depth D3 of the first opening 20 is the same as the depth D4 of the third opening 23 (i.e., D3=D4=D1+D2), and the depth D3 is 8 to 250 microns, and the depth D3 or the depth D4 can be set according to needs.

[0089] S30: See Figure 4 The metallization layer is disposed on the side wall of the third opening 23 , and the metallization layer is electrically connected between the two inner copper foil layers 12 .

[0090] S40: See Figure 5 , electroplating is performed on the first inner copper foil layer 121 and the metallization layer to form a first electroplated copper layer 40, and the first electroplated copper layer 40 also fills the third opening 23 to form a third conductor 51. In the low-frequency transmission area of ​​the circuit or the low-density area of ​​the circuit, the third conductor 51 serves as an input / output terminal to connect the circuit substrate 70 and other electronic components.

[0091] In this embodiment, in step S40, the aspect ratio AR1 of the third conductive body 51 is D4 / R1. Specifically, Figure 3 As shown, if the depth D4 is 112 micrometers and the width R1 is 100 micrometers, the aspect ratio AR1 of the third via 51 is 112 / 100=1.12.

[0092] In this example, see Figure 6 , after step S4, the following steps are also included:

[0093] The first inner copper foil layer 121 and the first electroplated copper layer 40 corresponding to the first inner copper foil layer 121 are etched to form an inner circuit layer 13 , and a portion of the substrate layer 11 is exposed from the inner circuit layer 13 , thereby obtaining an intermediate body 71 .

[0094] The manufacturing method of the circuit substrate 70 provided by the present invention also has the following advantages:

[0095] (i) First, the first electroplated copper layer 40 and the first conductive body 50 are formed, and then the first conductive body 50 and the first electroplated copper layer 40 corresponding to the first conductive body 50 are divided to obtain a plurality of second conductive bodies 60. This process is convenient for processing, and the outer wall of the obtained second conductive body 60 is uniform and flat without residual piles, thereby improving the heat dissipation efficiency or the stability of signal transmission.

[0096] (ii) During the electroplating process, the first opening 20 with a larger opening can reduce the risk of voids in the first conductive body 50 (it can be understood that for blind holes with a high aspect ratio, if the deposition rate of copper is too fast during the electroplating process, voids can easily appear in the blind holes).

[0097] (iii) The production efficiency can be improved by forming the third conductive body 51 in the low-frequency signal transmission area / low-density area through the process of opening and electroplating (it can be understood that compared with the production of the third conductive body 51, the production of the second conductive body 60 requires one more step: that is, opening the second opening 52 on the first conductive body 50).

[0098] Please also see Figures 8 to 11 An embodiment of the present invention further provides a method for manufacturing a circuit board 100, comprising the steps of:

[0099] S1: Please see Figure 8 , a single-sided copper clad laminate 80 is provided, wherein the single-sided copper clad laminate 80 includes a dielectric layer 81 and an outer copper foil layer 82 disposed on one side of the dielectric layer 81 .

[0100] S2: Please refer to 9, press the single-sided copper clad board 80 and the intermediate body 71 together, with the dielectric layer 81 facing the inner circuit layer 13 and allowing part of the dielectric layer 81 to flow into the second opening 52.

[0101] S3: See Fig.10 A plurality of fourth openings 811 are formed on the single-sided copper clad laminate 80 . The fourth openings 811 penetrate the single-sided copper clad laminate 80 , and the second conductive body 60 is exposed at the bottom of the fourth openings 811 .

[0102] S4: See Fig.11 , electroplating is performed on the outer copper foil layer 82 to form a second electroplated copper layer 821 , and the second electroplated copper layer 821 is filled in the fourth opening 811 to form a fourth conductive body 85 . The fourth conductive body 85 is electrically connected to the second conductive body 60 .

[0103] In this embodiment, before step S4 , a step is further included: forming a seed layer (not shown) on the side wall of the fourth opening 811 , wherein the seed layer is electrically connected to the inner circuit layer 13 and the outer copper foil layer 82 .

[0104] In this embodiment, in steps S4 to S5 , the third conductive body 51 is exposed at the bottom of the fourth opening 811 , and the fourth conductive body 85 is also electrically connected to the third conductive body 51 .

[0105] S5: See Fig.12, etching the second electroplated copper layer 821 and the outer copper foil layer 82 to obtain a first outer circuit layer 101, and etching the second inner copper foil layer 122 to obtain a second outer circuit layer 102, thereby obtaining the circuit board 100.

[0106] See also Fig.12 The embodiment of the present invention further provides a circuit board 100, which includes a first outer circuit layer 101, a dielectric layer 81, an inner circuit layer 13, a substrate layer 11 and a second outer circuit layer 102 stacked in sequence.

[0107] A first opening 20 is provided in the first outer circuit layer 101 and the substrate layer 11, a first conductive body 50 is provided in the first opening 20, at least one second opening 52 is provided in the first conductive body 50, the second opening 52 is used to divide the first conductive body 50 into a plurality of second conductive bodies 60 arranged at intervals, and the second conductive bodies 60 are electrically connected to the second outer circuit layer 102 and the inner circuit layer 13.

[0108] A plurality of fourth conductive bodies 85 are further disposed between the first outer circuit layer 101 and the inner circuit layer 13 , and the fourth conductive bodies 85 correspond to and connect the second conductive bodies 60 .

[0109] The dielectric layer 81 is also filled in the gaps of the inner circuit layer 13 and the second opening 52 .

[0110] In addition, for those skilled in the art, various other corresponding changes and modifications can be made based on the technical concept of the present invention, and all these changes and modifications should fall within the scope of protection of the present invention.

Claims

1. A method for manufacturing a circuit substrate, characterized in that: Includes steps: A copper-clad substrate is provided, the copper-clad substrate comprising a substrate layer, a first inner copper foil layer disposed on one surface of the substrate layer, and a second inner copper foil layer disposed on the other surface of the substrate layer; At least one first opening is formed in the copper-clad substrate, wherein the first opening passes through the first inner copper foil layer and the substrate layer; Electroplating a first electroplated copper layer on the first inner copper foil layer, wherein the first electroplated copper layer is also filled in the first opening to form a first conductive body; At least one second opening is formed in the first conductive body and a portion of the first electroplated copper layer corresponding to the first conductive body, so as to divide the first conductive body and a portion of the first electroplated copper layer corresponding to the first conductive body into a plurality of second conductive bodies; and obtaining the circuit substrate; The end of the second conductive body away from the second inner copper foil layer is rectangular in the forward projection along the thickness direction of the circuit substrate, the length of the forward projection is 180 to 280 microns, the width of the forward projection is 15 to 275 microns, and the depth of the second conductive body is 8 to 250 microns; The cross-section of the first opening along the thickness direction of the copper-clad substrate is trapezoidal, and the first opening includes a first end and a second end opposite to the first end, the first end is formed on the first inner copper foil layer, and the cross-sectional length of the first end in the thickness direction is greater than the cross-sectional length of the second end in the thickness direction.

2. The manufacturing method according to claim 1, characterized in that Also includes the steps: At least one third opening is formed in the copper-clad substrate, the third opening is spaced apart from the first opening, and the third opening passes through the first inner copper foil layer and the substrate layer; Wherein, the first electroplated copper layer is also filled in the third opening to form a third conductive body.

3. The manufacturing method according to claim 1, characterized in that: Also includes the steps: The first inner copper foil layer and the electroplated copper layer on the first inner copper foil layer are etched to form an inner circuit layer, and a portion of the substrate layer is exposed from the inner circuit layer.

4. The manufacturing method according to claim 1, characterized in that: The copper-clad substrate further includes a length direction and a width direction perpendicular to each other along the extension surface, the aspect ratio of the second conductive body along the length direction is 0.03-1.40, and the aspect ratio of the second conductive body along the width direction is 0.03-16.

7.

5. The manufacturing method according to claim 1, characterized in that: The second opening is formed by laser or mechanical drilling.

6. A method for manufacturing a circuit board, characterized in that: Includes steps: A single-sided copper-clad laminate is provided, wherein the single-sided copper-clad laminate comprises a dielectric layer and an outer copper foil layer disposed on one side of the dielectric layer; Providing a circuit substrate manufactured by the manufacturing method according to any one of claims 1 to 5, etching the first inner copper foil layer and the first electroplated copper layer corresponding to the first inner copper foil layer to form an inner circuit layer, and partially exposing the base material layer from the inner circuit layer to obtain an intermediate; Pressing the single-sided copper-clad laminate and the intermediate body, with the dielectric layer facing the inner circuit layer and partially filling the second opening; A plurality of fourth openings are formed on the single-sided copper-clad laminate, wherein the fourth openings penetrate the single-sided copper-clad laminate, and the second conductive body is exposed at the bottom of the fourth openings; Performing electroplating on the outer copper foil layer to form a second electroplating layer, wherein the second electroplating layer is filled in the fourth opening to form a fourth conductive body, and the fourth conductive body is electrically connected to the second conductive body; etching the second electroplating layer and the outer copper foil layer to obtain a first outer circuit layer, and etching the second inner copper foil layer to obtain a second outer circuit layer, and Obtain the circuit board.

7. The manufacturing method according to claim 6, characterized in that: The method further includes the step of forming a seed layer on the side wall of the fourth opening, wherein the seed layer is electrically connected to the inner circuit layer and the outer circuit layer.

8. A circuit board, characterized in that: The invention comprises a first outer circuit layer, a dielectric layer, an inner circuit layer, a substrate layer and a second outer circuit layer which are stacked in sequence. A first opening is provided in the first outer circuit layer and the substrate layer, a first conductive body is provided in the first opening, at least one second opening is provided in the first conductive body, the second opening is used to divide the first conductive body into a plurality of second conductive bodies arranged at intervals, the second conductive bodies are electrically connected to the first outer circuit layer and the inner circuit layer, A plurality of fourth conductive bodies are further arranged between the first outer wiring layer and the inner wiring layer, the fourth conductive bodies are electrically connected to the second outer wiring layer and the inner wiring layer, and the fourth conductive bodies correspond to and are connected to the second conductive bodies, and the end of the second conductive body away from the second outer wiring layer is rectangular in the forward projection along the thickness direction of the substrate layer, the length of the forward projection is 180 to 280 microns, the width of the forward projection is 15 to 275 microns, and the depth of the second conductive body is 8 to 250 microns; The dielectric layer is also filled in the gap of the inner circuit layer and the second opening; The cross-section of the first opening along the thickness direction is trapezoidal. The first opening includes a first end and a second end opposite to the first end. The first end is formed on the inner circuit layer. The cross-sectional length of the first end in the thickness direction is greater than the cross-sectional length of the second end in the thickness direction.

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