Identification circuits, battery management systems, battery packs and electronic devices

Abstract

The embodiment of the present application provides an identification circuit, a battery management system, a battery pack and an electronic device. The identification circuit is configured to be connected to a load circuit and further includes: a voltage divider module and a signal generation module; the voltage divider module is configured to divide the voltage input to the voltage divider module; the signal generation module is connected to the voltage divider module, and the signal generation module is configured to receive the voltage output by the voltage divider module and generate an on / off signal for indicating whether the load circuit is turned on or off. This solution can make the circuit structure of the battery management simpler.

Description

Technical Field

[0001] This application relates to the field of electrical engineering technology, and in particular to an identification circuit, a battery management system, a battery pack, and an electronic device. Background Technology

[0002] A Battery Management System (BMS) monitors the status of batteries, thereby intelligently managing and maintaining each battery cell to prevent overcharging and over-discharging, and extend battery life. During operation, the BMS identifies the on / off state of the load circuit and manages the battery accordingly.

[0003] Currently, the battery management system is connected to an external load circuit. When the load circuit is turned on or off, it sends a corresponding electrical signal to the battery management system. The battery management system can then determine whether the load circuit is turned on or off based on the received electrical signal.

[0004] However, when multiple load circuits are included, each load circuit is connected to an identification circuit in the battery management system. The identification circuit detects the electrical signals of the connected load circuits. Since the battery management system includes a large number of identification circuits, the circuit structure of the battery management system is more complex. Summary of the Invention

[0005] In view of this, embodiments of this application provide an identification circuit, a battery management system, a battery pack, and an electronic device to at least partially solve the above-mentioned problems.

[0006] According to a first aspect of the present application, an identification circuit is provided, the identification circuit being configured to be connected to a load circuit, and further comprising: a voltage divider module and a signal generation module; the voltage divider module being configured to divide the voltage input to the voltage divider module; the signal generation module being connected to the voltage divider module, the signal generation module being configured to receive the voltage output by the voltage divider module and generate an on / off signal for indicating whether the load circuit is on or off.

[0007] In a first possible implementation, in conjunction with the first aspect above, the signal generation module includes N NMOS transistors connected in series, where N is a natural number greater than 2; the signal generation module generates an on / off signal to indicate whether the load circuit is on or off when the N NMOS transistors satisfy at least one of the following conditions: (i) the combination of voltage values ​​output from the sources of the N NMOS transistors is different; (ii) the combination of the on states of the N NMOS transistors is different.

[0008] In the second possible implementation, combined with the first possible implementation, the signal generation module further includes a first power supply and a first resistor. The drain of the first NMOS transistor among the N NMOS transistors is connected to the output terminal of the voltage divider module. The gate of the first NMOS transistor is connected to the first terminal of the first resistor. The second terminal of the first resistor is connected to the first power supply. The source of the i-th NMOS transistor among the N NMOS transistors is connected to the gate of the (i+1)-th NMOS transistor. The drain of the i-th NMOS transistor is connected to the drain of the (i+1)-th NMOS transistor, where i is a positive integer less than N.

[0009] In a third possible implementation, in conjunction with the first aspect described above, the voltage divider module is configured to be connected to at least two load circuits via a pin of an electrical connector.

[0010] In the fourth possible implementation, combined with the first possible implementation, when the combination of the source output voltage values ​​of the N NMOS transistors is different, the signal generation module generates an on / off signal to indicate whether the load circuit is on or off. The signal generation module is further configured to generate a signal to indicate that the load circuit is off in response to all N NMOS transistors being in the off state.

[0011] In the fifth possible implementation, combined with the first possible implementation, the source output voltage of at least one of the NMOS transistors is located in at least two non-overlapping value ranges, used to indicate the conduction of different load circuits.

[0012] In the sixth possible implementation, combined with the second possible implementation, the signal generation module further includes: N matching modules, each of the matching modules including a resistor or at least two resistors connected in series; the source of each of the N NMOS transistors is connected to the first terminal of one of the matching modules; the second terminals of the N matching modules are all used to connect to the negative terminal of the battery cell module.

[0013] According to a second aspect of the embodiments of this application, a battery management system is provided, including: an electrical connector, a control module, and an identification circuit provided by the first aspect or any possible implementation thereof, wherein the identification circuit is connected to the electrical connector, the electrical connector is configured to be connected to a load circuit, the control module is connected to the identification circuit, and the control module is configured to determine whether the load circuit is on or off based on an on / off signal generated by the identification circuit.

[0014] In a first possible implementation, in conjunction with the second aspect above, the control module is used to determine whether the load circuit is turned on or off based on the combination of the source voltage values ​​of the N NMOS transistors in the identification circuit, and / or based on the combination of the conduction states of the N NMOS transistors in the identification circuit.

[0015] In the second possible implementation, combined with the first possible implementation, the control module is connected to the source of each of the N NMOS transistors, and the control module is used to determine whether the load circuit is turned on or off based on the combination of the source output voltage values ​​of the N NMOS transistors.

[0016] According to a third aspect of the embodiments of this application, a battery pack is provided, including: a cell module and a battery management system provided by the second aspect or any possible implementation thereof, wherein the cell module is connected to the battery management system and supplies power to the battery management system.

[0017] According to a fourth aspect of the present application, an electronic device is provided, comprising: a load circuit and a battery pack provided in the third aspect above; the load circuit is connected to the battery pack, and the battery pack is used to supply power to the load circuit.

[0018] In a first possible implementation, in conjunction with the fourth aspect above, the load circuit comprises at least two, each with a different resistance value.

[0019] In a second possible implementation, in conjunction with the fourth aspect above, the positive terminal of the battery cell module is used to connect to the load circuit, and the load circuit is connected to the voltage divider module through a pin of an electrical connector.

[0020] According to the load circuit on / off identification scheme provided in this application embodiment, the identification circuit is configured to be connected to the load circuit. The identification circuit includes a voltage divider module and a signal generation module. The voltage divider module is configured to divide the voltage input to the voltage divider module. The signal generation module is connected to the voltage divider module and is configured to receive the voltage output by the voltage divider module and generate an on / off signal to indicate whether the load circuit is on or off. When different load circuits are on, the voltage divider module will input different voltages to the signal generation module. Thus, the signal generation module can generate an on / off signal to indicate whether the load circuit is on or off based on the voltage output by the voltage divider module. Therefore, the on / off status of the load circuit can be determined based on the on / off signal. Thus, the on / off status of multiple load circuits can be identified through a single identification circuit. This reduces the number of identification circuits in the battery management system, thereby simplifying the circuit structure of the battery management system. Attached Figure Description

[0021] To more clearly illustrate the technical solutions in the embodiments of this application or the prior art, the drawings used in the description of the embodiments or the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the embodiments of this application. For those skilled in the art, other drawings can be obtained based on these drawings.

[0022] Figure 1 This is a schematic block diagram of a load circuit continuity identification system according to an embodiment of this application;

[0023] Figure 2 This is a schematic block diagram of an identification circuit according to an embodiment of this application;

[0024] Figure 3 This is a schematic diagram of an identification circuit according to an embodiment of this application;

[0025] Figure 4 This is a schematic diagram of an identification circuit according to another embodiment of this application;

[0026] Figure 5 This is a schematic block diagram of a battery management system according to an embodiment of this application;

[0027] Figure 6 This is a schematic block diagram of a battery pack according to one embodiment of this application;

[0028] Figure 7 This is a schematic block diagram of an electronic device according to an embodiment of this application. Detailed Implementation

[0029] To enable those skilled in the art to better understand the technical solutions in the embodiments of this application, the technical solutions in the embodiments of this application will be clearly and thoroughly described below with reference to the accompanying drawings. Obviously, the described embodiments are only some embodiments of this application, and not all embodiments. Based on the embodiments of this application, all other embodiments obtained by those skilled in the art should fall within the protection scope of the embodiments of this application.

[0030] The specific implementation of the embodiments of this application will be further described below with reference to the accompanying drawings.

[0031] With the development of battery technology, batteries such as lithium iron phosphate, lithium manganese oxide, and lead-acid batteries can be used as energy storage batteries. Energy storage batteries have been widely used in various scenarios and can serve as power batteries in electrical equipment such as power tools, electric bicycles, electric motorcycles, and energy storage systems.

[0032] Energy storage batteries can power electrical devices in the form of battery packs. Battery management systems (BMS) can monitor battery packs in different application scenarios, manage their charging and discharging, and improve their efficiency and lifespan. Specifically, BMS can perform control and management functions such as battery status monitoring, battery status analysis, battery safety protection, and battery information management.

[0033] In one application scenario of a battery management system, a cell module is connected to multiple load circuits to supply power to each load circuit. Each load circuit is connected to the battery management system, which detects the on / off state of each load circuit and then controls and manages the cell module based on the on / off state of each load circuit. Each load circuit includes a switch for controlling the on / off state of the load circuit; when the switch is closed, the load circuit is on; when the switch is open, the load circuit is off.

[0034] Figure 1 A schematic block diagram of a load circuit continuity identification system is shown. Figure 1 As shown, the input terminals of multiple load circuits 110 are respectively connected to the output terminals of the cell module 120, and the output terminal of each load circuit 110 is connected to the input terminal of the battery management system 130. The output terminal of the battery management system 130 is connected to the input terminal of the cell module 120. The battery management system 130 includes an electrical connector 131 and multiple identification circuits 132. The output terminal of each load circuit 110 is connected to one pin of the electrical connector 131. Different load circuits 110 are connected to different pins. Each pin connected to a load circuit 110 is connected to an identification circuit 132. Different identification circuits 132 are connected to different pins. Each load circuit 110 is simplified as a switch S and an equivalent resistance R connected in series. When the switch S is closed, the load circuit 110 is turned on. The resistance value of the equivalent resistance R is equal to the resistance value between the input terminal and the output terminal of the load circuit 110 when it is turned on.

[0035] Since each load circuit 110 is connected to an identification circuit 132 through a pin of the electrical connector 131, when the switch S in a load circuit 110 is closed to turn on the load circuit 110, the identification circuit 132 connected to the load circuit 110 will receive an electrical signal. Based on the electrical signal received by the identification circuit 132, it can be determined that the load circuit 110 connected to the identification circuit 132 has been turned on, that is, the switch S in the load circuit 110 connected to the identification circuit 132 is in the closed state.

[0036] Due to limitations in printed circuit board (PCB) size and the number of pins in the control chip, the pins of the electrical connector 131 in the battery management system 130 are a valuable resource. Currently, each load circuit 110 needs to connect to the battery management system 130 through one pin of the electrical connector 131. When there are multiple load circuits 110, multiple pins in the electrical connector 131 are required. Furthermore, each identification circuit 132 is connected to one load circuit 110. When there are multiple load circuits 110, the battery management system 130 includes multiple identification circuits 132, resulting in a complex circuit structure and consequently higher cost. Therefore, there is an urgent need for a battery management system solution that can identify the on / off state of load circuits with a simpler circuit structure and reduce the number of pins required in the connector.

[0037] Identification circuit

[0038] Figure 2 This is a schematic block diagram of an identification circuit according to one embodiment of this application. Figure 2 As shown, the battery management system 210 includes an electrical connector 211 for connecting a load circuit 220. When the load circuit 220 is turned on by at least one switch S, the output voltage of the load circuit 220 is input to the battery management system 210. Different load circuits 220 have different resistance values ​​when turned on. The identification circuit 212 in the battery management system 210 includes a voltage divider module 2121 and a signal generation module 2122.

[0039] Voltage divider module 2121 is connected to load circuit 220 via electrical connector 211. Voltage divider module 2121 is configured to divide the voltage input to voltage divider module 2121.

[0040] The signal generation module 2122 is connected to the voltage divider module 2121. The signal generation module 2122 is configured to receive the voltage output by the voltage divider module 2121 and generate an on / off signal to indicate whether the load circuit 220 is on or off.

[0041] The output terminals of the cell module 230 are connected to the input terminals of each load circuit 220, and the output terminals of each load circuit 220 are connected to the electrical connector 211. When the switch in a load circuit 220 is closed, the load circuit 220 is turned on. The load circuit 220, the cell module 230, and the battery management system 210 form a loop. The cell module 230 supplies power to the load circuit 220, and the load circuit 220 outputs voltage to the battery management system 210. Since different load circuits 220 can have different resistance values ​​when turned on, different load circuits 220 will input different voltages to the battery management system 210 after being turned on. Therefore, the battery management system 210 can determine which load circuit 220 is turned on based on the voltage input from the load circuit 220, that is, determine whether each load circuit 220 is turned on or off.

[0042] The load circuit 220 includes a switch S and various components. In this embodiment, the load circuit 220 can have a voltage divider function. Therefore, the load circuit 220 can be simplified to a switch S and a resistor R connected in series. The resistance value of the resistor R in a load circuit 220 is equal to the resistance value between the input terminal and the output terminal of the load circuit 220 when the load circuit 220 is turned on.

[0043] The voltage divider module 2121 and the conducting load circuit 220 divide the output voltage of the cell module 230. The voltage divider module 2121 can be a single resistor, multiple resistors connected in series, or multiple resistors connected in parallel. The resistance value of the voltage divider module 2121 is determined based on factors such as the output voltage of the cell module 230 and the equivalent resistance of each load circuit 220, to ensure that when different load circuits are conducting, the combination of voltage values ​​output from the source of each NMOS transistor is different, or the combination of conduction states of each NMOS transistor is different.

[0044] In this embodiment, the identification circuit is configured to be connected to the load circuit. The identification circuit includes a voltage divider module and a signal generation module. The voltage divider module is configured to divide the voltage input to it. The signal generation module is connected to the voltage divider module and is configured to receive the voltage output from the voltage divider module and generate an on / off signal to indicate whether the load circuit is on or off. When different load circuits are on, the voltage divider module will input different voltages to the signal generation module. Thus, the signal generation module can generate an on / off signal to indicate whether the load circuit is on or off based on the voltage output from the voltage divider module. Therefore, the on / off status of the load circuit can be determined based on the on / off signal. Thus, the on / off status of multiple load circuits can be identified through a single identification circuit. This reduces the number of identification circuits in the battery management system, thereby simplifying the circuit structure of the battery management system.

[0045] In one possible implementation, the signal generation module includes N NMOS transistors connected in series, where N is a natural number greater than 2. The signal generation module generates an on / off signal to indicate whether the load circuit is on or off when at least one of the following conditions is met:

[0046] (i) The combination of source output voltage values ​​of N NMOS transistors is different;

[0047] (ii) The combination of the conduction states of the N NMOS transistors is different.

[0048] When different load circuits are turned on, the combination of source output voltage values ​​of the N NMOS transistors is different. This means that when any two load circuits are turned on, at least one of the N NMOS transistors will have a different source output voltage value when the two load circuits are turned on respectively. When different load circuits are turned on, the combination of conduction states of the N NMOS transistors is different. This means that when any two load circuits are turned on, at least one of the N NMOS transistors will be in a different conduction state when the two load circuits are turned on respectively. The conduction state of the NMOS transistor includes operating in the saturation region, the variable resistance region, or the cutoff region.

[0049] The signal generation module can use the combination of the source output voltage values ​​of N NMOS transistors as the on / off signal, or the combination of the conduction states of N NMOS transistors as the on / off signal, or it can simultaneously use the combination of the source output voltage values ​​of N NMOS transistors and the combination of the conduction states of N NMOS transistors as the on / off signal.

[0050] In this embodiment, the signal generation module adjusts the voltage output of the voltage divider module using N NMOS transistors. When different load circuits are turned on, the combination of the source voltage values ​​of the N NMOS transistors is different, or the combination of the conduction states of the N NMOS transistors is different. Thus, the combination of the source voltage values ​​of the N NMOS transistors or the combination of the conduction states of the N NMOS transistors can be used as on / off signals. Therefore, the on or off state of each load circuit can be determined based on the source voltage values ​​of the N NMOS transistors or the conduction states of the N NMOS transistors. Thus, the on / off state of multiple load circuits can be identified through an identification circuit.

[0051] Figure 3 This is a schematic diagram of an identification circuit provided in another embodiment of this application. For example... Figure 3As shown, the signal generation module 2122 includes a first power supply E1, a first resistor R1, and N NMOS transistors connected in series, where N is a natural number greater than 2. For ease of description, a voltage divider module comprising one resistor, multiple resistors connected in series, or multiple resistors connected in parallel is equivalent to a voltage divider resistor R2, and a conducting load circuit is equivalent to a resistor R3. Different load circuits correspond to different resistance values ​​for resistor R3. Figure 3 The unconducted load circuit is omitted. In the N NMOS transistors, the drain of the first NMOS transistor M1 is connected to the output terminal of the voltage divider resistor R2, the gate of the first NMOS transistor M1 is connected to the first terminal of the first resistor R1, and the second terminal of the first resistor R1 is connected to the first power supply E1. The i-th NMOS transistor M... i The source of the (i+1)th NMOS transistor M i+1 The gates of the iNMOS transistors are connected, and the iNMOS transistor M is connected to the gate. i The drain of the (i+1)th NMOS transistor M i+1 The drains of the N NMOS transistors are connected together, where i is a positive integer less than N. When different load circuits are turned on, the combination of the source voltage values ​​of the N NMOS transistors or the combination of the on states of the N NMOS transistors are different, thus the combination of the source voltage values ​​of the N NMOS transistors or the combination of the on states of the N NMOS transistors is used as the on / off signal.

[0052] In this embodiment, the signal generation module 2122 includes N NMOS transistors. The gate of the first NMOS transistor M1 is connected to the first power supply E1 through the first resistor R1. The voltage output by the voltage divider resistor R2 is input to the drain of the first NMOS transistor M1. The i-th NMOS transistor M... i The source of the (i+1)th NMOS transistor M i+1 The gates of the iNMOS transistors are connected, and the iNMOS transistor M is connected to the gate. i The drain of the (i+1)th NMOS transistor M i+1 The drains of the transistors are connected. Since each NMOS transistor can be in the saturation region, variable resistance region, or cutoff region, it is ensured that when different load circuits are turned on and the voltage divider resistor R2 outputs different voltages, the combination of the source voltage values ​​of each NMOS transistor or the combination of the conduction states of each NMOS transistor will be different. Therefore, the conducted load circuit can be determined based on the source voltage value or conduction state of each NMOS transistor, ensuring the accuracy of identifying the on / off state of the load circuit.

[0053] Because the output voltage of the battery module E2 gradually decreases during operation, the voltage output of the voltage divider resistor R2 is adjusted by N series-coupled NMOS transistors. This ensures that when the battery module E2 outputs different voltages, the source voltage values ​​of each NMOS transistor after different load circuits are turned on still have different combinations, or the conduction states of each NMOS transistor remain in their original combinations. If the signal generation module 2122 is not used, and the voltage across the voltage divider resistor R2 is used directly to determine the conducting load circuit, then when the output voltage of the battery module E2 changes, different load circuits may be turned on while the voltage across the voltage divider resistor R2 is roughly the same, making it impossible to accurately identify which load circuit is in the conducting state. Therefore, by adjusting the voltage output of the voltage divider resistor R2 by N series-coupled NMOS transistors, the conduction or disconnection of each load circuit is determined based on the combination of the source voltage values ​​or the combination of the conduction states of each NMOS transistor, ensuring the accuracy of load circuit on / off identification.

[0054] In one possible implementation, such as Figure 3 As shown, when different load circuits are turned on, the combination of the conduction states of the N series-coupled NMOS transistors is different.

[0055] The voltage difference between the gate (G) and source (S) of an NMOS transistor is V. gs The voltage difference between the drain (D) and source (S) of the NMOS transistor is V. ds The turn-on voltage of the NMOS transistor is V. th When V gs >V th And V ds >V gs -V th At that time, the NMOS transistor is in the saturation region, when V gs >V th And V ds <V gs -V th At that time, the NMOS transistor is in the variable resistance region, when V gs <V th When the NMOS transistor is in its off-region, it is in the cutoff region. The source voltage of the NMOS transistor differs depending on its on-state; that is, the source voltage differs when the NMOS transistor is in the saturation region, variable resistance region, and cutoff region. When different load circuits are conducting, the combination of the on-states of the NMOS transistors is different, and the source voltage of the NMOS transistors differs depending on its on-state. Therefore, the conducting load circuit can be accurately determined based on the combination of the source voltages or the combination of the on-states of the NMOS transistors.

[0056] Furthermore, for any given load circuit, when the load circuit is turned on, the combination of conduction states of each NMOS transistor remains unchanged as the output voltage of the battery module varies within a predetermined range. For example, if the signal generation module includes two NMOS transistors, when the output voltage of the battery module is Vmin, both NMOS transistors are in the saturation region after the first load circuit is turned on. Similarly, when the output voltage of the battery module is Vmax, both NMOS transistors will still be in the saturation region after the first load circuit is turned on. The fact that the combination of conduction states of each NMOS transistor remains unchanged after the same load circuit is turned on, even when the output voltage of the battery module varies within a predetermined range, ensures that the identification of the on / off state of the load circuit is not affected by the output voltage of the battery module, thereby improving the timeliness of load circuit on / off state identification.

[0057] In one possible implementation, such as Figure 2 and Figure 3 As shown, the voltage divider module 2121 is configured to be connected to each load circuit 220 via a pin of the electrical connector 211.

[0058] Since different load circuits 220 have different resistance values ​​when they are turned on, the voltage divider module 2121 supplies different voltage values ​​to the signal generation module 2122 when different load circuits 220 are turned on. This results in different combinations of source voltage values ​​of the N NMOS transistors or different combinations of conduction states of the N NMOS transistors. Based on the combination of source voltage values ​​of the N NMOS transistors or the combination of conduction states of the N NMOS transistors, the turned-on load circuit 220 can be determined. Therefore, the voltage divider module 2121 can be connected to each load circuit 220 through one pin of the electrical connector 211, thereby reducing the number of pins used in the electrical connector 211.

[0059] In one possible implementation, such as Figure 3 As shown, when the identification circuit includes N series-coupled NMOS transistors, the number of load circuits is less than or equal to 3. N -1.

[0060] To ensure accurate identification of the on / off state of each load circuit, the combination of conduction states of the N series-coupled NMOS transistors differs depending on the load circuit being on. There are 3 possible combinations of conduction states for the N series-coupled NMOS transistors. N There are 3 load circuits, one of which corresponds to the case where all load circuits are disconnected. For example, N series-coupled NMOS transistors all being in the cutoff region corresponds to the case where all load circuits are disconnected. Therefore, the number of load circuits is less than or equal to 3. N-1 ensures that different load circuits can correspond to different combinations of the conduction states of each NMOS transistor, resulting in different combinations of source voltage values ​​for each NMOS transistor when different load circuits are turned on. This guarantees that the conducting load circuit can be accurately determined based on the source voltage values ​​of each NMOS transistor, thereby ensuring the accuracy of identifying the on / off state of the load circuit.

[0061] In one possible implementation, all N NMOS transistors are in the off state when all load circuits are disconnected.

[0062] When all load circuits are in the open state, the electronic device is usually in the non-conducting state. At this time, the N NMOS transistors included in the identification circuit are all in the off state, which makes the identification circuit have low power consumption. This reduces the power consumption of the electronic device when it is in the non-conducting state and extends the standby time of the electronic device.

[0063] In one possible implementation, when the NMOS transistor is in the variable resistance region, the channel of the NMOS transistor is equivalent to a conductor with a fixed resistance value, and the voltage difference V between the drain D and source S of the NMOS transistor is... ds The voltage difference V between the gate G and the source S gs The linear variation allows NMOS transistors in the variable resistance region to output different voltage values ​​from their sources. Therefore, when different load circuits are turned on, the combination of the conduction states of the N NMOS transistors can be the same or different. When the combination of the conduction states of the N NMOS transistors is the same, the range of the source output voltage value of the NMOS transistor in the variable resistance region when different load circuits are turned on can be used to determine the conducting load circuit based on the range of the source output voltage of each NMOS transistor.

[0064] For example, when the first load circuit or the second load circuit is turned on, the first NMOS transistor and the second NMOS transistor included in the identification circuit are in the saturation region and the variable resistance region, respectively. The source voltage of the first NMOS transistor in the saturation region is a fixed value. However, when the first load circuit is turned on, the source voltage of the second NMOS transistor in the variable resistance region is within a first value range. When the second load circuit is turned on, the source voltage of the second NMOS transistor in the variable resistance region is within a second value range, and the first and second value ranges do not overlap. Therefore, based on the determination of the conduction state of the first and second NMOS transistors, the conducting load circuit can be further determined according to the value range of the source voltage of the first and second NMOS transistors. It is understood that this example is only used for illustrative description and understanding of the embodiments of this application, and is not intended to limit the embodiments of this application.

[0065] In this embodiment, when different load circuits are turned on, the source output voltage of at least one NMOS transistor lies within at least two non-overlapping value ranges. This allows for combinations of NMOS transistors being in the same conduction state when different load circuits are turned on. Furthermore, by determining that the source output voltage of each NMOS transistor lies within two non-overlapping value ranges when different load circuits are turned on, the conducting load circuit can be further determined based on the value range of the source output voltage of each NMOS transistor, in addition to judging the conduction state of each NMOS transistor. Since the combination of conduction states of each NMOS transistor is the same, the conducting load circuit can be determined based on the value range of the source output voltage of the NMOS transistor in the variable resistance region. Therefore, the number of load circuits can be greater than 3. N -1, thus enabling the identification circuit, which includes fewer NMOS transistors, to identify the conduction or disconnection of more load circuits, thereby reducing the cost of the battery management system.

[0066] In one possible implementation, the signal generation module further includes N matching modules, each including a resistor or at least two resistors connected in series. The source of each NMOS transistor is connected to the first terminal of a matching module, and the sources of different NMOS transistors are connected to different matching modules. The second terminal of each matching module is used to connect to the negative terminal of the battery cell module. The positive terminal of the battery cell module is connected to the first terminal of each load circuit, and the second terminal of each load circuit is connected to an electrical connector. Figure 3 As shown, in order to facilitate the description and demonstration of the internal structure of the signal generation module 2122, the matching module is simplified to a matching resistor R4. The matching resistor R4 connected to the source of different NMOS transistors has the same or different resistance values.

[0067] The source of each NMOS transistor is connected to the first terminal of a matching resistor R4, and the second terminal of the matching resistor R4 is connected to the negative terminal of the battery module E2. When an NMOS transistor is in the saturation region or the variable resistance region, the current output from the source of that NMOS transistor returns to the negative terminal of the battery module E2 through the connected matching resistor R4, forming a complete loop. The switching conditions of the conduction state of each NMOS transistor can be adjusted by the matching resistor R4, so that each NMOS transistor can operate according to a predetermined combination of conduction states when different load circuits are turned on. This ensures that the conduction or disconnection of each load circuit can be accurately identified based on the voltage value output from the source of each NMOS transistor.

[0068] It should be noted that, in Figure 3In the identification circuit shown, the N series-coupled NMOS transistors can be of the same type or different types. Alternatively, the voltage regulation circuit can be implemented using multiple PMOS transistors, or a combination of NMOS and PMOS transistors.

[0069] The following describes in detail the identification circuit provided in the embodiments of this application, taking the signal generation module, which includes two NMOS transistors, as an example to identify the on / off state of three load circuits.

[0070] Figure 4 This is a schematic diagram of an identification circuit provided in another embodiment of this application. For example... Figure 4 As shown, the signal generation module 2122 includes a first power supply E1, a first resistor R1, an NMOS transistor M1, an NMOS transistor M2, a first matching resistor R41, and a second matching resistor R42. The voltage divider module includes a voltage divider resistor R2, which converts the conducting load circuit into an equivalent resistor R3.

[0071] The positive terminal of battery module E2 is connected to the input terminal of resistor R3. The output terminal of resistor R3 is connected to the input terminal of voltage divider resistor R2 via a pin of an electrical connector. The output terminal of voltage divider resistor R2 is connected to the drain of NMOS transistor M1. The source of NMOS transistor M1 is connected to the input terminal of first matching resistor R41. The output terminal of first matching resistor R41 is connected to the negative terminal of battery module E2. The gate of NMOS transistor M2 is connected to the source of NMOS transistor M1. The drain of NMOS transistor M2 is connected to the drain of NMOS transistor M1. The source of NMOS transistor M2 is connected to the input terminal of second matching resistor R42. The output terminal of second matching resistor R42 is connected to the negative terminal of battery module E2. The negative terminal of first power supply E1 is grounded. The positive terminal of first power supply E1 is connected to the input terminal of first resistor R1. The output terminal of first resistor R1 is connected to the gate of NMOS transistor M1.

[0072] In one specific embodiment of this application, the resistance of resistor R3 is 10KΩ when load circuit 1 is on, 200KΩ when load circuit 2 is on, and 2MΩ when load circuit 3 is on. The resistance of voltage divider resistor R2 is 120KΩ. The output voltage range of battery module E2 is 18V-25.2V. The output voltage of the first power supply E1 is 3.3V, and the resistance of the first resistor R1 is 100KΩ. The turn-on voltage V of NMOS transistors M1 and M2 is... th Both are 1.3V. The first matching resistor R41 has a resistance of 51KΩ, and the second matching resistor R42 has a resistance of 15KΩ.

[0073] (1) When load circuit 1 is on and load circuits 2 and 3 are off.

[0074] When the output voltage of the battery module E2 is 18V, the voltage difference V between the gate and source of the NMOS transistor M1 is... gs =1.4V, the voltage difference V between the drain and source of NMOS transistor M1 ds =5V, satisfying V gs >V th And V ds >V gs -V th Therefore, NMOS transistor M1 is in the saturation region, and the source output voltage of NMOS transistor M1 is ADC1 = 2V. The voltage across NMOS transistor M2 is V. gs =1.4V, V ds =6.4V, which satisfies V gs >V th And V ds >V gs -V th Therefore, NMOS transistor M2 is in the saturation region, and the source output voltage of NMOS transistor M2 is ADC2 = 0.68V.

[0075] When the output voltage of the battery module E2 is 25.2V, the voltage across the NMOS transistor M1 is V. gs =1.4V, V ds =12V, satisfying V gs >V th And V ds >V gs -V th Therefore, NMOS transistor M1 is in the saturation region, and the source output voltage of NMOS transistor M1 is ADC1 = 2V. The voltage across NMOS transistor M2 is V. gs =1.4V, V ds =13.4V, which satisfies V gs >V th And V ds >V gs -V th Therefore, NMOS transistor M2 is in the saturation region, and the source output voltage of NMOS transistor M2 is ADC2 = 0.68V.

[0076] (2) When load circuit 2 is on and load circuit 1 and load circuit 3 are off.

[0077] When the output voltage of the battery module E2 is 18V, the voltage across the NMOS transistor M1 is V. gs =1.7V, V ds =0V, satisfying V gs >V th And V ds <V gs -V thTherefore, NMOS transistor M1 is in the variable resistance region, and the source output voltage of NMOS transistor M1 is ADC1 = 1.6V. The voltage across NMOS transistor M2 is V. gs =1.4V, V ds =1.3V, which satisfies V gs >V th And V ds >V gs -V th Therefore, NMOS transistor M2 is in the saturation region, and the source output voltage of NMOS transistor M2 is ADC2 = 0.3V.

[0078] When the output voltage of the battery module E2 is 25.2V, the voltage across the NMOS transistor M1 is V. gs =1.45V, V ds =0V, satisfying V gs >V th And V ds <V gs -V th Therefore, NMOS transistor M1 is in the variable resistance region, and the source output voltage of NMOS transistor M1 is ADC1 = 1.85V. The voltage across NMOS transistor M2 is V. gs =1.4V, V ds =1.3V, which satisfies V gs >V th And V ds >V gs -V th Therefore, NMOS transistor M2 is in the saturation region, and the source output voltage of NMOS transistor M2 is ADC2 = 0.55V.

[0079] (3) When load circuit 3 is on and load circuit 1 and load circuit 2 are off.

[0080] When the output voltage of the battery module E2 is 18V, the voltage across the NMOS transistor M1 is V. gs =2.85V, V ds =0V, satisfying V gs >V th And V ds <V gs -V th Therefore, NMOS transistor M1 is in the variable resistance region, and the source output voltage of NMOS transistor M1 is ADC1 = 0.43V. The voltage across NMOS transistor M2 is V. gs =0.45V, V ds =0.45V, which satisfies V gs <V th Therefore, NMOS transistor M2 is in the cutoff region, and the source output voltage of NMOS transistor M2 is ADC2 = 0V.

[0081] When the output voltage of the battery module E2 is 25.2V, the voltage across the NMOS transistor M1 is V. gs =2.7V, V ds =0V, satisfying V gs >V th And V ds <V gs -V th Therefore, NMOS transistor M1 is in the variable resistance region, and the source output voltage of NMOS transistor M1 is ADC1 = 0.6V. The voltage across NMOS transistor M2 is V. gs =0.6V, V ds =0.6V, which satisfies V gs <V th Therefore, NMOS transistor M2 is in the cutoff region, and the source output voltage of NMOS transistor M2 is ADC2 = 0V.

[0082] As can be seen from the above data, when the output voltage of the battery module E2 fluctuates between 18V and 25.2V, both NMOS transistors M1 and M2 are in the saturation region when load circuit 1 is turned on; when load circuit 2 is turned on, NMOS transistor M1 is in the variable resistance region and both NMOS transistors M2 are in the saturation region; when load circuit 3 is turned on, NMOS transistor M1 is in the variable resistance region and both NMOS transistors M2 are in the cutoff region. That is, the combination of the conduction states of each NMOS transistor is different when different load circuits are turned on. Fluctuations in the battery module within a predetermined range do not affect the conduction state of each NMOS transistor.

[0083] Since the output voltage range of the battery cell module E2 is 18V-25.2V, considering the full voltage range of the battery cell module E2, the criteria for identifying the conduction of the three load circuits are as follows:

[0084] The criteria for identifying when load circuit 1 is conducting are: ADC1 = 2V and ADC2 = 0.68V.

[0085] The criteria for identifying when load circuit 2 is turned on are: 1.6V≤ADC1≤1.85V and 0.3V≤ADC2≤0.55V.

[0086] The criteria for identifying when load circuit 3 is conducting are: 0.43V≤ADC1≤0.6V and ADC2=0V.

[0087] As can be seen from the identification criteria for the conduction of the three load circuits mentioned above, the combination of source output voltage values ​​of each NMOS transistor is different when different load circuits are turned on. Moreover, when the same NMOS transistor is turned on in two different load circuits, the source output voltage values ​​fall within two non-overlapping value ranges.

[0088] It is understandable that, in the above specific embodiment, the voltage difference V between the gate and source of the NMOS transistor is... gsThe voltage difference V between the drain and source of the NMOS transistor ds The source output voltage values ​​of NMOS transistors, ADC1 and ADC2, can be obtained through simulation.

[0089] Battery Management System

[0090] Figure 5 This is a schematic block diagram of a battery management system according to an embodiment of this application. Figure 5 As shown, the battery management system 500 includes an electrical connector 510, a control module 520, and an identification circuit 530 as described in any of the above embodiments. The identification circuit 530 is connected to the load circuit via the electrical connector 510. When the load circuit is turned on by at least one switch, the output voltage of the load circuit is input to the identification circuit 530. Different load circuits have different resistance values ​​when turned on. The control module 520 is connected to the identification circuit 530 and is used to determine whether the load circuit is on or off based on the on / off signal generated by the identification circuit 530.

[0091] In this embodiment, after the identification circuit 530 generates an on / off signal to indicate whether the load circuit is on or off, it inputs the generated on / off signal to the control module 520. The control module 520 determines whether the load circuit is on or off based on the received on / off signal. The control module 520 can be a control chip, microcontroller, or other device with logic judgment function in the battery management system 500.

[0092] In one possible implementation, when the circuit structure of the identification circuit 530 is as follows: Figure 3 As shown, the control module 520 acquires the combination of the source output voltage values ​​of the N NMOS transistors in the identification circuit 530 and / or the combination of the conduction states of the N NMOS transistors. Based on the combination of the source output voltage values ​​of each NMOS transistor and / or the combination of the conduction states of each NMOS transistor, it determines whether each load circuit is on or off. In one specific embodiment of this application, the range of the source output voltage values ​​of each NMOS transistor when each load circuit is on is predetermined. After acquiring the source output voltage values ​​of each NMOS transistor, the acquired voltage values ​​are compared with the above-mentioned range, which can quickly determine the on-state load circuit and ensure the efficiency of on / off identification of the load circuit.

[0093] In another possible implementation, when the circuit structure of the identification circuit 530 is as follows: Figure 3As shown, the control module 520 acquires the combination of the source output voltage values ​​of the N NMOS transistors in the identification circuit 530 and / or the combination of the conduction states of the N NMOS transistors, and acquires the output voltage of the battery cell module. Based on the output voltage of the battery cell module, it acquires the standard voltage value of the source output of each NMOS transistor when each load circuit is turned on. Then, based on the source output voltage value of each NMOS transistor and the standard voltage value of the source output of each NMOS transistor, and / or the combination of the conduction states of the N series-coupled NMOS transistors, it determines whether each load circuit is turned on or off.

[0094] After acquiring the voltage value output by the battery cell module, the control module 520 inputs the output power of the battery cell module into a pre-built function or queries a pre-created corresponding table to obtain the standard voltage values ​​output by the source of each NMOS transistor when different load circuits are turned on when the battery cell module outputs that voltage value. Then, the control module 520 compares the voltage values ​​output by the source of each NMOS transistor with the standard voltage values ​​to determine a set of standard voltage values ​​that match the voltage values ​​output by the source of each NMOS transistor. The load circuits corresponding to this set of standard voltage values ​​are the turned-on load circuits. Matching the voltage values ​​output by the source of the NMOS transistor with the standard voltage values ​​means that the voltage values ​​output by the source are the same as the standard voltage values ​​or the difference between them is less than a preset deviation threshold.

[0095] Based on the output voltage of the battery cell module and the source voltage of each NMOS transistor, the conducting load circuit is determined, and then the on / off state of each load circuit is determined. By incorporating the output voltage of the battery cell module as a reference data, the on / off state of the load circuit can be identified more accurately.

[0096] In one possible implementation, the control module is connected to the source of each NMOS transistor. The control module determines the conducting load circuit based on the output voltage value of the source of each NMOS transistor or the conduction state of each NMOS transistor; that is, the control module determines whether each load circuit is turned on or off based on the on / off signal. The control module can be a processing chip, microcontroller, or other device with logic processing capabilities included in the battery management system.

[0097] Because the combinations of source voltage values ​​or conduction states of each NMOS transistor differ when different load circuits are turned on, the sources of each NMOS transistor are connected to the control module. This allows the control module to obtain the source voltage values ​​or determine the conduction states of each NMOS transistor. Based on these values, the control module determines the on / off state of each load circuit. By using the control module in the battery management system to determine the on / off state of each load circuit based on the source voltage values ​​or conduction states of each NMOS transistor, the battery management system has a simpler circuit structure, thus enabling it to have a lower cost.

[0098] It should be understood that the switches included in each load circuit are pre-stored in the memory space that the control module can read. When the control module determines that a load circuit is turned on based on the source voltage value of each NMOS transistor or the conduction state of each NMOS transistor, it determines that the other load circuits are turned off. Then, based on the switch information included in each load circuit stored in the memory space, it can determine that the switches in the turned load circuit are in the closed state, and the switches in the turned load circuit are in the open state.

[0099] In one possible implementation, such as Figure 3 As shown, the first power supply E1 can be the voltage output port on the control module. The control module in the battery management system is coupled to the cell module E2, which supplies power to the control module. The voltage output port on the control module is connected to the first end of the first resistor R1. The voltage output port on the control module provides the drive voltage to the gate of the first NMOS transistor M1 through the first resistor R1. There is no need to set a separate first power supply in the identification circuit, which ensures that the identification circuit has a simpler circuit structure.

[0100] battery pack

[0101] Figure 6 This is a schematic block diagram of a battery pack according to one embodiment of this application. Figure 6 As shown, the battery pack 600 includes a cell module 610 and a battery management system 620 as described in any of the above embodiments. The cell module 610 is connected to the battery management system 620 and supplies power to the battery management system 620.

[0102] Electronic devices

[0103] Figure 7 This is a schematic block diagram of an electronic device according to an embodiment of this application. Figure 7As shown, the electronic device 700 includes a load circuit 710 and a battery pack 720 as described in any of the above embodiments. The load circuit 710 is connected to the battery pack 720, and the battery pack 720 supplies power to the load circuit 710.

[0104] In one possible implementation, the load circuit 710 includes at least two, each with a different resistance value.

[0105] In one possible implementation, the positive terminal of the cell module in the battery pack 702 is used to connect to the load circuit 710, which is connected to the voltage divider module via a pin of an electrical connector.

[0106] In one possible implementation, the electronic device 700 is a vacuum cleaner, which includes three load circuits. The first load circuit includes a power switch for the vacuum cleaner, the second load circuit includes a power switch for adjusting the vacuum cleaner's operating mode, and the third load circuit includes a speed switch for adjusting the vacuum cleaner's power level. A battery pack is connected to each load circuit, and each load circuit is controlled by its corresponding switch. Each load circuit may have a different resistance value.

[0107] It should be noted that the connection relationship between the battery pack and the load circuit in the electronic device, as well as the principle and process of detecting the conduction state of the load circuit, have been described in detail in the above-described identification circuit embodiment and battery management system embodiment. For details, please refer to the descriptions in the above-described identification circuit embodiment and battery management system embodiment, and they will not be repeated here.

[0108] The commercial value of the embodiments in this application

[0109] In addressing the technical problem of complex circuit structures in battery management systems due to multiple identification circuits, this application embodiment solves the problem by providing an identification circuit comprising a voltage divider module and a signal generation module. When different load circuits are on, the voltage divider module inputs different voltages to the signal generation module. This allows the signal generation module to generate on / off signals indicating the on / off state of the load circuits based on the input voltages. Therefore, a single identification circuit can identify the on / off states of multiple load circuits, reducing the number of identification circuits in the battery management system and simplifying its circuit structure. Furthermore, different load circuits have different resistance values ​​when on, resulting in different input voltage values ​​to the identification circuit. The identification circuit generates on / off signals based on these input voltage values, thus determining the on / off state of each load circuit. Therefore, by connecting each load circuit to the identification circuit via a single pin of an electrical connector and introducing the voltage output from the load circuit into the identification circuit, the on / off state of each load circuit can be determined, saving the number of pins required for identifying the on / off state of the load circuits.

[0110] It should be understood that the various embodiments in this specification are described in a progressive manner, and the same or similar parts between the various embodiments can be referred to mutually. Each embodiment focuses on describing the differences from other embodiments. In particular, for the method embodiments, since they are basically similar to the methods described in the apparatus and system embodiments, the description is relatively simple, and relevant parts can be referred to the descriptions of other embodiments.

[0111] It should be understood that the foregoing describes specific embodiments of this specification. Other embodiments are within the scope of the claims. In some cases, the actions or steps recited in the claims may be performed in a different order than that shown in the embodiments and may still achieve the desired result. Furthermore, the processes depicted in the drawings do not necessarily require the specific or sequential order shown to achieve the desired result. In some embodiments, multitasking and parallel processing are also possible or may be advantageous.

[0112] It should be understood that the use of a singular form to describe an element or to show only one element in the accompanying drawings does not imply that the number of such element is limited to one. Furthermore, modules or elements described or shown as separate herein may be combined into a single module or element, and modules or elements described or shown as single herein may be broken down into multiple modules or elements.

[0113] It should also be understood that the terminology and expressions used herein are for descriptive purposes only, and one or more embodiments described herein should not be limited to these terms and expressions. The use of these terms and expressions does not exclude any illustrative and descriptive equivalent features (or parts thereof), and it should be recognized that various modifications that may exist should also be included within the scope of the claims. Other modifications, variations, and substitutions may also exist. Accordingly, the claims should be considered to cover all such equivalents.

Claims

1. A recognition circuit, characterized in that: The identification circuit is configured to be connected to a load circuit, and further comprises: a voltage dividing module and a signal generating module; The voltage dividing module is configured to divide the voltage input to the voltage dividing module; The signal generating module is connected to the voltage dividing module, and is configured to receive the voltage output by the voltage dividing module and generate an on / off signal for indicating whether the load circuit is turned on or off; The signal generation module includes N NMOS tubes, the N NMOS tubes are coupled in series, and N is a natural number greater than or equal to 2; The signal generating module further includes: a first power supply and a first resistor; The drain of a first NMOS tube among the N NMOS tubes is connected to the output end of the voltage divider module, the gate of the first NMOS tube is connected to the first end of the first resistor, and the second end of the first resistor is connected to the first power supply; The source of the i-th NMOS tube among the N NMOS tubes is connected to the gate of the i+1-th NMOS tube, and the drain of the i-th NMOS tube is connected to the drain of the i+1-th NMOS tube, wherein i is a positive integer less than N; The voltage dividing module is configured to be connected to at least two load circuits via a pin of an electrical connector.

2. The identification circuit according to claim 1, characterized in that: When the N NMOS transistors meet at least one of the following conditions, the signal generation module generates an on-off signal for indicating whether the load circuit is turned on or off: (i) The combinations of voltage values ​​outputted by the sources of the N NMOS tubes are different; (ii) The combinations of conduction states of the N NMOS transistors are different.

3. The identification circuit according to claim 2, characterized in that: When the combinations of the voltage values ​​outputted by the sources of the N NMOS tubes are different, the signal generating module generates an on-off signal for indicating whether the load circuit is turned on or off, wherein the signal generating module is further configured to: in response to the N NMOS tubes being in the off state, the signal generating module generates a signal for indicating that the load circuit is turned off.

4. The identification circuit according to claim 2, characterized in that: The voltage value outputted by the source of at least one of the NMOS tubes is within at least two value ranges without any intersection, and is used to indicate that different load circuits are turned on.

5. The identification circuit according to claim 1, characterized in that: The signal generating module further comprises: N matching modules, each of which comprises a resistor or at least two resistors connected in series; The source of each of the N NMOS tubes is connected to the first end of one of the matching modules; The second ends of the N matching modules are all used to connect to the negative electrode of the battery cell module.

6. A battery management system, characterized in that: include: An electrical connector, a control module, and an identification circuit as described in any one of claims 1 to 5; The identification circuit is connected to the electrical connector, and the electrical connector is configured to be connected to a load circuit; The control module is connected to the identification circuit, and is configured to determine whether the load circuit is turned on or off according to an on / off signal generated by the identification circuit.

7. The battery management system according to claim 6, characterized in that: The control module is used to determine whether the load circuit is turned on or off according to a combination of voltage values ​​output by the sources of the N NMOS tubes in the identification circuit and / or according to a combination of conduction states of the N NMOS tubes in the identification circuit.

8. The battery management system according to claim 7, characterized in that: The control module is connected to the source electrodes of the N NMOS tubes respectively, and is used to determine whether the load circuit is turned on or off according to a combination of the source output voltage values ​​of the N NMOS tubes.

9. A battery pack, characterized in that: include: A battery cell module and a battery management system as described in any one of claims 6-8, wherein the battery cell module is connected to the battery management system and supplies power to the battery management system.

10. An electronic device, characterized in that: include: A load circuit and a battery pack as claimed in claim 9; The load circuit is connected to the battery pack, and the battery pack is used to supply power to the load circuit.

11. The electronic device according to claim 10, characterized in that: The load circuits include at least two, and each load circuit has a different resistance value.

12. The electronic device according to claim 10 or 11, characterized in that: The positive electrode of the battery cell module is used to be connected to the load circuit, and the load circuit is connected to the voltage divider module via a pin of an electrical connector.

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