Power conversion device, power conversion system

Abstract

The present invention discloses a power conversion device and a power conversion system. The power conversion device includes a DC power supply, a first filtering network, a first anti-backflow module, a second anti-backflow module, a first switch network, a first bus capacitor, a second bus capacitor, a second switch network, a first electromagnetic isolation module, a second electromagnetic isolation module and a second filtering network; the first switch network includes a first main switch, a second main switch, a second auxiliary switch and a first auxiliary switch connected in series between the positive bus and the negative bus in sequence; the second switch network includes a third main switch, a fourth main switch, a fourth auxiliary switch and a third auxiliary switch connected in series between the positive bus and the negative bus in sequence; the first end of the first bus capacitor is electrically connected to the positive bus, the second end is electrically connected to the first end of the second bus capacitor, and the second end of the second bus capacitor is electrically connected to the negative bus. The present invention uses a simple circuit to realize a three-level power conversion device with high reliability and stability.

Description

Technical Field

[0001] The embodiments of the present invention relate to power conversion technology, and more particularly to a power conversion device and a power conversion system. Background Art

[0002] In the case of renewable energy power generation, such as photovoltaic power generation, wind power generation, etc., the power conversion device (also called inverter) is the key device to effectively realize the power conversion. In order to achieve the characteristics of a wide output voltage range, the existing power conversion device generally adopts a two-stage or multi-stage power conversion device.

[0003] However, when a three-level output power converter is required, the use of a two-stage or multi-stage device will make the circuit structure particularly complicated, and the reliability and stability of the power converter are poor, which limits the application of the three-level power converter. Summary of the invention

[0004] The present invention provides a power conversion device and a power conversion system, which can realize a three-level power conversion device with high reliability and stability by using a relatively simple circuit.

[0005] In a first aspect, an embodiment of the present invention provides a power conversion device, the power conversion device comprising:

[0006] A direct current power supply, a first filtering network, a first backflow prevention module, a second backflow prevention module, a first switch network, a first bus capacitor, a second bus capacitor, a second switch network, a first electromagnetic isolation module, a second electromagnetic isolation module, and a second filtering network;

[0007] The input end of the first filter network is electrically connected to the DC power supply, the first output end is electrically connected to the input end of the first anti-backflow module, and the second output end is electrically connected to the output end of the second anti-backflow module;

[0008] The first switch network includes a first main switch, a second main switch, a second auxiliary switch and a first auxiliary switch which are sequentially connected in series between the positive bus and the negative bus; the second switch network includes a third main switch, a fourth main switch, a fourth auxiliary switch and a third auxiliary switch which are sequentially connected in series between the positive bus and the negative bus; a first end of the first bus capacitor is electrically connected to the positive bus, and the first bus capacitor and the second bus capacitor are sequentially connected in series between the positive bus and the negative bus;

[0009] The first output end of the first anti-backflow module is connected between the first main switch and the second main switch, and the second output end is connected between the third main switch and the fourth main switch;

[0010] The first input end of the second backflow prevention module is connected between the first auxiliary switch and the second auxiliary switch, and the second input end is connected between the third auxiliary switch and the fourth auxiliary switch;

[0011] The first input end of the first electromagnetic isolation module is connected between the first main switch and the second main switch, the second input end is connected between the first auxiliary switch and the second auxiliary switch, the first output end is electrically connected to the first input end of the second filter network, and the second output end is electrically connected to the second output end of the second electromagnetic isolation module;

[0012] The first input end of the second electromagnetic isolation module is connected between the third main switch and the fourth main switch, the second input end is connected between the third auxiliary switch and the fourth auxiliary switch, and the first output end is electrically connected to the second input end of the second filter network;

[0013] The first output end and the second output end of the second filter network serve as output ends of the power conversion device.

[0014] Optionally, the first filtering network includes a first capacitor and a first inductor;

[0015] The first end of the first capacitor serves as the first input end of the first filter network, the second end of the first capacitor serves as the second input end and the second output end of the first filter network, the first end of the first capacitor is electrically connected to the first end of the first inductor, and the second end of the first inductor serves as the first output end of the first filter network; and / or,

[0016] The second filtering network includes a second inductor and a second capacitor; the first end of the second inductor serves as the first input end of the second filtering network, the second end of the second inductor is electrically connected to the first end of the second capacitor, the second end of the second inductor serves as the first output end of the second filtering network, and the second end of the second capacitor serves as the second output end of the second filtering network.

[0017] Optionally, the first backflow prevention module includes a first diode and a second diode, the anode of the first diode and the anode of the second diode are electrically connected to serve as the input end of the first backflow prevention module, the cathode of the first diode serves as the first output end of the first backflow prevention module, and the cathode of the second diode serves as the second output end of the first backflow prevention module; and / or,

[0018] The second anti-backcurrent module includes a third diode and a fourth diode. The cathode of the third diode is electrically connected to the cathode of the fourth diode and serves as the output end of the second anti-backcurrent module. The anode of the third diode serves as the first input end of the second anti-backcurrent module. The anode of the fourth diode serves as the second input end of the second anti-backcurrent module.

[0019] Optionally, the first electromagnetic isolation module is a first transformer; and / or,

[0020] The second electromagnetic isolation module is a second transformer.

[0021] Optionally, a voltage transmission ratio of the first electromagnetic isolation module is greater than or equal to 1, and a voltage transmission ratio of the second electromagnetic isolation module is greater than or equal to 1.

[0022] Optionally, at least one of the first main switch, the second main switch, the third main switch, the fourth main switch, the first auxiliary switch, the second auxiliary switch, the third auxiliary switch and the fourth auxiliary switch is a III-N transistor.

[0023] In a second aspect, an embodiment of the present invention further provides a power conversion system, the power conversion system comprising the power conversion device and the switch control module according to the first aspect;

[0024] The switch control module is used to control the first main switch, the second main switch, the third main switch, the fourth main switch, the first auxiliary switch, the second auxiliary switch, the third auxiliary switch and the fourth auxiliary switch to be turned on or off.

[0025] Optionally, the switch control module includes a first comparator, a second comparator, a third comparator, a fourth comparator, a fifth comparator, a first combination logic unit and a second combination logic unit;

[0026] The first comparator inputs a first modulation wave signal at its in-phase input terminal, inputs a first carrier signal at its inverting input terminal, and its output terminal is electrically connected to a third input terminal of the first combinational logic unit; wherein the first modulation wave signal is a sine wave signal, and the first carrier signal is a sawtooth wave signal;

[0027] The second comparator inputs the second modulation wave signal at the in-phase input terminal, inputs the first carrier signal at the inverting input terminal, and the output terminal is electrically connected to the second input terminal of the first combinational logic unit; the second modulation wave signal is a DC signal;

[0028] The third comparator has a non-inverting input terminal inputting a first modulation wave signal, an inverting input terminal inputting a second carrier signal, and an output terminal electrically connected to a third input terminal of the second combinational logic unit; the second carrier signal is a sawtooth wave signal;

[0029] The fourth comparator inputs the second modulation wave signal at its in-phase input terminal, inputs the second carrier signal at its inverting input terminal, and has its output terminal electrically connected to the second input terminal of the second combinational logic unit;

[0030] The non-inverting input terminal of the fifth comparator inputs the first modulation wave signal, the inverting input terminal inputs the reference ground signal of the switch control module, and the output terminal is electrically connected to the first input terminal of the first combination logic unit and the second combination logic unit;

[0031] The first output terminal, the second output terminal, the third output terminal and the fourth output terminal of the first combination logic unit are electrically connected to the control terminal of the second main switch, the control terminal of the first main switch, the control terminal of the fourth main switch and the control terminal of the third main switch, respectively. The logic function of the first combination logic unit is:

[0032] Vgs2=(Vzero'·Vspwm1)'·Vpwm1; Vgs1=Vgs2';

[0033] Vgs4=(Vzero·Vspwm1)'·Vpwm1; Vgs3=Vgs4';

[0034] Wherein, Vgs2, Vgs1, Vgs4 and Vgs3 are signals output from the first output terminal, the second output terminal, the third output terminal and the fourth output terminal of the first combinational logic unit respectively, and Vzero, Vpwm1 and Vspwm1 are signals input from the first input terminal, the second input terminal and the third input terminal of the first combinational logic unit respectively;

[0035] The first output terminal, the second output terminal, the third output terminal and the fourth output terminal of the second combination logic unit are electrically connected to the control terminal of the second auxiliary switch, the control terminal of the first auxiliary switch, the control terminal of the fourth auxiliary switch and the control terminal of the third auxiliary switch, respectively. The logic function of the second combination logic unit is:

[0036] Vgsub2=(Vzero'·Vspwm2)'·Vpwm2; Vgsub1=Vgsub2';

[0037] Vgsub4=(Vzero·Vspwm2)'·Vpwm2; Vgsub3=Vgsub4';

[0038] Among them, Vgsub2, Vgsub1, Vgsub4 and Vgsub3 are respectively the signals output from the first output terminal, the second output terminal, the third output terminal and the fourth output terminal of the second combinational logic unit, and Vzero, Vpwm2 and Vspwm2 are respectively the signals input to the first input terminal, the second input terminal and the third input terminal of the second combinational logic unit.

[0039] Optionally, the first combinational logic unit includes a first NAND gate, a second NAND gate, a third NAND gate, a fourth NAND gate, a first AND gate and a second AND gate;

[0040] The first input end of the first NAND gate and the first input end of the second NAND gate are electrically connected to the first input end of the first combinational logic unit, wherein the first input end of the first NAND gate is a negation input end, the second input end of the first NAND gate and the second input end of the second NAND gate are electrically connected to the third input end of the first combinational logic unit, the output end of the first NAND gate is electrically connected to the first input end of the third NAND gate and the first input end of the first AND gate, the output end of the second NAND gate is electrically connected to the first input end of the fourth NAND gate and the first input end of the second AND gate, the second input end of the first combinational logic unit is electrically connected to the second input end of the first AND gate, the second input end of the third NAND gate, the second input end of the second AND gate and the second input end of the fourth NAND gate; the output end of the first AND gate is electrically connected to the control end of the second main switch, the output end of the third NAND gate is electrically connected to the control end of the first main switch, the output end of the second AND gate is electrically connected to the control end of the fourth main switch, and the output end of the fourth NAND gate is electrically connected to the control end of the third main switch; and / or,

[0041] The second combinational logic unit includes a fifth NAND gate, a sixth NAND gate, a seventh NAND gate, an eighth NAND gate, a third AND gate and a fourth AND gate;

[0042] The first input end of the fifth NAND gate and the first input end of the sixth NAND gate are electrically connected to the first input end of the second combination logic unit, wherein the first input end of the fifth NAND gate is a negation input end, the second input end of the fifth NAND gate and the second input end of the sixth NAND gate are electrically connected to the third input end of the second combination logic unit, the output end of the fifth NAND gate is electrically connected to the first input end of the seventh NAND gate and the first input end of the third AND gate, the output end of the sixth NAND gate is electrically connected to the first input end of the eighth NAND gate and the first input end of the fourth AND gate, the second input end of the second combination logic unit is electrically connected to the second input end of the third AND gate, the second input end of the seventh NAND gate, the second input end of the fourth AND gate and the second input end of the eighth NAND gate; the output end of the third AND gate is electrically connected to the control end of the second auxiliary switch, the output end of the seventh NAND gate is electrically connected to the control end of the first auxiliary switch, the output end of the fourth AND gate is electrically connected to the control end of the fourth auxiliary switch, and the output end of the eighth NAND gate is electrically connected to the control end of the third auxiliary switch.

[0043] Optionally, a phase difference between the first carrier signal and the second carrier signal is 180 degrees.

[0044] The technical solution of the embodiment of the present invention uses a power conversion device to control the conduction state of each switch, thereby controlling the power conversion device to switch between three output levels, that is, it can achieve three-level output, and because there is no need for diodes for mid-point voltage clamping of the front stage and the rear stage, only one-stage power conversion control needs to be implemented, and the control structure is simple, thereby reducing the design cost of the power conversion device and improving the cost performance and integration of the power conversion device. BRIEF DESCRIPTION OF THE DRAWINGS

[0045] Figure 1 A schematic diagram of a circuit structure of a power conversion device provided by an embodiment of the present invention;

[0046] Figure 2 A modulation waveform diagram of a power conversion device provided by an embodiment of the present invention;

[0047] Figure 3 is a schematic diagram of the potential difference between the first node and the second node;

[0048] Figure 4-Figure 9 is a schematic diagram of the working mode of the power conversion device;

[0049] Fig.10 A modulation waveform diagram of another power conversion device provided by an embodiment of the present invention;

[0050] Figure 11-Figure 16 is the working mode diagram of the power conversion device;

[0051] Figure 17-Figure 19 A schematic diagram of the structure of a switch provided in an embodiment of the present invention;

[0052] Figure 20-21 A schematic diagram of the electrical connection structure of a III-N diode provided in an embodiment of the present invention;

[0053] Figure 22-Figure 23 A planar cross-sectional view of a III-N diode packaging structure provided by an embodiment of the present invention;

[0054] Figure 24-26 A diagram showing experimental results of a power conversion device provided by an embodiment of the present invention;

[0055] Fig. 27 A schematic diagram of a circuit structure of a power conversion system provided by an embodiment of the present invention;

[0056] Fig.28 The present invention provides a flow chart of a control method for a power conversion system. DETAILED DESCRIPTION

[0057] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are only used to explain the present invention, rather than to limit the present invention. It should also be noted that, for ease of description, only parts related to the present invention, rather than all structures, are shown in the accompanying drawings.

[0058] Figure 1 A schematic diagram of a circuit structure of a power conversion device provided by an embodiment of the present invention, referring to Figure 1 The power conversion device includes: a DC power supply Uin, a first filtering network 101, a first backflow prevention module D1, a second backflow prevention module D2, a first switch network 102, a first bus capacitor Cbus1, a second bus capacitor Cbus2, a second switch network 103, a first electromagnetic isolation module T1, a second electromagnetic isolation module T2 and a second filtering network 104;

[0059] The first input end of the first filter network 101 is electrically connected to the positive electrode of the DC power supply Uin, the second input end of the first filter network 101 is electrically connected to the negative electrode of the DC power supply Uin, the first output end of the first filter network 101 is electrically connected to the input end of the first anti-backflow module D1, and the second output end of the first filter network 101 is electrically connected to the output end of the second anti-backflow module D2;

[0060] The first switch network 102 includes a first main switch S1, a second main switch S2, a second auxiliary switch Ssub2 and a first auxiliary switch Ssub1 which are sequentially connected in series between the positive bus V+ and the negative bus V-; the second switch network 103 includes a third main switch S3, a fourth main switch S4, a fourth auxiliary switch Ssub4 and a third auxiliary switch Ssub3 which are sequentially connected in series between the positive bus V+ and the negative bus V-; a first end of the first bus capacitor Cbus1 is electrically connected to the positive bus V+, a second end of the first bus capacitor Cbus1 is electrically connected to a first end of the second bus capacitor Cbus2, and a second end of the second bus capacitor Cbus2 is electrically connected to the negative bus V-;

[0061] The first output end of the first anti-backflow module D1 is connected between the first main switch S1 and the second main switch S2, and the second output end of the first anti-backflow module D1 is connected between the third main switch S3 and the fourth main switch S4. The first anti-backflow module D1 is used to prevent current from flowing from its output end to its input end;

[0062] The first input end of the second backflow prevention module D2 is connected between the first auxiliary switch Ssub1 and the second auxiliary switch Ssub2, and the second input end of the second backflow prevention module D2 is connected between the third auxiliary switch Ssub3 and the fourth auxiliary switch Ssub4. The second backflow prevention module is used to prevent current from flowing from its output end to its input end;

[0063] A first input end of the first electromagnetic isolation module T1 is connected between the first main switch S1 and the second main switch S2, a second input end of the first electromagnetic isolation module T1 is connected between the first auxiliary switch Ssub1 and the second auxiliary switch Ssub2, a first output end of the first electromagnetic isolation module T1 is electrically connected to a first input end of the second filter network 104, and a second output end of the first electromagnetic isolation module T1 is electrically connected to a second output end of the second electromagnetic isolation module T2;

[0064] A first input end of the second electromagnetic isolation module T2 is connected between the third main switch S3 and the fourth main switch S4, a second input end of the second electromagnetic isolation module T2 is connected between the third auxiliary switch Ssub3 and the fourth auxiliary switch Ssub4, and a first output end of the second electromagnetic isolation module T2 is electrically connected to a second input end of the second filter network 104;

[0065] The first output terminal and the second output terminal of the second filter network 104 serve as output terminals of the power conversion device.

[0066] Specifically, the first filtering module 101 can be used to filter the signal generated by the DC power supply Uin, the first backflow prevention module D1 can prevent the current between the first main switch S1 and the second main switch S2 from flowing between the third main switch S3 and the fourth main switch S4; the second backflow prevention module D2 can prevent the current between the first auxiliary switch Ssub1 and the second auxiliary switch Ssub2 from flowing between the third auxiliary switch Ssub3 and the fourth auxiliary switch Ssub4; the first main switch S1, the second main switch S2, the third main switch S3, the fourth main switch S4, the first auxiliary switch Ssub1, the second auxiliary switch Ssub2, the third auxiliary switch Ssub3 and the fourth auxiliary switch Ssub4 can all be turned on or off under the control signal input from their respective control ends. In this embodiment, the state of each switch can be controlled so that the voltage between the two input ends of the second filtering network 104 (the voltage between the first node N and the second node L) includes three levels, and then the harmonics are filtered out through the filtering action of the second filtering network 104, so as to obtain a relatively pure AC signal on the external load R. Exemplarily, for example, when the second main switch S2, the third main switch S3, the second auxiliary switch Ssub2 and the third auxiliary switch Ssub3 are turned on and the other switches are turned off, the first bus capacitor Cbus1 and the second bus capacitor Cbus2 can provide energy to the output side through the third main switch S3, the third auxiliary switch Ssub3 and the second electromagnetic isolation module T2, and the potential difference VNL between the first node N and the second node L is the bus voltage -Vbus = -(Vcbus1 + Vcbus2); the first bus capacitor Csub1 and the second bus capacitor Csub2 are both large enough, and the voltage ripple can be ignored, and Vcubs1 = Vcbus2 = (1 / 2) Vbus, where, Vcubs1 is the voltage across the first bus capacitor Cbus1, and Vcbus2 is the voltage across the second bus capacitor Cbus2; when the second main switch S2, the third main switch S3, the second auxiliary switch Ssub2 and the fourth auxiliary switch Ssub4 are turned on and other switches are turned off, VNL can be obtained to be equal to -Vcubs1; when the second main switch S2, the fourth main switch S4, the second auxiliary switch Ssub2 and the fourth auxiliary switch Ssub4 are turned on and other switches are turned off, the VNL potential difference is clamped to zero; that is, the voltage between the first node N and the second node L has three states of -Vbus, -(1 / 2)Vbus and 0, that is, the circuit realizes the output voltage three-level function. Compared with the simple circuit structure of the three-level power conversion device such as the diode clamp, the traditional two-stage structure needs to realize the midpoint voltage clamping of the front stage and the rear stage and other controls at the same time, and the control structure is complicated; while the power conversion device of this embodiment only needs to realize the control of one-stage power conversion, and the control structure is simple, thereby reducing the design cost of the power conversion device and improving the cost performance and integration of the power conversion device.

[0067] The technical solution of this embodiment uses a power conversion device to control the conduction state of each switch, thereby controlling the power conversion device to switch between three output levels, that is, it can achieve three-level output, and because there is no need for diodes for mid-point voltage clamping of the front stage and the rear stage, only one-stage power conversion control needs to be implemented, and the control structure is simple, thereby reducing the design cost of the power conversion device and improving the cost performance and integration of the power conversion device.

[0068] Exemplarily, the first filtering network 101 includes a first capacitor Cin and a first inductor Lin, the first end of the first capacitor Cin serves as the first input end of the first filtering network 101, the second end of the first capacitor Cin serves as the second input end and the second output end of the first filtering network 101, the first end of the first capacitor Cin is electrically connected to the first end of the first inductor Lin, and the second end of the first inductor Lin serves as the first output end of the first filtering network 101; and / or, the second filtering network 104 includes a second inductor Lo and a second capacitor Lo, the first end of the second inductor Lo serves as the first input end of the second filtering network 104, the second end of the second inductor Lo is electrically connected to the first end of the second capacitor Co, the second end of the second inductor Lo serves as the first output end of the second filtering network 104, and the second end of the second capacitor Co serves as the second output end of the second filtering network 104.

[0069] Specifically, the first filter network 101 and the second filter network 104 in this embodiment can both use LC filter circuits. The LC filter circuit has the advantages of high stability, good filtering effect, low DC loss, etc., which can be more conducive to the stable operation of the power conversion device.

[0070] Optionally, the first anti-backflow module D1 includes a first diode D11 and a second diode D12, the anode of the first diode D11 is electrically connected to the anode of the second diode D12 as the input end of the first anti-backflow module D1, the cathode of the first diode D11 is used as the first output end of the first anti-backflow module D1, and the cathode of the second diode D12 is used as the second output end of the first anti-backflow module D1; and / or, the second anti-backflow module D2 includes a third diode D21 and a fourth diode D22, the cathode of the third diode D21 is electrically connected to the cathode of the fourth diode D22 as the output end of the second anti-backflow module D2, the anode of the third diode D21 is used as the first input end of the second anti-backflow module D2, and the anode of the fourth diode D22 is used as the second input end of the second anti-backflow module D2. The first electromagnetic isolation module T1 is a first transformer, and / or, the second electromagnetic isolation module T2 is a second transformer.

[0071] Specifically, a diode has a unidirectional conduction function, and has the advantages of low cost and good stability. Using a diode as an anti-backflow module can further improve the stability of the power conversion device and reduce the overall cost of the power conversion device.

[0072] The working process of the power conversion device is described in detail below; Figure 2 As shown, Figure 2 A modulation waveform diagram of a power conversion device provided in an embodiment of the present invention may correspond to the first time period of a positive half cycle of a sine wave. In this embodiment, the positive half cycle of a sine wave is divided into three time periods, such as Figure 3 As shown, Figure 3 It is a schematic diagram of the potential difference between the first node and the second node; wherein, PositionA corresponds to the first time period, PositionB and PositionC correspond to the second time period and the third time period, and when the modulation wave changes, the time proportion of the first time period, the second time period and the third time period may change.

[0073] Combination Figure 2 and Figure 3 In this embodiment, the first modulation wave signal Vsine, the first carrier signal Vtri1, the second modulation wave signal Vdc and the reference ground signal (not shown) can be provided first, and then the above signals are passed through a logic circuit such as a comparator to generate a first sinusoidal pulse width signal Vspwm1, a first fixed pulse width signal Vpwm1, and a zero-crossing detection signal Vzero (not shown), and the output drive signals Vgs1 to Vgs4 of the first to fourth main switches are generated through a combination logic (which will be described in detail later). Similarly, the second sinusoidal pulse width signal Vspwm2, the second fixed pulse width signal Vpwm2 and the zero-crossing detection signal Vzero can be generated through a logic circuit such as a comparator through the first modulation wave signal Vsine, the second carrier signal Vtri2, the second modulation wave signal Vdc and the reference ground signal of the switch control module, and the drive signals Vgsub1 to Vgsub4 of the first to fourth three auxiliary switches are generated by the combination logic. Here, the high level conduction of each switch is taken as an example for explanation. Among them, the first modulation wave signal Vsine is a sine wave, and its frequency can be adjusted according to the frequency required by the output load. If the power conversion device is finally to be connected to the mains, the frequency of the first modulation wave signal Vsine can be set to 50Hz; the second modulation wave signal Vdc is a DC signal, and the first carrier signal Vtri1 and the second carrier signal Vtri2 are both sawtooth waves, and their frequencies are much greater than the frequency of the first modulation wave signal Vsine. For example, the frequencies of the first carrier signal Vtri1 and the second carrier signal Vtri2 are both greater than 100kHz.

[0074] Figure 4-Figure 9is a schematic diagram of the working mode of the power conversion device, which can correspond to Figure 2 Mode 1, i.e., the time period [t0-t1], mode 2, i.e., the time period [t1-t2], mode 3, i.e., the time period [t2-t3], mode 4, i.e., the time period [t3-t4], mode 5, i.e., the time period [t4-t5], and mode 6, i.e., the time period [t5-t5]; refer to Figure 4 , during this time period, the second main switch S2, the third main switch S3, the second auxiliary switch Ssub2 and the third auxiliary switch Ssub3 are turned on. On the one hand, the DC power supply Uin charges the first inductor Lin through the second switch S2 and the second auxiliary switch Ssub2, the first inductor Lin stores energy, and the inductor current gradually increases; on the other hand, the first bus capacitor Cbus1 and the second bus capacitor Cbus2 provide energy to the output side through the third main switch S3, the third auxiliary switch Ssub3 and the second electromagnetic isolation module T2. The potential difference VNL between the output nodes N and L is equal to the bus voltage -Vbus=-(Vcbus1+Vcbus2), the voltage of the first main switch S1 is equal to Vcbus1, the voltage of the first auxiliary switch Ssub1 is equal to Vcbus2, the voltage of the fourth main switch S4 is equal to Vcbus1, and the voltage of the fourth auxiliary switch Ssub4 is equal to Vcbus2.

[0075] refer to Figure 5 , in this time period, i.e., mode 2, the second main switch S2, the third main switch S3, the second auxiliary switch Ssub2 and the fourth auxiliary switch Ssub4 are turned on. On the one hand, the DC power supply Uin charges the first inductor Lin through the second main switch S2 and the second auxiliary switch Ssub2 from the first path, and charges the first inductor Lin through the second main switch S2 and the fourth auxiliary switch Ssub4 from the second path. The first inductor Lin stores energy, and the inductor current continues to gradually increase; on the other hand, the first bus capacitor Cbus1 provides energy to the output side through the third main switch S3, the fourth main switch Ssub4 and the second electromagnetic isolation module T2. The potential difference VNL between the output nodes N and L is equal to the first bus capacitor voltage -Vcbus1, the voltage of the first main switch S1 is equal to Vcbus1, the voltage of the first auxiliary switch Ssub1 is equal to Vcbus2, the voltage of the fourth main switch S4 is equal to Vcbus1, and the voltage of the third auxiliary switch Ssub3 is equal to Vcbus2.

[0076] refer to Figure 6, in this time period, i.e., mode 3, the second main switch S2, the third main switch S3, the first auxiliary switch Ssub1 and the third auxiliary switch Ssub3 are turned on. On the one hand, the first inductor Lin is subjected to a reverse voltage drop (Vcbus2-Uin), starts to release energy, the inductor current gradually decreases, the first bus capacitor Cbus1 and the second bus capacitor Cbus2 are charged, and the bus voltage is balanced; on the other hand, the first bus capacitor Cbus1 and the second bus capacitor Cbus2 provide energy to the output side through the third main switch S3, the third auxiliary switch Ssub3 and the second electromagnetic isolation module T2. The potential difference VNL between the output nodes N and L is equal to the first bus capacitor voltage -Vcbus1, the voltage of the first main switch S1 is equal to Vcbus1, the voltage of the second auxiliary switch Ssub2 is equal to Vcbus2, the voltage of the fourth main switch S4 is equal to Vcbus1, and the voltage of the fourth auxiliary switch Ssub4 is equal to Vcbus2.

[0077] refer to Figure 7 , in this time period, i.e., mode 4, the switch states of each switch are basically consistent with mode 1. The potential difference VNL between the output nodes N and L is equal to the bus voltage -Vbus = -(Vcbus1 + Vcbus2), the voltage of the first main switch S1 is equal to Vcbus1, the voltage of the second auxiliary switch Ssub2 is equal to Vcbus2, the voltage of the fourth main switch S4 is equal to Vcbus1, and the voltage of the fourth auxiliary switch Ssub4 is equal to Vcbus2.

[0078] refer to Figure 8 In this stage, namely mode 5, the second main switch S2, the fourth main switch S4, the second auxiliary switch Ssub2 and the third auxiliary switch Ssub3 are turned on. On the one hand, the DC power supply Uin charges the first inductor Lin through the second main switch S2 and the second auxiliary switch Ssub2, the first inductor Lin stores energy, and the inductor current gradually increases; on the other hand, the second bus capacitor Cbus2 provides energy to the output side through the fourth main switch S4, the third auxiliary switch Ssub3 and the second electromagnetic isolation module T2. The potential difference VNL between the output nodes N and L is equal to the second bus capacitor voltage -Vcbus2, the voltage of the first main switch S1 is equal to Vcbus1, the voltage of the first auxiliary switch Ssub1 is equal to Vcbus2, the voltage of the third main switch S3 is equal to Vcbus1, and the voltage of the fourth auxiliary switch Ssub4 is equal to Vcbus2.

[0079] refer to Fig. 9, in this stage, i.e., mode 6, the first main switch S1, the third main switch S3, the second auxiliary switch Ssub2 and the third auxiliary switch Ssub3 are turned on. On the one hand, the first inductor Lin is subjected to the reverse voltage drop (Vcbus1-Uin), starts to release energy, the inductor current gradually decreases, the first bus capacitor Cbus1 and the second bus capacitor Cbus2 are charged, and the bus voltage is balanced; on the other hand, the first bus capacitor Cbus1 and the second bus capacitor Cbus2 provide energy to the output side through the third main switch S3, the third auxiliary switch Ssub3 and the second electromagnetic isolation module T2. The potential difference VNL between the output nodes N and L is equal to the second bus capacitor voltage -Vcbus2, the voltage of the second main switch S2 is equal to Vcbus1, the voltage of the first auxiliary switch Ssub1 is equal to Vcbus2, the voltage of the fourth main switch S4 is equal to Vcbus1, and the voltage of the fourth auxiliary switch Ssub4 is equal to Vcbus2.

[0080] At this point, when the modulation wave is at Position A of the positive half cycle of the sine wave, the three-level power conversion device repeats the above six working modes in sequence, thereby continuously converting the input low-voltage DC power into high-voltage AC power and outputting it to the subsequent load. At this position (Position A), the potential difference VNL between the output nodes N and L has two values: -Vbus and -(1 / 2)Vbus.

[0081] Fig.10 A modulation waveform diagram of another power conversion device provided by an embodiment of the present invention may correspond to the Position B and Position C time periods of the positive half cycle of the sine wave. Figure 11-Figure 16 is the working mode diagram of the power conversion device, which can correspond to Fig.10 Mode 1, i.e., the time period [t0-t1], mode 2, i.e., the time period [t1-t2], mode 3, i.e., the time period [t2-t3], mode 4, i.e., the time period [t3-t4], mode 5, i.e., the time period [t4-t5], and mode 6, i.e., the time period [t5-t5];

[0082] refer to Fig.11In this stage, namely mode 1, the second main switch S2, the third main switch S3, the second auxiliary switch Ssub2 and the fourth auxiliary switch Ssub4 are turned on. On the one hand, the DC power supply Uin charges the first inductor Lin through the second main switch S2 and the second auxiliary switch Ssub2 from the first path, and charges the first inductor Lin through the second main switch S2 and the fourth auxiliary switch Ssub4 from the second path. The first inductor Lin stores energy, and the inductor current gradually increases. On the other hand, the first bus capacitor Cbus1 provides energy to the output side through the third main switch S3, the fourth auxiliary switch Ssub4 and the second electromagnetic isolation module T2. The potential difference VNL between the output nodes N and L is equal to the first bus capacitor voltage -Vcbus1, the voltage of the first main switch S1 is equal to Vcbus1, the voltage of the first auxiliary switch Ssub1 is equal to Vcbus2, the voltage of the fourth main switch S4 is equal to Vcbus1, and the voltage of the third auxiliary switch Ssub3 is equal to Vcbus2.

[0083] refer to Fig.12 , in this stage, namely mode 2 [t1~t2]: the second main switch S2, the fourth main switch S4, the second auxiliary switch Ssub2 and the fourth auxiliary switch Ssub4 are turned on. On the one hand, the DC power supply Uin charges the first inductor Lin through the second main switch S2 and the second auxiliary switch Ssub2 from the first path, and charges the first inductor Lin through the fourth main switch S4 and the fourth auxiliary switch Ssub4 from the second path. The first inductor Lin stores energy, and the inductor current continues to gradually increase; on the other hand, the potential difference VNL between the output nodes N and L is clamped to zero, the voltage of the first main switch S1 is equal to Vcbus1, the voltage of the first auxiliary switch Ssub1 is equal to Vcbus2, the voltage of the third main switch S3 is equal to Vcbus1, and the voltage of the third auxiliary switch Ssub3 is equal to Vcbus2.

[0084] refer to Fig.13 , in this stage, namely mode 3 [t2~t3]: the second main switch S2, the fourth main switch S4, the first auxiliary switch Ssub1 and the third auxiliary switch Ssub3 are turned on. On the one hand, the first inductor Lin is subjected to the reverse voltage drop (Vcbus2-Uin), starts to release energy, the inductor current gradually decreases, and the second bus capacitor Cbus2 is charged to maintain the bus voltage balance; on the other hand, the potential difference VNL between the output nodes N and L is clamped to zero, the voltage of the first main switch S1 is equal to Vcbus1, the voltage of the second auxiliary switch Ssub2 is equal to Vcbus2, the voltage of the third main switch S3 is equal to Vcbus1, and the voltage of the fourth auxiliary switch Ssub4 is equal to Vcbus2.

[0085] refer to Fig.14, in this stage, namely mode 4 [t3~t4]: the second main switch S2, the fourth main switch S4, the second auxiliary switch Ssub2 and the third auxiliary switch Ssub3 are turned on. On the one hand, the DC power supply Uin charges the first inductor Lin through the second main switch S2 and the second auxiliary switch Ssub2, the first inductor Lin stores energy, and the inductor current gradually increases; on the other hand, the second bus capacitor Cbus2 provides energy to the output side through the fourth main switch S4, the third auxiliary switch Ssub3 and the second electromagnetic isolation module T2. The potential difference VNL between the output nodes N and L is equal to the second bus capacitor voltage -Vcbus2, the voltage of the first main switch S1 is equal to Vcbus1, the voltage of the first auxiliary switch Ssub1 is equal to Vcbus2, the voltage of the third main switch S3 is equal to Vcbus1, and the voltage of the fourth auxiliary switch Ssub4 is equal to Vcbus2.

[0086] refer to Fig.15 , in this stage, namely mode 5 [t4-t5]: the switching state of each switch is basically the same as that of mode 2. The potential difference VNL between the output nodes N and L is clamped to zero, the voltage of the first main switch S1 is equal to Vcbus1, the voltage of the first auxiliary switch Ssub1 is equal to Vcbus2, the voltage of the third main switch S3 is equal to Vcbus1, and the voltage of the third auxiliary switch Ssub3 is equal to Vcbus2.

[0087] refer to Fig.16 , in this stage, namely mode 6 [t5~t6]: the first main switch S1, the third main switch S3, the second auxiliary switch Ssub2 and the fourth auxiliary switch Ssub4 are turned on. On the one hand, the first inductor Lin is subjected to the reverse voltage drop (Vcbus1-Uin), starts to release energy, the inductor current gradually decreases, and the first bus capacitor Cbus1 is charged to maintain the bus voltage balance; on the other hand, the potential difference VNL between the output nodes N and L is clamped to zero, the voltage of the second main switch S2 is equal to Vcbus1, the voltage of the first auxiliary switch Ssub1 is equal to Vcbus2, the voltage of the fourth main switch S4 is equal to Vcbus1, and the voltage of the third auxiliary switch Ssub3 is equal to Vcbus2.

[0088] At this point, when the modulation wave is at Position B or Position C of the positive half cycle of the sine wave, the power conversion device repeats the above six working modes in sequence, thereby continuously converting the input low-voltage DC power into high-voltage AC power and outputting it to the subsequent load. At this position, the potential difference VNL between the output nodes N and L has two values: -(1 / 2)Vbus and 0.

[0089] In summary, it is found that no matter what state the power conversion device is working in, the voltage stress of the main switch and the auxiliary switch is half of the bus voltage Vbus, and the potential difference VNL between the output nodes N and L has three states: -Vbus, -(1 / 2)Vbus and 0, that is, the circuit realizes the output voltage three-level function. In addition, the current pulsation frequency of the first inductor Lin and the current pulsation frequency of the second inductor Lo are both twice the frequency of the first carrier signal Vtri1 (or the second carrier signal Vtri2).

[0090] It should be noted that at least one of the first main switch S1 , the second main switch S2 , the third main switch S3 , the fourth main switch S4 , the first auxiliary switch Ssub1 , the second auxiliary switch Ssub2 , the third auxiliary switch Ssub3 and the fourth auxiliary switch Ssub4 is a III-N transistor.

[0091] Specifically, the III-N transistor may be, for example, a field effect transistor (FET) such as a high electron mobility transistor (HEMT), a heterojunction field effect transistor (HFET), a POLFET, a JFET, a MESFET, a CAVET, or any other III-N transistor structure suitable for power switching applications.

[0092] In some embodiments, Figure 17-Figure 19 A schematic diagram of the structure of a switch provided in an embodiment of the present invention is shown in FIG. Fig.17 As shown, the III-N transistor is an enhancement type (E-type) device, i.e., a normally-off device, so that the threshold voltage is greater than 0V, for example, about 1.5V-2V or greater than 2V. When the enhancement type (E-type) device is used, it does not contain a reverse body diode, which can reduce the conduction loss of the power supply device when the device is reversely freewheeling. The III-N transistor is composed of a high voltage III-N depletion type (D-type) transistor and a low voltage enhancement type (E-type) transistor cascaded, as shown in FIG. Fig.18 The depletion type (D type) device, i.e., the normally-on device, has a threshold voltage less than 0V. The low voltage enhancement type (E type) transistor may be a low voltage Si MOS device. In some embodiments, Fig.18 The III-N transistor also includes an external anti-parallel diode for reducing the reverse recovery loss of the device. Fig.19 shown.

[0093] In some embodiments, the III-N transistor is a high voltage switching transistor. As used herein, a high voltage switching transistor is a transistor optimized for high voltage switching applications. That is, when the transistor is turned off, it is capable of blocking high voltages, such as about 300V, or higher about 600V, or higher about 1200V, or higher, and when the transistor is turned on, it has a sufficiently low on-resistance (Rdson) for the above applications, that is, when a large amount of current passes through the device, low conduction losses are achieved.

[0094] The first anti-backflow module D1 and the second anti-backflow module D2 can both use III-N rectifying devices, which can be at least two lateral III-N diodes, which have insulating or semi-insulating parts on opposite sides of the semiconductor body relative to all electrodes. The III-N diode includes an insulating or semi-insulating part, a semiconductor body including a III-N buffer layer (such as GaN) and a III-N barrier layer (such as AlGaN), a two-dimensional electron gas (2DEG) channel, an anode contact that contacts the semiconductor body on the opposite side of the insulating or semi-insulating part and forms a Schottky contact with the semiconductor material of the semiconductor body, and a cathode contact that forms an ohmic contact with the 2DEG channel. The III-N diode may optionally include a conductive or semi-conductive part, such as a silicon substrate.

[0095] Figure 20-21 The schematic diagram of the electrical connection structure of the III-N diode provided in the embodiment of the present invention, in some embodiments, the III-N diode in the III-N rectifier device can be connected in a common anode manner, such as Fig. 20 As shown, it includes an input terminal A1 and two output terminals K1 and K2, or a common cathode connection mode, such as Fig.21 As shown, it includes two input terminals A1 and A2 and an output terminal K1.

[0096] Figure 22-Figure 23 FIG. 1 is a planar cross-sectional view of a III-N diode package structure provided in an embodiment of the present invention. In some embodiments, a III-N rectifier device is composed of two independently packaged III-N diodes and is electrically connected externally to form a III-N rectifier device. The independently packaged III-N diodes are as shown in FIG. Fig. 22 As shown, Fig. 22The plan view of illustrates the various portions of a package and the electronic device encapsulated or sealed within the package. Electronic component 90 includes a single III-N diode 22 encapsulated, encapsulated, or sealed within a standalone package. The standalone package includes a plurality of sealed structural portions, such as a package base 94, and non-structural portions, such as pins 91, 92, and 93. As used herein, a "structural portion" of a package is a portion of the package that forms the basic shape or molding of the package and provides the structural rigidity of the package required to protect the encapsulated device. In most cases, when an electronic component including a package is used in a discrete circuit, the structural portion of the package is mounted directly to the circuit or circuit board. Fig. 22 In an independent package, the package base 94 is formed of a conductive material, that is, the package base 94 is a conductive structural part of the package. A single package includes at least two pins, an anode pin 91 and a cathode pin 93, and optionally includes at least one other pin, such as an open pin 92. Pins 91-93 are all formed of conductive materials. When an open pin 92 is included, it can be electrically connected to the package base 94 or electrically insulated from the package base 94, and all other pins are electrically insulated from the package base. As used herein, if two or more contacts or other items are connected by materials that are sufficiently conductive to ensure that the potential at each of the contacts or other items is always the same, that is, approximately the same, under any bias condition, then two or more contacts or other items are referred to as "electrically connected".

[0097] When the III-N diode 22 is used in a III-N rectifying device, the III-N diode 22 is mounted inside a single package and connected as follows, electrical bonding wires 38-39, which may be single or multiple wire bonds, are used to electrically connect the various portions of the package and the III-N diode 22 to each other, wherein the respective insulating or semi-insulating substrates of the III-N diode 22 are in contact with the package base 94. The cathode contact 29 of the III-N diode 22 is electrically connected to a conductive structural portion of the package, such as the package base 94, or may be electrically connected to a cathode pin 93 of the package, such as by a conductive bonding wire 39. The anode contact 28 of the III-N diode 22 is electrically connected to an anode pin 91 of the package, such as by a conductive bonding wire 38.

[0098] In some other embodiments, the III-N rectifier device is composed of a double-tube packaged III-N diode, such as Fig.23 As shown, Fig.23The plan view of the package body illustrates multiple parts and electronic devices encapsulated or sealed in the package body. The electronic component 90' includes a III-N diode 22 and a III-N diode 22', both of which are encapsulated, encapsulated or sealed in a double-tube package. The double-tube package includes multiple sealed structural parts, such as a package base 94, and non-structural parts, such as pins 91, 92 and 93. As used herein, the "structural part" of the package is a part that forms the basic shape or molding of the package and provides the structural rigidity of the package required to protect the encapsulated device. In most cases, when the electronic component including the package body is used in a discrete circuit, the structural part of the package body is directly mounted to the circuit or circuit board. In the double-tube package, the package base 94 is formed of a conductive material, that is, the package base 94 is a conductive structural part of the package. A single package includes at least three pins, an anode pin 91, an anode pin 93 and a common cathode pin 92. Pins 91-93 are all formed of conductive material. Common cathode pin 92 may be electrically connected to or electrically isolated from package base 94, and all other pins are electrically isolated from the package base. As used herein, two or more contacts or other items are said to be "electrically connected" if they are connected by a material that is sufficiently conductive to ensure that the electrical potential at each of the contacts or other items is always the same, i.e., approximately the same, under any bias condition.

[0099] When the III-N diode is used in a III-N rectifier device, the III-N diode 22 and the III-N diode 22' are mounted inside a double-tube package and connected as follows, electrical bonding wires 38, 38', 39, which may be single or multiple wire bonds, are used to electrically connect the various parts of the package, the III-N diode 22, and the III-N diode 22' to each other. Wherein the respective insulating or semi-insulating substrates of the III-N diode 22 and the III-N diode 22' are both in contact with the package base 94. The cathode contact 29 of the III-N diode 22 and the cathode contact 29' of the III-N diode 22' are electrically connected to the conductive structure of the package, such as the package base 94, and are also electrically connected to the common cathode pin 92 of the package through the conductive bonding wire 39. The anode contact 28 of the III-N diode 22 is electrically connected to the anode pin 91 of the package, such as through the conductive bonding wire 38, and the anode contact 28' of the III-N diode 22' is electrically connected to the anode pin 93 of the package, such as through the conductive bonding wire 38'.

[0100] The electromagnetic isolation module is a high-frequency transformer, and the transmission ratio between the input side and the output side of the electromagnetic isolation module can be 1, which only realizes the functions of electrical isolation and voltage clamping. At this time, the input-output voltage transmission ratio of the power conversion device is (M / (1-D)), where D is the duty cycle of the first fixed pulse width signal Vpwm1 (or the second fixed pulse width signal Vpwm2), and M is the duty cycle of the first sinusoidal pulse width signal Vspwm1 (or the second sinusoidal pulse width signal Vspwm2).

[0101] In some other embodiments, the transmission ratio between the input side and the output side of the electromagnetic isolation module may be N (N>1), and the input-output voltage transmission ratio of the three-level power conversion device may be increased to (N*M / (1-D)).

[0102] Figure 24-26 The experimental result diagram of the power conversion device provided by the embodiment of the present invention, wherein: Fig.24 The currents ILin and ILo of the first inductor Lin and the second inductor Lo of the power conversion device, and the first carrier signal Vtri1, it can be seen that the current pulsation frequency of the two inductors is twice the switching frequency. Therefore, the power conversion device can greatly reduce the volume of the filter inductor compared with the traditional two-level inverter device at the same power level. Fig.25 is the bus voltage Vbus of the power conversion device, the voltage stress of the main switches S1-S4 and the voltage stress of the auxiliary switches Ssub1-Ssub4. It can be seen that the voltage stress of all main switches and auxiliary switches is half of the bus voltage Vbus, which meets the three-level voltage stress characteristics. Fig.26 The DC power supply Uin input voltage Vin, the load Rl voltage Vo, and the potential difference VNL between the output nodes N and L of the power conversion device can be seen. While completing the single-stage boost and DC-AC power conversion, the power conversion device meets the application requirements of the three-level output voltage.

[0103] The embodiment of the present invention also provides a power conversion system, such as Fig. 27 As shown, Fig. 27 A circuit structure diagram of a power conversion system provided in an embodiment of the present invention, the power conversion system includes a power conversion device and a switch control module 40 provided in any embodiment of the present invention, the switch control module 40 is used to control the first main switch, the second main switch, the third main switch, the fourth main switch, the first auxiliary switch, the second auxiliary switch, the third auxiliary switch and the fourth auxiliary switch to be turned on or off.

[0104] Specifically, in this embodiment, the switch control module 40 can be used to control each switch to operate in the above-mentioned modes, so that the power conversion device can complete three-level voltage conversion. Since the power conversion system provided by the embodiment of the present invention includes the power conversion device provided by any embodiment of the present invention, it also has the same beneficial effects and will not be repeated here.

[0105] Optionally, the switch control module 40 includes a first comparator Comp1, a second comparator Comp2, a third comparator Comp3, a fourth comparator Comp4, a fifth comparator Comp5, a first combination logic unit 401 and a second combination logic unit 402;

[0106] The first modulation wave signal Vsine is input to the in-phase input terminal of the first comparator Comp1, the first carrier signal Vtri1 is input to the inverting output terminal of the first comparator Comp1, and the output terminal of the first comparator Comp1 is electrically connected to the third input terminal of the first combinational logic unit 401; wherein the first modulation wave signal is a sine signal, and the first carrier signal is a sawtooth wave signal;

[0107] The second comparator Comp2 has a non-inverting input terminal that inputs the second modulation wave signal Vdc, and an inverting input terminal that inputs the first carrier signal Vtri1. The output terminal of the second comparator Comp2 is electrically connected to the second input terminal of the first combinational logic unit 401. The second modulation wave signal is a DC signal.

[0108] The first modulated wave signal is input to the in-phase input terminal of the third comparator Comp3, the second carrier signal Vtri2 is input to the inverting input terminal of the third comparator Comp3, and the output terminal of the third comparator Comp3 is electrically connected to the third input terminal of the second combinational logic unit 402; the second carrier signal is a sawtooth wave signal;

[0109] The second modulation wave signal is input to the in-phase input terminal of the fourth comparator Comp4, the second carrier signal is input to the inverting input terminal of the fourth comparator Comp4, and the output terminal of the fourth comparator Comp4 is electrically connected to the second input terminal of the second combinational logic unit;

[0110] The first modulated wave signal is input to the in-phase input terminal of the fifth comparator Comp5, the reference ground signal of the switch control module is input to the inverting input terminal of the fifth comparator Comp5, and the output terminal of the fifth comparator Comp5 is electrically connected to the first input terminals of the first combination logic unit 401 and the second combination logic unit 402;

[0111] The first output terminal, the second output terminal, the third output terminal and the fourth output terminal of the first combination logic unit are electrically connected to the control terminal of the second main switch, the control terminal of the first main switch, the control terminal of the fourth main switch and the control terminal of the third main switch respectively. The logic function of the first combination logic unit is:

[0112] Vgs2=(Vzero'·Vspwm1)'·Vpwm1; Vgs1=Vgs2';

[0113] Vgs4=(Vzero·Vspwm1)'·Vpwm1; Vgs3=Vgs4';

[0114] Wherein, Vgs2, Vgs1, Vgs4 and Vgs3 are signals output from the first output terminal, the second output terminal, the third output terminal and the fourth output terminal of the first combinational logic unit respectively, and Vzero, Vpwm1 and Vspwm1 are signals input from the first input terminal, the second input terminal and the third input terminal of the first combinational logic unit respectively;

[0115] The first output terminal, the second output terminal, the third output terminal and the fourth output terminal of the second combinational logic unit are electrically connected to the control terminal of the second auxiliary switch, the control terminal of the first auxiliary switch, the control terminal of the fourth auxiliary switch and the control terminal of the third auxiliary switch, respectively. The logic function of the second combinational logic unit is:

[0116] Vgsub2=(Vzero'·Vspwm2)'·Vpwm2; Vgsub1=Vgsub2';

[0117] Vgsub4=(Vzero·Vspwm2)'·Vpwm2; Vgsub3=Vgsub4';

[0118] Among them, Vgsub2, Vgsub1, Vgsub4 and Vgsub3 are respectively the signals output from the first output terminal, the second output terminal, the third output terminal and the fourth output terminal of the second combinational logic unit, and Vzero, Vpwm2 and Vspwm2 are respectively the signals input to the first input terminal, the second input terminal and the third input terminal of the second combinational logic unit.

[0119] As an implementation mode, the first combinational logic unit 401 includes a first NAND gate P1, a second NAND gate P2, a third NAND gate P3, a fourth NAND gate P4, a first AND gate Q1 and a second AND gate Q2;

[0120] The first input end of the first NAND gate and the first input end of the second NAND gate are electrically connected to the first input end of the first combinational logic unit, wherein the first input end of the first NAND gate is a negation input end, the second input end of the first NAND gate and the second input end of the second NAND gate are electrically connected to the third input end of the first combinational logic unit, the output end of the first NAND gate is electrically connected to the first input end of the third NAND gate and the first input end of the first AND gate, the output end of the second NAND gate is electrically connected to the first input end of the fourth NAND gate and the first input end of the second AND gate, the second input end of the first combinational logic unit is electrically connected to the second input end of the first AND gate, the second input end of the third NAND gate, the second input end of the second AND gate and the second input end of the fourth NAND gate; the output end of the first AND gate is electrically connected to the control end of the second main switch, the output end of the third NAND gate is electrically connected to the control end of the first main switch, the output end of the second AND gate is electrically connected to the control end of the fourth main switch, and the output end of the fourth NAND gate is electrically connected to the control end of the third main switch;

[0121] The second combinational logic unit includes a fifth NAND gate P5, a sixth NAND gate P6, a seventh NAND gate P7, an eighth NAND gate P8, a third AND gate Q3 and a fourth AND gate Q4;

[0122] The first input end of the fifth NAND gate and the first input end of the sixth NAND gate are electrically connected to the first input end of the second combinational logic unit, wherein the first input end of the fifth NAND gate is a negation input end, the second input end of the fifth NAND gate and the second input end of the sixth NAND gate are electrically connected to the third input end of the second combinational logic unit, the output end of the fifth NAND gate is electrically connected to the first input end of the seventh NAND gate and the first input end of the third AND gate, the output end of the sixth NAND gate is electrically connected to the first input end of the eighth NAND gate and the first input end of the fourth AND gate, the second input end of the second combinational logic unit is electrically connected to the second input end of the third AND gate, the second input end of the seventh NAND gate, the second input end of the fourth AND gate and the second input end of the eighth NAND gate; the output end of the third AND gate is electrically connected to the control end of the second auxiliary switch, the output end of the seventh NAND gate is electrically connected to the control end of the first auxiliary switch, the output end of the fourth AND gate is electrically connected to the control end of the fourth auxiliary switch, and the output end of the eighth NAND gate is electrically connected to the control end of the third auxiliary switch.

[0123] Specifically, the first carrier signal Vtri1, the second carrier signal Vtri2, the first modulation wave signal Vsine and the second modulation wave signal Vdc can all be provided by a signal generator, the first carrier signal Vtri1 and the second carrier signal Vtri2 have a phase difference of 180 degrees, the peak values ​​are the same, and the frequencies are the same, and the corresponding pulse width signal can be generated by the corresponding comparator, that is, the analog signal is converted into a digital signal, and then the corresponding drive signal is generated by the first combination logic unit 401 or the second combination logic unit 402 to drive the corresponding switch to turn on or off, and finally the input low-voltage direct current is converted into high-voltage alternating current. The switch control module 40 has the advantages of simple structure and low cost, thereby reducing the overall cost of the power conversion device.

[0124] The embodiment of the present invention further provides a control method for a power conversion system, wherein the power conversion system is the above-mentioned power conversion system. Fig.28 A flow chart of a control method for a power conversion system provided by an embodiment of the present invention is shown in FIG. Fig.28 As shown, the method comprises:

[0125] Step S501, inputting a first modulation wave signal to a non-inverting input terminal of a first comparator, and inputting a first carrier wave signal to an inverting input terminal of the first comparator;

[0126] Step S502, inputting a second modulation wave signal to the non-inverting input terminal of the second comparator, and inputting a first carrier wave signal to the inverting input terminal of the second comparator;

[0127] Step S503, inputting the first modulation wave signal to the non-inverting input terminal of the third comparator, and inputting the second carrier wave signal to the inverting input terminal of the third comparator;

[0128] Step S504, inputting the second modulation wave signal to the non-inverting input terminal of the fourth comparator, and inputting the second carrier wave signal to the inverting input terminal of the fourth comparator;

[0129] Step S505, input the first modulated wave signal to the non-inverting input terminal of the fifth comparator, and input the reference ground signal to the inverting input terminal of the fifth comparator.

[0130] Specifically, in this embodiment, step 501, step 502, step 503, step 504 and step 505 can be performed simultaneously, the potential of the reference ground signal is zero, and the specific working process of the control method can refer to the description of the power conversion device and the power conversion system of the present invention, which will not be repeated here. The control method of the power conversion system provided by the embodiment of the present invention has a relatively simple control logic and can generate a stable AC output, which is conducive to the application of the power conversion system.

[0131] Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments described herein, and that various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A power conversion device, characterized in that: The power conversion device comprises: A direct current power supply, a first filtering network, a first backflow prevention module, a second backflow prevention module, a first switch network, a first bus capacitor, a second bus capacitor, a second switch network, a first electromagnetic isolation module, a second electromagnetic isolation module, and a second filtering network; The input end of the first filter network is electrically connected to the DC power supply, the first output end is electrically connected to the input end of the first anti-backflow module, and the second output end is electrically connected to the output end of the second anti-backflow module; the first switch network includes a first main switch, a second main switch, a second auxiliary switch and a first auxiliary switch connected in series between the positive bus and the negative bus; the second switch network includes a third main switch, a fourth main switch, a fourth auxiliary switch and a third auxiliary switch connected in series between the positive bus and the negative bus; the first bus capacitor and the second bus capacitor are connected in series between the positive bus and the negative bus; The first output end of the first backflow prevention module is connected between the first main switch and the second main switch, and the second output end is connected between the third main switch and the fourth main switch; the first input end of the second backflow prevention module is connected between the first auxiliary switch and the second auxiliary switch, and the second input end is connected between the third auxiliary switch and the fourth auxiliary switch; the first input end of the first electromagnetic isolation module is connected between the first main switch and the second main switch, the second input end is connected between the first auxiliary switch and the second auxiliary switch, the first output end is electrically connected to the first input end of the second filter network, and the second output end is electrically connected to the second output end of the second electromagnetic isolation module; The first input end of the second electromagnetic isolation module is connected between the third main switch and the fourth main switch, the second input end is connected between the third auxiliary switch and the fourth auxiliary switch, and the first output end is electrically connected to the second input end of the second filtering network; the first output end and the second output end of the second filtering network serve as the output ends of the power conversion device.

2. The power conversion device according to claim 1, characterized in that: The first filter network includes a first capacitor and a first inductor; The first end of the first capacitor serves as the first input end of the first filter network, the second end of the first capacitor serves as the second input end and the second output end of the first filter network, the first end of the first capacitor is electrically connected to the first end of the first inductor, and the second end of the first inductor serves as the first output end of the first filter network; and / or, The second filtering network includes a second inductor and a second capacitor; the first end of the second inductor serves as the first input end of the second filtering network, the second end of the second inductor is electrically connected to the first end of the second capacitor, the second end of the second inductor serves as the first output end of the second filtering network, and the second end of the second capacitor serves as the second output end of the second filtering network.

3. The power conversion device according to claim 1, characterized in that: The first backflow prevention module includes a first diode and a second diode, wherein the anode of the first diode and the anode of the second diode are electrically connected to serve as the input end of the first backflow prevention module, the cathode of the first diode serves as the first output end of the first backflow prevention module, and the cathode of the second diode serves as the second output end of the first backflow prevention module; and / or, The second anti-backcurrent module includes a third diode and a fourth diode. The cathode of the third diode is electrically connected to the cathode of the fourth diode and serves as the output end of the second anti-backcurrent module. The anode of the third diode serves as the first input end of the second anti-backcurrent module. The anode of the fourth diode serves as the second input end of the second anti-backcurrent module.

4. The power conversion device according to claim 1, characterized in that: The first electromagnetic isolation module is a first transformer; and / or, The second electromagnetic isolation module is a second transformer.

5. The power conversion device according to claim 4, characterized in that: The voltage transmission ratio of the first electromagnetic isolation module is greater than or equal to 1, and the voltage transmission ratio of the second electromagnetic isolation module is greater than or equal to 1.

6. The power conversion device according to claim 1, characterized in that: At least one of the first main switch, the second main switch, the third main switch, the fourth main switch, the first auxiliary switch, the second auxiliary switch, the third auxiliary switch, and the fourth auxiliary switch is a III-N transistor.

7. A power conversion system, characterized in that: The power conversion system comprises the power conversion device and the switch control module according to any one of claims 1 to 6; The switch control module is used to control the first main switch, the second main switch, the third main switch, the fourth main switch, the first auxiliary switch, the second auxiliary switch, the third auxiliary switch and the fourth auxiliary switch to be turned on or off.

8. The power conversion system according to claim 7, characterized in that: The switch control module includes a first comparator, a second comparator, a third comparator, a fourth comparator, a fifth comparator, a first combination logic unit and a second combination logic unit; The first comparator inputs the first modulation wave signal at the in-phase input terminal, the first carrier signal at the in-phase input terminal, and the output terminal is electrically connected to the third input terminal of the first combination logic unit; wherein, the first modulation wave signal is a sine wave signal, and the first carrier signal is a sawtooth wave signal; the second comparator inputs the second modulation wave signal at the in-phase input terminal, the first carrier signal at the in-phase input terminal, and the output terminal is electrically connected to the second input terminal of the first combination logic unit; the second modulation wave signal is a DC signal; the first modulation wave signal is input to the in-phase input terminal of the third comparator, the second carrier signal at the in-phase input terminal, and the output terminal is electrically connected to the third input terminal of the second combination logic unit; the second carrier signal is a sawtooth wave signal; the second modulation wave signal is input to the in-phase input terminal of the fourth comparator, the second modulation wave signal is input to the in-phase input terminal, the second carrier signal is input to the in-phase input terminal, and the output terminal is electrically connected to the second input terminal of the second combination logic unit; the first modulation wave signal is input to the in-phase input terminal of the fifth comparator, the reference ground signal of the switch control module is input to the in-phase input terminal, and the output terminal is electrically connected to the first input terminals of the first combination logic unit and the second combination logic unit; The first output terminal, the second output terminal, the third output terminal and the fourth output terminal of the first combination logic unit are electrically connected to the control terminal of the second main switch, the control terminal of the first main switch, the control terminal of the fourth main switch and the control terminal of the third main switch, respectively. The logic function of the first combination logic unit is: Vgs2=(Vzero'·Vspwm1)'·Vpwm1; Vgs1=Vgs2'; Vgs4=(Vzero·Vspwm1)'·Vpwm1; Vgs3=Vgs4'; Wherein, Vgs2, Vgs1, Vgs4 and Vgs3 are signals output from the first output terminal, the second output terminal, the third output terminal and the fourth output terminal of the first combinational logic unit respectively, and Vzero, Vpwm1 and Vspwm1 are signals input from the first input terminal, the second input terminal and the third input terminal of the first combinational logic unit respectively; The first output terminal, the second output terminal, the third output terminal and the fourth output terminal of the second combination logic unit are electrically connected to the control terminal of the second auxiliary switch, the control terminal of the first auxiliary switch, the control terminal of the fourth auxiliary switch and the control terminal of the third auxiliary switch, respectively. The logic function of the second combination logic unit is: Vgsub2=(Vzero'·Vspwm2)'·Vpwm2; Vgsub1=Vgsub2'; Vgsub4=(Vzero·Vspwm2)'·Vpwm2; Vgsub3=Vgsub4'; Among them, Vgsub2, Vgsub1, Vgsub4 and Vgsub3 are respectively the signals output from the first output terminal, the second output terminal, the third output terminal and the fourth output terminal of the second combinational logic unit, and Vzero, Vpwm2 and Vspwm2 are respectively the signals input to the first input terminal, the second input terminal and the third input terminal of the second combinational logic unit.

9. The power conversion system according to claim 8, characterized in that: The first combinational logic unit includes a first NAND gate, a second NAND gate, a third NAND gate, a fourth NAND gate, a first AND gate and a second AND gate; The first input end of the first NAND gate and the first input end of the second NAND gate are electrically connected to the first input end of the first combinational logic unit, wherein the first input end of the first NAND gate is a negation input end, the second input end of the first NAND gate and the second input end of the second NAND gate are electrically connected to the third input end of the first combinational logic unit, the output end of the first NAND gate is electrically connected to the first input end of the third NAND gate and the first input end of the first AND gate, the output end of the second NAND gate is electrically connected to the first input end of the fourth NAND gate and the first input end of the second AND gate, the second input end of the first combinational logic unit is electrically connected to the second input end of the first AND gate, the second input end of the third NAND gate, the second input end of the second AND gate and the second input end of the fourth NAND gate; the output end of the first AND gate is electrically connected to the control end of the second main switch, the output end of the third NAND gate is electrically connected to the control end of the first main switch, the output end of the second AND gate is electrically connected to the control end of the fourth main switch, and the output end of the fourth NAND gate is electrically connected to the control end of the third main switch; and / or, The second combinational logic unit includes a fifth NAND gate, a sixth NAND gate, a seventh NAND gate, an eighth NAND gate, a third AND gate and a fourth AND gate; The first input end of the fifth NAND gate and the first input end of the sixth NAND gate are electrically connected to the first input end of the second combination logic unit, wherein the first input end of the fifth NAND gate is a negation input end, the second input end of the fifth NAND gate and the second input end of the sixth NAND gate are electrically connected to the third input end of the second combination logic unit, the output end of the fifth NAND gate is electrically connected to the first input end of the seventh NAND gate and the first input end of the third AND gate, the output end of the sixth NAND gate is electrically connected to the first input end of the eighth NAND gate and the first input end of the fourth AND gate, the second input end of the second combination logic unit is electrically connected to the second input end of the third AND gate, the second input end of the seventh NAND gate, the second input end of the fourth AND gate and the second input end of the eighth NAND gate; the output end of the third AND gate is electrically connected to the control end of the second auxiliary switch, the output end of the seventh NAND gate is electrically connected to the control end of the first auxiliary switch, the output end of the fourth AND gate is electrically connected to the control end of the fourth auxiliary switch, and the output end of the eighth NAND gate is electrically connected to the control end of the third auxiliary switch.

10. The power conversion system according to claim 8, characterized in that: The phase difference between the first carrier signal and the second carrier signal is 180 degrees.

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