A system and method for encrypting Nand Flash simulation model

Abstract

The present invention discloses an error injection system and method for encrypting Nand Flash simulation model, comprising a data transmission state judgment module, a read / write data address judgment module, a read / write data error injection parameter input module, a read / write data error injection data input module, and a read / write data error injection module; the data transmission state judgment module is used to judge the direction of the incoming Nand Flash data stream; the read / write data address judgment module is used to determine the position of the transmitted data; the read / write data error injection parameter input module is used to input a custom error injection parameter; the read / write data error injection data input module is used to input error data injected into the data stream; and the read / write data error injection module is used to inject error data into the write data stream. The present invention does not need to modify the code of the Nand Flash model, and can perform error injection on the read and write data on the encrypted Nand Flash model interface, and the error injection parameters and the error injection data are both controllable.

Description

Technical Field

[0001] The invention relates to the field of storage, and in particular to an error injection system and method for encrypting a Nand Flash simulation model. Background Art

[0002] Nand Flash is a practical solid-state hard disk storage medium with advantages such as large capacity and fast rewrite speed, and is suitable for storing large amounts of data. However, Nand Flash also has some problems in actual applications, such as wear and tear, durability, interference caused by reading and writing, and data preservation period. These problems will cause some data bits to be reversed when reading Nand Flash data, resulting in data errors.

[0003] In the verification of Nand Flash controller chips, it is necessary to simulate the actual behavior of Nand Flash to verify the correctness and performance of each functional point of the Nand Flash controller. This requires error annotation of the data read and written by the Nand Flash model in the simulation environment. Currently, there are two methods for error annotation of Nand Flash models: the first is to call the task provided by the Nand Flash model to annotate it. This error annotation method is relatively simple and cannot meet the needs of various Nand Flash controller chips; the second is to modify its Nand Flash model to meet the verification requirements of the Nand Flash controller, but the Nand Flash models provided by some Nand Flash manufacturers are encrypted and the internal code cannot be modified. The above limitations may cause insufficient verification of Nand Flash controller chips. Summary of the invention

[0004] In view of the defects of the prior art, the present invention provides an error injection system and method for an encrypted Nand Flash simulation model, which does not require modification of the code of the Nand Flash model and can perform error injection on the read and written data on the encrypted Nand Flash model interface, and both the error injection parameters and the error injection data are controllable.

[0005] In order to solve the technical problem, the technical solution adopted by the present invention is: an error annotation system for encrypting Nand Flash simulation model, including a data transmission status judgment module, a read data address judgment module, a write data address judgment module, a read data error annotation parameter input module, a write data error annotation parameter input module, a read data error annotation data input module, a write data error annotation data input module, a read data error annotation module, and a write data error annotation module;

[0006] The data transmission state judgment module is connected to the interface of the encrypted Nand Flash simulation model, and is used to judge the direction of the incoming Nand Flash data flow and distinguish whether it is a read state or a write state;

[0007] The read data address judgment module is connected to the data transmission state judgment module, and is used to determine the position of the transmitted read data and to judge whether the current read data position is data injection error;

[0008] The write data address judgment module is connected to the data transmission state judgment module, and is used to determine the location of the transmitted write data and to judge whether the location of the current write data is wrong;

[0009] The read data error annotation parameter input module and the write data error annotation parameter input module are used to input custom error annotation parameters;

[0010] The read data error data input module and the write data error data input module are used to input error data injected into the data stream;

[0011] The read data error injection module is connected to the read data address judgment module, the read data error injection parameter input module, and the read data error injection data input module, and is used to inject error data into the read data stream, that is, inject the error data into the read data stream at the corresponding position through the previous judgment;

[0012] The write data error injection module is connected to the write data address judgment module, the write data error injection parameter input module, and the write data error injection data input module, and is used to inject error data into the write data stream, that is, inject the error data into the write data stream at the corresponding position through the previous judgment.

[0013] Furthermore, the customized error injection parameters include the position of the error injection, the range of the error injection, the data length of the error injection, and the randomness of the error injection position.

[0014] Furthermore, the error data input by the read data error data input module and the write data error data input module include all 0s, all 1s, and inversion.

[0015] Furthermore, the data transmission state judgment module samples the command of the Nand Flash and then judges whether it is a write command or a read command. If it is a write command, the direction of the data flow is write, otherwise it is read.

[0016] Furthermore, the read data address determination module and the write data address determination module determine the Plane address, Block address, Page address, and Column address of the read data and the write data.

[0017] A method for encrypting an error injection of a Nand Flash simulation model comprises the following steps:

[0018] S01) The user inputs the customized injection error parameters and injection error data;

[0019] S02), determine the direction of the incoming Nand Flash data flow to distinguish whether it is reading data or writing data; if it is writing data, execute step S03); if it is reading data, execute step S06);

[0020] S03) Determine whether the write data stream needs to be marked with an error. If it is necessary to mark an error, execute step S04). Otherwise, execute step S10);

[0021] S04), determine the location of the current write data;

[0022] S05) Determine whether the current write data needs to be annotated with an error through the parameters configured by the user. If an error is required, define the variable write_data_insert_err and set it to 1, and execute step S09), otherwise execute step S10);

[0023] S06) Determine whether the read data stream needs to be annotated, if it needs to be annotated, execute step S07), otherwise execute step S10);

[0024] S07), determine the location of the current read data;

[0025] S08) Determine whether the current read data needs to be annotated with an error through the parameters configured by the user. If an error is required, define the variable read_data_insert_err and set it to 1, and execute step S09). Otherwise, execute step S10);

[0026] S09) Inject erroneous data into this position. When write_data_insert_err or read_data_insert_err is 1, inject user-defined erroneous data;

[0027] S10), determine whether the data stream transmission is completed, if not completed, execute step S02), otherwise end.

[0028] Furthermore, the input customized error injection parameters include the position of the error injection, the range of the error injection, the data length of the error injection, and the randomness of the error injection position.

[0029] Furthermore, the input error data includes all 0s, all 1s, and inversion.

[0030] Further, step S02) determines the direction of the interface by sampling the command of the Nand Flash interface. It is necessary to define the variable rw_flag first. 1 is the write data state and 0 is the read data state. The rising edge of the sampling RE# interface signal is determined to be the read data state, and the rw_flag is assigned a value of 0. The rising edge of the sampling CLE interface signal is determined to be the write data state, and the rw_flag is assigned a value of 1.

[0031] Furthermore, the locations determined in steps S04) and S07) include Plane address, Block address, Page address, and Column address.

[0032] Beneficial effects of the present invention: Through the method described in this patent, this method does not need to modify the code of the Nand Flash model, and can perform error annotation on the read and written data on the encrypted Nand Flash model interface. Some parameters such as the error annotation data, the error annotation position, the error annotation data length, the error annotation range, etc. are all controllable, which can meet the verification of complex Nand Flash related chips and improve the completeness of the verification. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 This is a functional block diagram of the system described in Example 1;

[0034] Figure 2 This is a flow chart of the method described in Example 2. DETAILED DESCRIPTION

[0035] The present invention will be further described below in conjunction with the accompanying drawings and specific embodiments.

[0036] Example 1

[0037] This embodiment discloses a system for encrypting an error injection of a Nand Flash simulation model. Figure 1 As shown, it includes a data transmission status judgment module, a read data address judgment module, a write data address judgment module, a read data error annotation parameter input module, a write data error annotation parameter input module, a read data error annotation data input module, a write data error annotation data input module, a read data error annotation module, and a write data error annotation module.

[0038] The data transmission state judgment module is connected to the interface of the encrypted Nand Flash simulation model, and is used to judge the direction of the incoming Nand Flash data flow and distinguish whether it is a read state or a write state.

[0039] Since the Nand Flash port is a bidirectional port, in order to determine the direction of the current data flow, the data transmission status judgment module samples the Nand Flash command and then determines whether it is a write command or a read command. If it is a write command, the direction of the data flow is write, otherwise it is read.

[0040] The read data address judgment module is connected to the data transmission state judgment module, and is used to determine the position of the transmitted read data and to judge whether the current read data position is data injection error;

[0041] The write data address judgment module is connected to the data transmission state judgment module, and is used to determine the location of the transmitted write data and to judge whether the location of the current write data is wrong.

[0042] In this embodiment, the positions of the read / write data to be determined include Plane address, Block address, Page address, and Column address. Data error annotation is performed by determining the position of the current data.

[0043] The read data error annotation parameter input module and the write data error annotation parameter input module are used to input custom error annotation parameters. In this embodiment, the error annotation parameters include the error annotation position, the error annotation range, the error annotation data length (error annotation for every 2K data), and the randomness of the error annotation position (random or non-random). Users can improve the completeness of verification by adding some error annotation parameters.

[0044] The read data error injection data input module and the write data error injection data input module are used to input error data injected into the data stream. Users can customize the injected error data, and the data can be all 0, all 1, or inverted, etc.

[0045] The read data error injection module is connected to the read data address judgment module, the read data error injection parameter input module, and the read data error injection data input module, and is used to inject error data into the read data stream, that is, inject the error data into the read data stream at the corresponding position through the previous judgment.

[0046] The write data error injection module is connected to the write data address judgment module, the write data error injection parameter input module, and the write data error injection data input module, and is used to inject error data into the write data stream, that is, inject the error data into the write data stream at the corresponding position through the previous judgment.

[0047] Example 2

[0048] This embodiment discloses a method for encrypting an error injection of a Nand Flash simulation model. Figure 2 As shown, the following steps are included:

[0049] First, the user first inputs the parameters of the error, including the position of the error, the range of the error, the length of the data of the error, the randomness of the position of the error, etc., and then executes the second step.

[0050] Second, the user inputs incorrect data, which can be all 0s, all 1s, or inverted, and executes the third step.

[0051] The negation is to negate the transmitted data. If the data is changed, it is equivalent to a wrong injection. For example, if the data being transmitted is 8'h24, it will be 8'hdb after negation. If 8'hdb is injected into the data stream again, it is equivalent to negation.

[0052] Third, the direction of the interface is determined by sampling the command of the Nand Flash interface. The variable rw_flag (1 for write data state, 0 for read data state) needs to be defined first. The rising edge of the RE# interface signal is determined to be the read data state, and rw_flag is assigned a value of 0. The rising edge of the CLE interface signal is determined to be the write data state, and rw_flag is assigned a value of 1. If it is write data (rw_flag=1), execute step 4, otherwise execute step 7.

[0053] Fourth, determine whether the write data stream is incorrectly injected. If it is incorrectly injected, execute step 5, otherwise execute step 11.

[0054] Fifth, determine the location of the current write data. Determine whether the currently transmitted data is a write command (8'h80) by sampling the interface signal DQx. If it is a write command, then sample the rising and falling edges of DQS and define a variable write_cnt for counting to determine the Plane address, Block address, Page address, and Column address of the current write data. Execute step 6.

[0055] A complete data transmission includes not only the commands of writing and reading data, but also some other commands. 8'h80 is the command of writing data, followed by data. Although the state of writing data has been determined before, the location of writing data is not determined (that is, the wrong location), this step is to complete the steps of finding the wrong location.

[0056] DQS is synchronized with the transmitted data. If 10 data are transmitted, the rising and falling edges of DQS add up to 10, and they correspond one to one. DQS is a reference signal, which is used to sample data. Data transmission is in the order of colume, page, block, and plane. Therefore, by counting the rising and falling edges of DQS with a counter, the current data position, that is, the address, can be known.

[0057] Sixth, determine whether the current write data is incorrectly inserted through the parameters configured by the user. If it is incorrectly inserted, define the variable write_data_insert_err to be 1 and execute the tenth step, otherwise execute the eleventh step.

[0058] Seventh, determine whether the read data stream is incorrectly marked. If it is incorrectly marked, execute step eight, otherwise execute step eleven.

[0059] Eighth, determine the location of the current read data. Determine whether the currently transmitted data is a read command (8'he0) by sampling the interface signal DQx. If it is a read command, then sample the rising edge of DQS and define a variable read_cnt for counting to determine the Plane address, Block address, Page address, and Column address of the current write data. Execute step 9.

[0060] Ninth, determine whether the current read data is incorrectly inserted through the parameters configured by the user. If it is incorrectly inserted, define the variable read_data_insert_err to 1 and execute the tenth step, otherwise execute the eleventh step.

[0061] Tenth, the position injects the wrong data. When write_data_insert_err or read_data_insert_err is 1, the user-defined wrong data is injected. Execute step 11.

[0062] Eleventh, determine whether the data stream transmission is completed, if not, execute the third step. Otherwise, end.

[0063] This method does not require modifying the code of the Nand Flash model, and can perform error annotation on the read and written data on the encrypted Nand Flash model interface. Some parameters such as the error annotation data, the error annotation position, the error annotation data length, the error annotation range, etc. are all controllable, which can meet the verification of complex Nand Flash related chips and improve the completeness of the verification.

[0064] The above description is only the basic principle and preferred embodiments of the present invention. Improvements and substitutions made by those skilled in the art based on the present invention belong to the protection scope of the present invention.

Claims

1. A system for encrypting Nand Flash simulation models, characterized in that: It includes a data transmission status judgment module, a read data address judgment module, a write data address judgment module, a read data error annotation parameter input module, a write data error annotation parameter input module, a read data error annotation data input module, a write data error annotation data input module, a read data error annotation module, and a write data error annotation module; The data transmission state judgment module is connected to the interface of the encrypted Nand Flash simulation model, and is used to judge the direction of the incoming Nand Flash data flow and distinguish whether it is a read state or a write state; The data transmission status judgment module samples the command of Nand Flash and then judges whether it is a write command or a read command. If it is a write command, the direction of the data flow is write, otherwise it is read; The read data address judgment module is connected to the data transmission state judgment module, and is used to determine the position of the transmitted read data and to judge whether the current read data position is data injection error; The write data address judgment module is connected to the data transmission state judgment module, and is used to determine the location of the transmitted write data and to judge whether the location of the current write data is wrong; The read data error annotation parameter input module and the write data error annotation parameter input module are used to input custom error annotation parameters. The custom error annotation parameters include the error annotation position, error annotation range, error annotation data length, and randomness of the error annotation position. The read data error data input module and the write data error data input module are used to input error data injected into the data stream; The read data error injection module is connected to the read data address judgment module, the read data error injection parameter input module, and the read data error injection data input module, and is used to inject error data into the read data stream, and inject the error data into the read data stream at the corresponding position through the previous judgment; The write data error injection module is connected to the write data address judgment module, the write data error injection parameter input module, and the write data error injection data input module, and is used to inject error data into the write data stream, and inject the error data into the write data stream at the corresponding position through the previous judgment.

2. The error injection system for encrypting Nand Flash simulation model according to claim 1, characterized in that: The read data error data input module and the write data error data input module include all 0, all 1, and inversion.

3. The error injection system for encrypting Nand Flash simulation model according to claim 1, characterized in that: The read data address determination module and the write data address determination module determine the Plane address, Block address, Page address, and Column address of the read data and the write data.

4. A method for encrypting an error injection of a Nand Flash simulation model, characterized in that: The following steps are involved: S01), the user inputs the customized error injection parameters and the error injection data, the customized error injection parameters include the error injection position, the error injection range, the error injection data length, and the randomness of the error injection position; S02) Determine the direction of the incoming Nand Flash data flow by sampling the command of the Nand Flash interface to determine the direction of the interface. If it is a write command, the direction of the data flow is write, otherwise it is read; If it is to write data, execute step S03); if it is to read data, execute step S06); S03) Determine whether the write data stream needs to be marked with an error. If it needs to be marked with an error, proceed to step S04), otherwise proceed to step S10); S04), determine the location of the current write data; S05) Determine whether the current write data needs to be annotated with an error through the parameters configured by the user. If an error is required, define the variable write_data_insert_err and set it to 1, and execute step S09), otherwise execute step S10); S06) Determine whether the read data stream needs to be annotated, if it needs to be annotated, execute step S07), otherwise execute step S10); S07), determine the location of the current read data; S08) Determine whether the current read data needs to be annotated with an error through the parameters configured by the user. If an error is required, define the variable read_data_insert_err and set it to 1, and execute step S09). Otherwise, execute step S10); S09) Inject erroneous data into this position. When write_data_insert_err or read_data_insert_err is 1, inject user-defined erroneous data; S10), determine whether the data stream transmission is completed, if not completed, execute step S02), otherwise end.

5. The error injection method for encrypting a Nand Flash simulation model according to claim 4, characterized in that: The input incorrect data includes all 0s, all 1s, and inversion.

6. The error injection method for encrypting a Nand Flash simulation model according to claim 4, characterized in that: Step S02) Determine the direction of the interface by sampling the command of the Nand Flash interface. You need to define the variable rw_flag first. 1 is the write data state and 0 is the read data state. Sampling the rising edge of the RE# interface signal determines the read data state and rw_flag is assigned a value of 0. Sampling the rising edge of the CLE interface signal determines the write data state and rw_flag is assigned a value of 1.

7. The error injection method for encrypting a Nand Flash simulation model according to claim 4, characterized in that: The locations determined in steps S04) and S07) include Plane address, Block address, Page address, and Column address.

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