An input-output circuit module
By introducing independent front-stage driving unit and floating well structure circuit into the chip I/O circuit module, the backsink current problem caused by voltage differences during chip writing is solved, ensuring that there is no current backsink in the writing mode and in normal Keep the output function intact in mode, improving the application flexibility of the chip.
Patent Information
- Application Number
- CN202210863331.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2022-07-20
- Publication Date
- 2024-12-13
- Estimated Expiration
- 2042-07-20
AI Technical Summary
During the chip writing process, traditional I/O circuit modules may damage the driver tube due to voltage differences, and lose output function in the writing mode, limiting the application.
An input and output circuit module including an independent front-stage driving unit and a floating well structure circuit is designed. By charging in non-write mode and disconnecting the path between the floating well and the power supply in the write mode, the floating well voltage is equal to welding. The applied voltage on the disk pin avoids current backsinking and maintains full output function in normal mode.
It realizes the leakage current generation during chip writing, while maintaining complete input and output functions in normal working mode, increasing the versatility and flexibility of the chip.
Smart Images
Figure CN115116521B_ABST
Abstract
Description
Technical Field
[0001] The invention relates to a general and special programmable single-chip computer with embedded erasable memory and a design application module of a system-level integrated circuit chip, in particular to an input-output circuit module. Background Art
[0002] The I / O circuit is an indispensable functional module in the integrated circuit chip. It is the interface between the chip and the external environment system. It is responsible for receiving external signals into the chip and also for outputting the signals generated inside the chip to external devices.
[0003] Since the I / O circuit module is the interface between the microscopic world inside the chip and the external macroscopic environment, it also has the function of preventing external static electricity from damaging the chip, that is, the anti-static breakdown protection of the I / O circuit module, referred to as the ESD characteristic, which usually needs to reach an electrostatic simulation human body model of more than 5000V and an imitation machine model of more than 300V.
[0004] At the same time, as a module that receives external signals, it must have certain anti-interference characteristic indicators. As an output module, it must have certain driving capabilities in order to drive external devices to operate normally.
[0005] However, in an MCU or system chip with an internally integrated programmable memory, there is a pin that is specifically used for programming operations. A programming voltage higher than the internal voltage of the chip needs to be applied to this pin. In this case, this I / O circuit module must abandon part of its output function and cannot be used as a complete output module.
[0006] Figure 1 Shown is the architectural diagram of a traditional general-purpose I / O module.
[0007] The input-output module includes a buffer, an N-type transistor N0 as an output driver tube and a P-type transistor P0 as an output tube. The source of the output driver tube N0 is coupled to the ground voltage, and the drain of the driver tube P0 and the drain of the output driver tube N0 are both connected to the output pin, and the output pin is connected to the chip pad PAD, that is, the part in contact with the external environment.
[0008] First, regarding the output function, when the Dr signal is at a logic level of 1, the output driver tube N0 is turned on and the driver tube P0 is turned off. At this time, the pin outputs a logic 0 level, which is a ground signal. When the Dr signal is at a logic low level of 0, the driver tube P0 is turned on and the output driver tube N0 is turned off. The pin outputs a logic high level, which is a power supply level.
[0009] When the I / O circuit module of this structure is used as the programming pin of the embedded programmable memory, an error message will appear during the programming. Figure 2 Indicative question.
[0010] If the internal power supply of the chip is 3V, and the pin needs to add 5V high voltage to enter the programming mode during programming, then there will be a problem. The voltage of the pin is higher than the voltage of the internal power supply of the chip, which will generate a reverse current I flowing from the pin to the power supply direction. 反灌电流 This situation will lead to two consequences: one is that the voltage of the pin will be pulled down and cannot enter the programming mode, and the other is that the continuous large current generated may directly or indirectly burn the driver tube P0.
[0011] The most desirable situation is that the programming voltage is the same as the internal voltage of the chip, in which case there will be no problem. However, in reality, the programming voltage must be higher than the internal voltage of the chip, because the storage program unit inside the chip must be high voltage to be burned in.
[0012] Therefore, the I / O module used as the programming pin usually discards the driver P0, that is, adjusts it to Figure 3 The circuit structure.
[0013] In this way, there will be no leakage when high voltage is applied to the pin, and the programming mode can be entered normally. However, this port will lack normal output function and cannot output a logic high level, which greatly limits its application. Summary of the invention
[0014] It is to be understood that both the foregoing general description and the following detailed description of the present disclosure are exemplary and explanatory and are intended to provide further explanation of the disclosure.
[0015] In view of the defects of the above-mentioned prior art, the present invention provides an input-output circuit module. When a programming voltage higher than the chip power supply voltage is added during chip programming, no leakage current will be generated. At the same time, in normal working mode, it can be used as a general I / O and has complete input-output functions.
[0016] In order to achieve the above-mentioned object of the invention, the present invention discloses an input-output circuit module, characterized in that it comprises:
[0017] Independent pre-stage driving unit, used to separate the gates of output driving tube N0 and driving tube P0;
[0018] The floating well structure circuit charges the floating well when entering the non-writing mode, so that the floating well is at the same potential as the power supply voltage; when entering the writing mode, the path between the floating well and the power supply voltage is cut off, and the floating well voltage is equal to the external voltage of the pad pin.
[0019] Preferably, the present invention further provides an input-output circuit module, characterized in that the floating well structure circuit further comprises:
[0020] The first, second and third P-type transistors P1, P2 and P3 and the grounding resistor R0, the gate of the first P-type transistor P1 is connected to the power supply voltage, the source is connected to the gate of the driving transistor P0, and the drain is connected to the pad pin; the source of the second P-type transistor P2 is connected to the power supply voltage, the drain is connected to its N-well, and the gate is connected to the ground voltage through the grounding resistor R0; the gate of the third P-type transistor P3 is connected to the power supply voltage, the source is connected to the ground voltage through the grounding resistor R0, and the drain is connected to the drain of the first P-type transistor P1;
[0021] The first P-type transistor P1, the second P-type transistor P2, the third P-type transistor P3 and the driving transistor P0 are all the floating wells, and the floating wells are N floating wells.
[0022] Preferably, the present invention further provides an input-output circuit module, characterized in that the floating well structure circuit further comprises:
[0023] When entering the non-writing mode, there is no high voltage on the pad pin, the third P-type transistor P3 is turned off, the gate of the second P-type transistor P2 is pulled down through the grounding resistor R0 and is in the on state, the power supply voltage is transmitted to the N floating well, the second P-type transistor P2 is turned on, the gate of the first P-type transistor P1 is the power supply voltage, causing the first P-type transistor P1 to be in the off state, and the driving tube P0 realizes the normal I / O output function;
[0024] When entering the programming mode, a high voltage is applied to the pad pin, and the third P-type transistor P3 and the first P-type transistor P1 are turned on. At this time, the pad high voltage is loaded to the gate of the second P-type transistor P2 through the third P-type transistor P3, so that the second P-type transistor P2 is turned off, and the path between the N floating well and the power supply voltage is cut off. The pad high voltage is applied to the N floating well through P1 and P3 so that the floating well voltage is equal to the externally applied high voltage, causing the driving tube P0 to be turned off, and no current will be fed back into the power supply from the pin.
[0025] Preferably, the present invention further provides an input-output circuit module, characterized in that, in the programming mode, the external high voltage applied to the pad pin is much higher than the power supply voltage.
[0026] Preferably, the present invention further provides an input-output circuit module, characterized in that the independent pre-stage driving unit comprises:
[0027] A first buffer is connected to the gate of the driving tube P0;
[0028] The second buffer is connected to the gate of the output driving tube N0.
[0029] Preferably, the present invention further provides an input-output circuit module, characterized in that the source of the driving tube P0 is connected to the power supply voltage, the drain thereof is connected to the drain of the output driving tube N0, and the source of the output driving tube N0 is grounded.
[0030] The first, second and third P-type transistors P1, P2 and P3 are PMOS transistors.
[0031] Preferably, the present invention further provides an input-output circuit module, characterized in that the externally applied high voltage is above 7V and the power supply voltage is 5V.
[0032] The architecture design of the input / output circuit module provided by the present invention ensures that the port can be applied with high voltage for chip program burning, and can also be used as an I / O with complete output function in normal working mode, thereby increasing the versatility and flexibility of the chip. BRIEF DESCRIPTION OF THE DRAWINGS
[0033] Embodiments of the present disclosure will now be described in detail with reference to the accompanying drawings. Reference will now be made in detail to preferred embodiments of the present disclosure, examples of which are shown in the accompanying drawings. Wherever possible, the same reference numerals will be used in all drawings to represent the same or similar parts. In addition, although the terms used in the present disclosure are selected from well-known and commonly used terms, some of the terms mentioned in the present disclosure may be selected by the applicant at his or her discretion, and their detailed meanings are explained in the relevant parts of the description herein. In addition, it is required to understand the present disclosure not only by the actual terms used, but also by the meaning implied by each term.
[0034] The above and other objects, features and advantages of the present invention will become apparent to those skilled in the art from the detailed description of the present invention with reference to the accompanying drawings below.
[0035] Figure 1 This is the architecture diagram of a traditional general-purpose I / O module;
[0036] Figure 2 yes Figure 1 Schematic diagram of the problem of the architecture module in the burning program;
[0037] Figure 3 The existing technology Figure 1 An improved architecture diagram based on ;
[0038] Figure 4 It is a circuit diagram of the input and output circuit module of the present invention. DETAILED DESCRIPTION
[0039] In order to more clearly illustrate the technical solutions of the embodiments of the present application, the following is a brief introduction to the drawings required for the description of the embodiments. Obviously, the drawings described below are only some examples or embodiments of the present application. For ordinary technicians in this field, the present application can also be applied to other similar scenarios based on these drawings without creative work. Unless it is obvious from the language environment or otherwise explained, the same reference numerals in the figures represent the same structure or operation.
[0040] As shown in this application and claims, unless the context clearly indicates an exception, the words "a", "an", "an" and / or "the" do not refer to the singular and may also include the plural. Generally speaking, the terms "include" and "comprise" only indicate the inclusion of the steps and elements that have been clearly identified, and these steps and elements do not constitute an exclusive list. The method or device may also include other steps or elements.
[0041] Unless otherwise specifically stated, the relative arrangement, numerical expressions and numerical values of the parts and steps set forth in these embodiments do not limit the scope of the present application. At the same time, it should be understood that, for ease of description, the sizes of the various parts shown in the accompanying drawings are not drawn according to the actual proportional relationship. The technology, method and equipment known to those of ordinary skill in the relevant field may not be discussed in detail, but in appropriate cases, the technology, method and equipment should be considered as a part of the authorization specification. In all examples shown and discussed here, any specific value should be interpreted as being merely exemplary, rather than as a limitation. Therefore, other examples of exemplary embodiments may have different values. It should be noted that similar reference numerals and letters represent similar items in the following drawings, so that once a certain item is defined in an accompanying drawing, it does not need to be further discussed in subsequent drawings.
[0042] In the description of the present application, it should be understood that the directions or positional relationships indicated by directional words such as "front, back, up, down, left, right", "lateral, vertical, perpendicular, horizontal" and "top, bottom" are usually based on the directions or positional relationships shown in the drawings, and are only for the convenience of describing the present application and simplifying the description. Unless otherwise specified, these directional words do not indicate or imply that the device or element referred to must have a specific direction or be constructed and operated in a specific direction, and therefore cannot be understood as limiting the scope of protection of the present application; the directional words "inside and outside" refer to the inside and outside relative to the contours of each component itself.
[0043] For ease of description, spatially relative terms such as "above", "above", "on the upper surface of", "above", etc. may be used here to describe the spatial positional relationship between a device or feature and other devices or features as shown in the figure. It should be understood that spatially relative terms are intended to include different orientations of the device in use or operation in addition to the orientation described in the figure. For example, if the device in the accompanying drawings is inverted, the device described as "above other devices or structures" or "above other devices or structures" will be positioned as "below other devices or structures" or "below other devices or structures". Thus, the exemplary term "above" can include both "above" and "below". The device can also be positioned in other different ways (rotated 90 degrees or in other orientations), and the spatially relative descriptions used here are interpreted accordingly.
[0044] In addition, it should be noted that the use of words such as "first" and "second" to define components is only for the convenience of distinguishing the corresponding components. If not otherwise stated, the above words have no special meaning and cannot be understood as limiting the scope of protection of this application. In addition, although the terms used in this application are selected from well-known and commonly used terms, some terms mentioned in the specification of this application may be selected by the applicant at his or her discretion, and their detailed meanings are explained in the relevant parts of the description of this article. In addition, it is required to understand this application not only by the actual terms used, but also by the meaning implied by each term.
[0045] The I / O circuit module of the present invention is an I / O module with dedicated programming pins for a system chip of an internal programmable memory.
[0046] This circuit module can add a programming voltage higher than the chip power supply voltage when programming the chip, without generating leakage current. At the same time, in normal working mode, it can be used as a general I / O with complete input and output functions. In this way, the full-pin general I / O of the internal embedded programmable memory chip can be realized.
[0047] The improved I / O circuit module of the present invention is as follows Figure 4 .
[0048] First, the front stage of the entire circuit is separated by an independent front stage driving unit, and the independent front stage driving unit includes a first buffer buffer1 and a second buffer buffer2. Only in order to separate the gate of the driving tube P0 and the gate of the driving tube N0, the second buffer buffer2 is added to drive the output driving tube N0 separately.
[0049] In addition, the circuit of the present invention further adds first, second and third P-type transistors P1-P3, wherein the gate of the first P-type transistor P1 is connected to the power supply voltage VDD, the source is connected to the gate of the driving tube P0, and the drain of the transistor P1 is connected to the pad pin.
[0050] The source of the second P-type transistor P2 is connected to the power supply voltage VDD, the drain is connected to its N-well, and the gate is connected to the ground voltage through a resistor R0.
[0051] The gate of the third P-type transistor P3 is connected to the power supply voltage VDD, the source is connected to the gate of the second P-type transistor P2, that is, connected to the ground voltage through the resistor R0, and the drain is connected to the drain of the first P-type transistor P1, and both are connected to the pad pin.
[0052] A floating well structure is added to the circuit. Specifically, the floating well structure is used in the second, third, first P-type transistors P2, P3, P1 and the driving tube P0. These P-type transistors are made in the N-well, and the N-well constitutes the fourth terminal of these P-type transistors. The N-well is connected to other variable potentials, so that the N-well potential will float and change according to the different working states of the circuit to form a floating well structure.
[0053] The first P-type transistor P1, the second P-type transistor P2, the third P-type transistor P3 and the driving transistor P0 are all N floating wells.
[0054] Combination Figure 4 The circuit and its working principle are explained below.
[0055] When working normally, that is, in non-writing mode, the pin of the pad is not high-voltage. At this time, the third P-type transistor P3 is turned off, and the gate of the second P-type transistor P2 is connected to the ground through a pull-down resistor R0, so that the second P-type transistor P2 is in the on state, and the power supply voltage VDD is transmitted to the floating well, so that the floating well will be in the same potential state as the power supply voltage. The second P-type transistor P2 is in the on state, and the power supply voltage VDD is transmitted to the drain end of the second P-type transistor P2 and the sub end of the floating well. Because the P-type transistor is turned on at a low level, a high level is transmitted. The gate voltage of the first P-type transistor P1 is VDD, which is pulled to a high level, so the first P-type transistor P1 is in the off state and will not affect the driver tube P0.
[0056] So in this case, when Dr is logic 0, the driver tube P0 is turned on, and the logic level 1 is transmitted from the power supply to the pin of the pad, thereby realizing the normal I / O output function.
[0057] When the circuit enters the programming mode, a high voltage (here it is assumed to be 5V) is applied to the pad pin. Since the external high voltage is much higher than the power supply voltage VDD, the third P-type transistor P3 and the first P-type transistor P1 are all turned on. Due to the existence of the resistor R0, the gate voltage of the second P-type transistor P2 will be pulled up to 5V. At this time, the second P-type transistor P2 is turned off, breaking the path between the floating well and VDD. The floating well is no longer provided with a potential by the power supply voltage VDD. That is, in this high-voltage programming state, a high voltage is applied to the pad, usually above 7V, and the level of the floating well is provided by the high voltage.
[0058] Since the first P-type transistor P1 is turned on, the gate of the driver tube P0 is pulled up to 5V by the pin high voltage. At the same time, since the first P-type transistor P1 is turned on, the high voltage of the pin is also transmitted to the floating well through the first P-type transistor P1. At this time, the voltage of the floating well is also 5V. In this way, the gate and floating well of the driver tube P0 are both high voltage. Even if the pin is connected to high voltage, the driver tube P0 can be turned off, and no current will be fed back from the pin to the power supply. In this way, the programming mode can be entered normally. In other words, the gate voltage of the driver tube P0 is raised during programming, causing the driver tube P0 to be turned off, thereby preventing current backflow.
[0059] The architectural design of this input and output circuit module ensures that this port can be applied with high voltage for chip program burning, and at the same time can be used as an I / O with complete output functions in normal working mode, which increases the versatility and flexibility of the chip.
[0060] The basic concepts have been described above. Obviously, for those skilled in the art, the above invention disclosure is only used as an example and does not constitute a limitation of the present application. Although not explicitly stated herein, those skilled in the art may make various modifications, improvements and amendments to the present application. Such modifications, improvements and amendments are suggested in the present application, so such modifications, improvements and amendments still belong to the spirit and scope of the exemplary embodiments of the present application.
[0061] At the same time, the present application uses specific words to describe the embodiments of the present application. For example, "one embodiment", "an embodiment", and / or "some embodiments" refer to a certain feature, structure or characteristic related to at least one embodiment of the present application. Therefore, it should be emphasized and noted that "one embodiment" or "an embodiment" or "an alternative embodiment" mentioned twice or more in different positions in this specification does not necessarily refer to the same embodiment. In addition, some features, structures or characteristics in one or more embodiments of the present application can be appropriately combined.
[0062] Similarly, it should be noted that in order to simplify the description of the disclosure of this application and thus help understand one or more embodiments of the invention, in the above description of the embodiments of this application, multiple features are sometimes combined into one embodiment, figure or description thereof. However, this disclosure method does not mean that the features required by the object of this application are more than the features mentioned in the claims. In fact, the features of the embodiments are less than all the features of the single embodiment disclosed above.
[0063] In some embodiments, numbers describing the number of components and attributes are used. It should be understood that such numbers used in the description of the embodiments are modified by the modifiers "about", "approximately" or "substantially" in some examples. Unless otherwise specified, "about", "approximately" or "substantially" indicate that the numbers are allowed to vary by ±20%. Accordingly, in some embodiments, the numerical parameters used in the specification and claims are approximate values, which may change according to the required features of individual embodiments. In some embodiments, the numerical parameters should take into account the specified significant digits and adopt the general method of retaining digits. Although the numerical domains and parameters used to confirm the breadth of their range in some embodiments of the present application are approximate values, in specific embodiments, the setting of such numerical values is as accurate as possible within the feasible range.
[0064] Although the present application has been described with reference to the current specific embodiments, ordinary technicians in this technical field should recognize that the above embodiments are only used to illustrate the present application, and various equivalent changes or substitutions may be made without departing from the spirit of the present application. Therefore, as long as the changes and modifications to the above embodiments are within the essential spirit of the present application, they will fall within the scope of the claims of the present application.
Claims
1. An input-output circuit module, characterized in that: include: Independent pre-stage driving unit, used to separate the gates of output driving tube N0 and driving tube P0; The floating well structure circuit charges the floating well when entering the non-writing mode, so that the floating well is at the same potential as the power supply voltage; When entering the programming mode, the path between the floating well and the power supply voltage is cut off, and the floating well voltage is equal to the external voltage of the pad pin. The floating well structure circuit includes the first, second, and third P-type transistors P1, P2, and P3 and a grounding resistor R0. The gate of the first P-type transistor P1 is connected to the power supply voltage, the source is connected to the gate of the driving tube P0, and the drain is connected to the pad pin; the source of the second P-type transistor P2 is connected to the power supply voltage, the drain is connected to its N-well, and the gate is connected to the ground voltage through the grounding resistor R0; the gate of the third P-type transistor P3 is connected to the power supply voltage, the source is connected to the ground voltage through the grounding resistor R0, and the drain is connected to the drain of the first P-type transistor P1, wherein the first P-type transistor P1 and the second P-type transistor P2, the third P-type transistor P3, and the driving tube P0 are the floating well, and the floating well is an N-floating well.
2. The input-output circuit module according to claim 1, characterized in that: The floating well structure circuit further comprises: When entering the non-writing mode, the pad pin has no high voltage, the third P-type transistor P3 is turned off, the gate of the second P-type transistor P2 is pulled down through the grounding resistor R0 and is in the on state, the power supply voltage is transmitted to the N floating well, the second P-type transistor P2 is turned on, the gate of the first P-type transistor P1 is the power supply voltage, causing the first P-type transistor P1 to be in the off state, and the driving tube P0 realizes the normal I / O output function; When entering the programming mode, a high voltage is applied to the pad pin, and the third P-type transistor P3 and the first P-type transistor P1 are turned on. At this time, the high voltage applied to the pad pin is loaded to the gate of the second P-type transistor P2 through the third P-type transistor P3, so that the second P-type transistor P2 is turned off, and the path between the N floating well and the power supply voltage is cut off. The high voltage applied to the pad pin is applied to the N floating well through P1 and P3 so that the floating well voltage is equal to the high voltage, causing the driving tube P0 to be turned off, and no current will be fed back from the pin to the power supply.
3. The input-output circuit module according to claim 2, characterized in that: In the programming mode, the high voltage applied to the pad pin is higher than the power supply voltage.
4. The input-output circuit module according to claim 1, characterized in that: The independent front-stage driving unit comprises: A first buffer is connected to the gate of the driving tube P0; The second buffer is connected to the gate of the output driving tube N0.
5. The input-output circuit module according to claim 1, characterized in that: The source of the driving tube P0 is connected to the power supply voltage, and the drain thereof is connected to the drain of the output driving tube N0. The source of the output driving tube N0 is grounded. The first, second and third P-type transistors P1, P2 and P3 are PMOS tubes.
6. The input-output circuit module according to claim 3, characterized in that: The externally applied high voltage is above 7V, and the power supply voltage is 5V.