A clock signal correction method, terminal device and storage medium

Abstract

The embodiment of the present invention discloses a clock signal correction method, a terminal device and a storage medium. The present application relates to the field of clock correction technology. The clock signal correction method is applied to a terminal device, wherein the terminal device includes a cellular network module and an RSMC chip, wherein the RSMC chip includes a first clock unit, and the cellular network module and the RSMC chip are connected; the cellular network module generates a plurality of continuous second pulse signals and sends the second pulse signals to the RSMC chip; the RSMC chip receives the second pulse signal and counts the number of beats of the first clock unit during the process of receiving the second pulse signal; the RSMC chip corrects the beat cycle of the first clock unit according to the number of received second pulse signals and the statistical result of the number of beats. The present application can correct the clock signal generated locally by the RSMC chip without adding additional correction equipment or configuring a high-precision crystal oscillator module, thereby reducing production costs.

Description

Technical Field

[0001] The embodiments of the present invention relate to the technical field of clock correction, and in particular to a clock signal correction method, a terminal device and a storage medium. Background Art

[0002] The BeiDou system is a global satellite positioning and navigation system that provides all-round global navigation and positioning services at sea, on land and in the air. At present, the BeiDou system provides navigation and positioning and communication data transmission in two categories and seven types of services. This includes the RSMC (Regional Short Message Communication) service provided to China and surrounding areas. In order to achieve RSMC, the application terminal of the BeiDou system must go through satellite signal capture, tracking, bit synchronization, frame synchronization, data demodulation, telegram decoding and communication analysis. The capture of satellite signals is the first step in signal processing. This step often determines the performance of key indicators such as the application terminal's receiving sensitivity and the first capture time.

[0003] In the process of capturing satellite signals, the signals generated by local electronic products need to match the signals sent by the satellite. At present, the application terminal generally generates clock signals through the internal crystal oscillator module. The higher the accuracy of the crystal oscillator module, the more accurate the clock signal. Therefore, the capture of satellite signals is more accurate.

[0004] Existing electronic products need to generate local clock signals by adding additional calibration equipment or configuring high-precision crystal oscillator modules, which leads to high production costs. Summary of the invention

[0005] The present invention provides a clock signal correction method, a terminal device and a storage medium, which can correct the clock signal generated locally by the RSMC chip without adding additional correction equipment or configuring a high-precision crystal oscillator module, thereby reducing production costs.

[0006] In a first aspect, an embodiment of the present invention provides a clock signal correction method, which is applied to a terminal device, wherein the terminal device includes a cellular network module and an RSMC chip, wherein the RSMC chip includes a first clock unit, and the cellular network module is connected to the RSMC chip;

[0007] The cellular network module generates a number of continuous second pulse signals and sends the second pulse signals to the RSMC chip;

[0008] The RSMC chip receives the pulse-per-second signal and counts the number of beats of the first clock unit during the process of receiving the pulse-per-second signal;

[0009] The RSMC chip corrects the beating period of the first clock unit according to the statistical result of the number of received second pulse signals and the number of beating times.

[0010] In a second aspect, an embodiment of the present invention provides a terminal device, including a cellular network module and an RSMC chip, the RSMC chip includes a first clock unit, and the cellular network module is connected to the RSMC chip;

[0011] The cellular network module is used to generate a number of continuous second pulse signals and send the second pulse signals to the RSMC chip;

[0012] The RSMC chip is used to receive the pulse-per-second signal and count the number of beats of the first clock unit during the process of receiving the pulse-per-second signal;

[0013] The RSMC chip is used to correct the beating period of the first clock unit according to the statistical result of the number of received second pulse signals and the number of beating times.

[0014] In a third aspect, an embodiment of the present invention provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the clock signal correction method of the first aspect.

[0015] The above-mentioned clock signal correction method, terminal device and storage medium, the method is applied to the terminal device, the terminal device includes a cellular network module and an RSMC chip, the RSMC chip includes a first clock unit, the cellular network module and the RSMC chip are connected; the cellular network module generates a number of continuous second pulse signals, and sends the second pulse signals to the RSMC chip; the RSMC chip receives the second pulse signal, and counts the number of beats of the first clock unit in the process of receiving the second pulse signal; the RSMC chip corrects the beating cycle of the first clock unit according to the number of received second pulse signals and the statistical result of the number of beats. In the present application, after receiving the second pulse signal generated by the cellular network module, the RSMC chip can correct the beating cycle of the first clock unit according to the number of received second pulse signals and the statistical result of the number of beats of the first clock unit. Since the cellular network module is a module configured by the terminal device itself, there is no need to add additional correction equipment or configure a high-precision crystal oscillator module to correct the clock signal generated locally by the RSMC chip, thereby reducing production costs. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] Figure 1 A schematic diagram of the structure of a terminal device provided by an embodiment of the present invention;

[0017] Figure 2 A flowchart of a clock signal correction method provided by an embodiment of the present invention;

[0018] Figure 3 A schematic diagram of the structure of another terminal device provided in an embodiment of the present invention. DETAILED DESCRIPTION

[0019] The present invention will be further described in detail below in conjunction with the accompanying drawings and embodiments. It is to be understood that the specific embodiments described herein are used to explain the present invention, rather than to limit the present invention. It should also be noted that, for ease of description, only the parts related to the present invention, rather than all structures, are shown in the accompanying drawings.

[0020] It should be noted that due to space limitations, this application description does not list all optional implementation methods. After reading this application description, those skilled in the art should be able to understand that as long as the technical features do not contradict each other, any combination of technical features can constitute an optional implementation method.

[0021] The following is a detailed description of the various embodiments of the present invention.

[0022] Figure 1 A schematic diagram of the structure of a terminal device provided in an embodiment of the present invention is shown in FIG. Figure 1 As shown, an embodiment of the present invention provides a clock signal correction method, which is applied to a terminal device, the terminal device includes a cellular network module 100 and an RSMC chip 200, the RSMC chip 200 includes a first clock unit 210, and the cellular network module 100 and the RSMC chip 200 are connected.

[0023] In order to realize RSMC service, the application terminal of Beidou system must go through satellite signal capture, tracking, bit synchronization, frame synchronization, data demodulation, telegram decoding and communication analysis. In practical applications, the terminal device needs to capture the satellite signal through RSMC chip 200. At present, RSMC chip 200 includes a first clock unit 210. The first clock unit 210 is provided with a crystal oscillator. The first clock unit 210 in RSMC chip 200 has its own timing standard, and the timing in the communication process is generally completed based on the respective crystal oscillator frequencies. Different crystal oscillator types have different conventional crystal oscillator ranges. For example, the frequency range of ceramic packaged passive crystal oscillators is mainly 8MHz to 54MHz, and the frequency range of active crystal oscillators in metal packages can be 4MHz to 75MHz or 1MHz to 150MHz depending on the package size. Of course, the frequency of the crystal oscillator can also be customized as needed. In order to facilitate calculation, this embodiment describes the crystal oscillator frequency by the number of crystal oscillator beats, and describes the specific implementation process of this scheme based on this example. For example, if the crystal frequency is 120Hz, it means that the number of times the crystal in the first clock unit 210 beats per second is 120. Then, when the first clock unit 210 beats to 7200 times, it proves that 1 minute has passed. Generally speaking, the crystal beats in the first clock unit 210 will change with the change of the environment. It can be considered that the crystal beats in the first clock unit 210 are generally stable. Taking 120Hz as an example, under normal circumstances, the frequency of the crystal meets the standard frequency of 120Hz, but after long-term use, there will be deviations, so the crystal needs to be calibrated. In addition, the quality of the crystal will also cause the crystal frequency to deviate, that is, the quality of the crystal is low, which easily leads to deviation from the standard frequency of 120Hz, so that there is a deviation between the signal sent by the satellite and the signal received by the terminal device. The current RSMC chip 200 cannot independently calibrate the first clock unit 210. In the case of inaccurate timing of the crystal, the terminal device may capture the satellite signal for a long time during the satellite communication process, and the loss during the communication process may be large.

[0024] In this embodiment, the first clock unit 210 in the RSMC chip 200 can be corrected by the cellular network module 100. A cellular network, also known as a mobile network, is a mobile communication hardware architecture, which is divided into an analog cellular network and a digital cellular network. Since the signal coverage of each communication base station constituting the network coverage is hexagonal, the entire network is named like a honeycomb. The cellular network is mainly composed of three parts, namely: a mobile station, a base station subsystem, and a network subsystem. A mobile station refers to a general network terminal device, such as a mobile phone or tablet computer. The base station subsystem includes a mobile base station, a wireless transceiver, an optical fiber, and other digital devices. A mobile base station can be a signal tower. The base station subsystem is equivalent to a converter between a wireless network and a wired network. The network subsystem includes the switching function of GSM (Global System for Mobile Communications), the database function required for user data and mobility management, and security management. The network subsystem plays a management role in the communication between GSM mobile users and the communication between GSM mobile users and other communication network users. Currently, the more common cellular network types include GSM (Global System for Mobile Communications), CDMA (Code Division Multiple Access), 3G, FDMA (Frequency Division Multiple Access) and TDMA (Time division Multiple Access).

[0025] It is understandable that many terminal devices have a cellular network module 100 inside. The cellular network module 100 is connected to the base station 300 for communication to achieve data signal transmission. The data transmitted between the cellular network module 100 and the base station 300 includes time data to ensure clock synchronization between the cellular network module 100 and the base station 300, that is, the base station synchronization clock. The base station synchronization clock is a high-performance time and frequency reference receiver that can provide high-precision time and frequency synchronization signals for telecommunications, mobile communication base stations, PHS base stations, GSM network optimization and other systems. In other words, the timing between the cellular network module 100 and the base station 300 is almost the same. There are two ways for the cellular network module 100 to generate a second pulse signal. One is to generate a second pulse signal through a hardware unit provided inside. The other is to connect to the base station 300 and use the time data signal sent by the base station 300 as its corresponding clock signal. Normally, the time data sent by the base station 300 is relatively accurate, so the cellular network module 100 is also relatively accurate in using the time data signal sent by the base station 300 as the clock signal. In this embodiment, the RSMC chip 200 configured in the terminal device is connected to the cellular network module 100, so that the RSMC chip 200 can calibrate the first clock unit 210 through the cellular network module 100. The specific connection mode can be that the RSMC chip 200 is directly connected to the cellular network module 100, or the RSMC chip 200 is connected to the cellular network module 100 through a controller (not shown in the figure). For the former connection mode, the RSMC chip 200 and the cellular network module 100 directly perform data transmission; for the latter connection mode, the RSMC chip 200 and the cellular network module 100 perform data transmission through the controller.

[0026] Figure 2 A flowchart of a clock signal correction method provided by an embodiment of the present invention. Figure 2 As shown, the clock signal correction method includes:

[0027] Step S101 : the cellular network module 100 generates a number of continuous pulse-per-second signals and sends the pulse-per-second signals to the RSMC chip 200 .

[0028] A pulse signal is a discrete signal that can be used as a clock signal for various digital circuits and high-performance chips. A pulse refers to a sudden change in voltage or current that occurs in a short period of time. A second pulse refers to the number of pulses generated per second, that is, a pulse signal with a time interval of 1 second. For example, the number of times a crystal oscillator beats in 1 second.

[0029] For the cellular network module 100, the time data signal sent by the base station 300 can be used as the corresponding second pulse signal, or the second pulse signal can be generated by the internal hardware unit. Specifically, during the communication process between the base station 300 and the cellular network module 100, in order to ensure the consistency of the time of sending and receiving signals, the time data signal will be transmitted.

[0030] The cellular network module 100 can generate several continuous second pulse signals. For example, in the process of transmitting data signals with the base station 300, several continuous second pulse signals sent by the base station 300 are obtained. Alternatively, several continuous pulse signals are generated by the internal hardware unit. Then, the several continuous second pulse signals are sent to the RSMC chip 200 for reference by the RSMC chip 200 to calibrate the first clock unit 210.

[0031] Step S102: the RSMC chip 200 receives the pulse per second signal, and counts the number of beats of the first clock unit 210 during the process of receiving the pulse per second signal.

[0032] The RSMC chip 200 includes a first clock unit 210, and the first clock unit 210 generally has its own set of timing standards. Specifically, the crystal oscillator in the first clock unit 210 will beat continuously, and the number of beats per second is the second pulse generated by it. During the calibration process, when the RSMC chip 200 receives several second pulse signals sent by the cellular network module 100, it is necessary to count the number of beats of the first clock unit 210 in the process of receiving the second pulse signal. For example, during calibration, the cellular network module 100 generates 100 continuous second pulse signals and sends these 100 continuous second pulse signals to the RSMC chip 200. At this time, the RSMC chip 200 counts that the number of beats of the first clock unit 210 is 10,000 times in the process of receiving these 100 second pulses.

[0033] Step S103: The RSMC chip 200 corrects the beat period of the first clock unit 210 according to the number of received pulse per second signals and the statistical result of the beat times.

[0034] The speed of the timing of the RSMC chip 200 is related to how many times the first clock unit 210 beats for 1 second. If the number of times the first clock unit 210 beats per second is large, it proves that the time of the first clock unit 210 is faster than the normal standard time. If the number of times the first clock unit 210 beats per second is small, it proves that the time of the first clock unit 210 is slower than the normal standard time. Therefore, counting the number of times the first clock unit 210 beats is the most important correction step. In the present embodiment, the RSMC chip 200 can correct the beating cycle of the first clock unit 210 according to the number of received second pulse signals and the statistical results of the number of beatings. It can be understood that the beating cycle can be expressed as the number of times the first clock unit 210 beats per second pulse, that is, how many time intervals the first clock unit 210 beats once. For example, before the first clock unit 210 in the RSMC chip 200 is corrected, the internally recorded operating frequency is 90Hz, that is, the number of times the beating is set to 90 times in one second, and in the working process, the time interval of each beating is 1 / 90 seconds for timing. During calibration, the cellular network module 100 sends 100 continuous second pulse signals to the RSMC chip 200, that is, confirms the duration of 100s with relatively high accuracy. In the process of receiving these 100 second pulses (i.e., within 100s), the RSMC chip 200 counts that the number of beats of the first clock unit 210 is 10,000 times. Based on these 100 second pulses and the number of beats of 10,000 times, it can be confirmed that the first clock unit 210 has 10,000 beat intervals within 100s. According to the statistical results of the received second pulse signals and the number of beats, it can be obtained that the average interval duration of each beat of the first clock unit 210 is 1 / 100 second. Based on this, it can be confirmed that the actual beat period of the first clock unit 210 is 1 / 100 second, that is, the actual beat frequency is 100Hz. Accordingly, the originally recorded operating frequency of 90Hz is modified to 100Hz to complete the calibration. During the calibrated operation, the time interval between each beat is 1 / 100 second.

[0035] In a specific implementation process, the cellular network module 100 includes an analog timing unit 110, and step S101 is implemented by steps S1011-step S1012, and steps S1011-step S1012 include:

[0036] Step S1011: Receive a clock reference signal sent by the base station 300.

[0037] Step S1012: Generate a plurality of continuous second pulse signals through the analog timing unit 110 according to the clock reference signal.

[0038] The cellular network module 100 may be provided with an analog timing unit 110, and a plurality of continuous second pulse signals may be generated by the analog timing unit 110. Since the timing of the analog timing unit 110 is not accurate, other signals may be used as references to generate relatively accurate continuous second pulses according to the reference signals. The cellular network module 100 in this embodiment may generate a plurality of continuous second pulse signals according to the clock reference signal sent by the base station 300 through the analog timing unit 110.

[0039] In the specific implementation process, step S1012 can be implemented as follows:

[0040] According to the clock reference signal, at least three consecutive second pulse signals are generated by the analog timing unit 110 .

[0041] Correspondingly, step S103 can be implemented as follows:

[0042] The RSMC chip 200 receives at least three consecutive second pulse signals, and counts the number of beats of the first clock unit 210 during the process of receiving at least three consecutive second pulse signals.

[0043] Since the pulse-per-second signal generated by the analog timing unit 110 may have errors, if the RSMC chip 200 directly generates a pulse-per-second signal according to the analog timing unit 110, the first clock unit 210 is corrected, that is, the number of beats of the first clock unit is counted within 1 second of the analog timing unit timing, and no statistics are performed based on multiple pulse-per-second signals, resulting in deviations in the correction. Therefore, the analog timing unit 110 in this embodiment needs to generate at least three consecutive pulse-per-second signals. In the process of receiving the pulse-per-second signal generated by the analog timing unit 110, the RSMC chip 200 needs to count the number of beats of the first clock unit 210. For example, the analog timing unit 110 generates four consecutive second pulse signals (i.e., 4 seconds). The RSMC chip 200 counts the number of beats of the first clock unit 210 as 400 times during the process of receiving the four consecutive second pulse signals. Therefore, based on the statistical results of the four consecutive second pulse signals and the 400 beats, it can be obtained that the average interval between each beat of the first clock unit 210 is 1 / 100 second, that is, the actual beat frequency is 100 Hz. Therefore, the 100 Hz is used as the beat period of the first clock unit 210 to correct the beat period of the first clock unit 210, so that the first clock unit is timed according to the time interval of each beat of 1 / 100 second.

[0044] In a specific implementation process, the cellular network module 100 includes a second clock unit 120, and step S101 can be implemented as follows:

[0045] The cellular network module 100 generates two consecutive second pulse signals through the second clock unit 120 .

[0046] Correspondingly, step S103 can be implemented as follows:

[0047] The RSMC chip 200 receives two consecutive second pulse signals, and counts the number of beats of the first clock unit 210 during the process of receiving the two consecutive second pulse signals.

[0048] like Figure 3 As shown, under normal circumstances, the cellular network module 100 can be provided with a second clock unit 120, and the second clock unit 120 is provided with a crystal oscillator, and its timing standard is the same as the first clock unit 210, that is, how many times the crystal oscillator beats for 1 second, that is, the crystal oscillator frequency. If the second clock unit beats N times for 1 second, then when the second clock unit 120 beats 5N times, it can be timed as 5 seconds. The cellular network module 100 can achieve timing through the second clock unit 120. Since the cellular network module 100 and the base station 300 can achieve clock synchronization, the second pulse signal generated by the second clock unit 120 is relatively consistent with the clock signal sent by the base station 300. For the second clock unit 120, it can keep synchronization with the clock of the base station 300, so the second pulse signal generated by the second clock unit 120 is generally more accurate. Based on this, the RSMC chip 200 in this embodiment can use the second pulse signal generated by the second clock unit 120 as a reference for correcting the first clock unit 210. Specifically, the cellular network module 100 generates two consecutive second pulse signals through the second clock unit 120, and the RSMC chip 200 counts the number of beats of the first clock unit 210 during the process of receiving the two consecutive second pulse signals. For example, the RSMC chip 200 counts that the first clock unit 210 beats 100 times in the two consecutive second pulse signals.

[0049] In the specific implementation process, step S103 can be implemented as follows:

[0050] The RSMC chip 200 calculates the average interval between two adjacent beats based on the number of received second pulse signals and the statistical result of the beat times, and obtains the corrected beat cycle.

[0051] It is understandable that, in this embodiment, after receiving the second pulse signal and counting the number of beats of the first clock unit, the average interval between two adjacent beats can be calculated based on the mathematical application formula, that is, the time for the first clock unit 210 to beat once. For example, the RSMC chip 200 receives 10 second pulse signals and counts that the first clock unit 210 beats 1100 times in the process of receiving these 10 second pulse signals. Then, based on the mathematical application formula, the result of 10 / 1100 can be calculated to be 1 / 110, that is, the time for the first clock unit 210 to beat once is 1 / 110 seconds, so that the first clock unit 210 can be timed according to the time interval of each beat being 1 / 110 seconds.

[0052] In the specific implementation process, it also includes:

[0053] Step S100: The RSMC chip 200 captures satellite signals based on the corrected jitter period.

[0054] It is understandable that after the first clock unit 210 in the RSMC chip 200 is corrected, the timing of the first clock unit 210 is also updated. When the RSMC chip 200 needs to capture the satellite signal, the satellite signal is captured based on the corrected beating cycle to reduce the deviation between the signal sent by the satellite and the signal received by the terminal device. Specifically, if the original first clock unit 210 is to time each beating time as 1 / 90 second, after the cellular network module 100 is corrected, the time of each beating is 1 / 110 second, then the first clock unit 210 is to time each beating time as 1 / 110 second. Based on this, the RSMC chip 200 captures the satellite signal according to the time of each beating of the first clock unit 210 as 1 / 110 second.

[0055] In the specific implementation process, it also includes:

[0056] Step S104: Compare the corrected beating cycles corresponding to the most recent preset number of calibrations, and determine the time for the next calibration based on the comparison result.

[0057] The timing of the first clock unit 210 in the RSMC chip 200 is relatively stable within a short period of time after calibration, and will not change too much. However, since the terminal device is widely used, the surrounding environment changes greatly and is uncertain, which causes the timing of the first clock unit 210 to change easily due to changes in the surrounding environment. For example, impact or humidity in the surrounding environment will affect the state of the internal crystal oscillator of the first clock unit 210. Therefore, this embodiment needs to calibrate the first clock unit 210 regularly. The calibration time can be a preset fixed time, that is, calibration is performed regularly; or it can be based on the corrected beating cycle corresponding to the latest preset calibration number of the first clock unit 210 to confirm the time of the next calibration. In other words, instead of regular calibration, dynamic calibration is performed based on the historical calibration data of the first clock unit 210. This can avoid calibration too frequently and increase the unnecessary calibration number, and can also avoid the calibration time interval being too long, resulting in deviations in the RSMC chip 200 and the satellite in the process of sending and receiving signals.

[0058] In the specific implementation process, step S104 can be implemented by steps S1041 to S1043, and steps S1041 to S1043 include:

[0059] Step S1041: Compare the corrected beating periods corresponding to the most recent preset number of calibrations to confirm whether the corrected beating periods are consistent.

[0060] Step S1042: When the beating period after each calibration is consistent, extend the interval between the next calibration and the current calibration.

[0061] Step S1041: When the beating cycles after each calibration are inconsistent, shorten the interval between the next calibration and the current calibration.

[0062] In this embodiment, when the beating cycle of the first clock unit 210 after each correction is consistent, it means that the beating state of the crystal oscillator in the first clock unit 210 is relatively stable. Therefore, the interval between the next correction and the current correction can be appropriately extended. When the beating cycle of the first clock unit 210 after each correction is inconsistent, it means that the beating state of the crystal oscillator in the first clock unit 210 is unstable, and the time of each beating is different, resulting in inconsistent beating cycles after correction. At this time, the interval between the next correction and the current correction can be appropriately shortened, thereby increasing the number of corrections to the first clock unit 210.

[0063] Figure 1 A schematic diagram of a terminal device provided in an embodiment of the present invention, referring to Figure 1The terminal device includes a cellular network module 100 and an RSMC chip 200, the RSMC chip 200 includes a first clock unit 210, and the cellular network module 100 and the RSMC chip 200 are connected.

[0064] Among them, the cellular network module 100 is used to generate a number of continuous second pulse signals and send the second pulse signals to the RSMC chip 200; the RSMC chip 200 is used to receive the second pulse signal and count the number of beats of the first clock unit 210 during the process of receiving the second pulse signal; the RSMC chip 200 is used to correct the beating period of the first clock unit 210 according to the number of received second pulse signals and the statistical results of the number of beats.

[0065] On the basis of the above-mentioned embodiment, the cellular network module 100 includes an analog timing unit 110, a receiving unit and a generating unit.

[0066] The receiving unit is used to receive the clock reference signal sent by the base station 300.

[0067] The generating unit is used to generate a plurality of continuous second pulse signals through the analog timing unit 110 according to the clock reference signal.

[0068] Based on the above embodiment, the generating unit is specifically used for:

[0069] According to the clock reference signal, at least three consecutive second pulse signals are generated by the analog timing unit 110 .

[0070] Correspondingly, the RSMC chip 200 is specifically used for:

[0071] At least three consecutive second pulse signals are received, and the number of beats of the first clock unit 210 is counted during the process of receiving the at least three consecutive second pulse signals.

[0072] On the basis of the above embodiment, the cellular network module 100 includes a second clock unit 120 .

[0073] The second clock unit 120 is used to generate two consecutive second pulse signals.

[0074] Correspondingly, the RSMC chip 200 is specifically used for:

[0075] Two consecutive second pulse signals are received, and the number of beats of the first clock unit 210 is counted during the process of receiving the two consecutive second pulse signals.

[0076] Based on the above embodiment, the RSMC chip 200 is specifically used for:

[0077] According to the statistical results of the number of received second pulse signals and the number of beats, the average interval between two adjacent beats is calculated to obtain the corrected beat period.

[0078] Based on the above embodiment, the RSMC chip 200 is further used to capture satellite signals based on the corrected jitter period.

[0079] Based on the above embodiment, it also includes:

[0080] The confirmation unit is used to compare the corrected beating cycle corresponding to the latest preset number of corrections, and confirm the time of the next correction according to the comparison result.

[0081] Based on the above embodiment, the confirmation unit includes:

[0082] The comparison unit is used to compare the corrected beating cycles corresponding to the latest preset number of corrections to confirm whether the beating cycles after each correction are consistent.

[0083] The time extension unit is used to extend the interval between the next calibration and the current calibration when the beating cycle after each calibration is consistent.

[0084] The time shortening unit is used to shorten the interval between the next calibration and the current calibration when the beating cycle after each calibration is inconsistent.

[0085] The terminal device provided in the embodiment of the present invention can be used to execute the corresponding clock signal correction method provided in the above embodiment, and has corresponding functions and beneficial effects.

[0086] It is worth noting that in the embodiment of the above-mentioned terminal device, the various units and modules included are only divided according to functional logic, but are not limited to the above-mentioned division, as long as the corresponding functions can be realized; in addition, the specific names of the functional units are only for the convenience of distinguishing each other, and are not used to limit the scope of protection of the present invention.

[0087] An embodiment of the present invention also provides a computer-readable storage medium on which a computer program is stored. When the computer program is executed by a processor, it is used to perform relevant operations in the clock signal correction method provided in any embodiment of the present application, and has corresponding functions and beneficial effects.

[0088] Those skilled in the art should understand that the embodiments of the present application may be provided as methods, systems, or computer program products.

[0089] Therefore, the present application may take the form of a complete hardware embodiment, a complete software embodiment, or an embodiment combining software and hardware. Moreover, the present application may take the form of a computer program product implemented on one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) containing computer-usable program code. The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the functions in the process. Figure 1 A process or multiple processes and / or boxes Figure 1 These computer program instructions can also be stored in a computer-readable memory that can guide a computer or other programmable data processing device to work in a specific way, so that the instructions stored in the computer-readable memory produce a product including an instruction device, which implements the functions specified in the process. Figure 1 A process or multiple processes and / or boxes Figure 1 These computer program instructions can also be loaded onto a computer or other programmable data processing device, so that a series of operation steps are executed on the computer or other programmable device to produce a computer-implemented process, so that the instructions executed on the computer or other programmable device provide for implementing the process in the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0090] In a typical configuration, a computing device includes one or more processors (CPU), input / output interfaces, network interfaces, and memory. The memory may include non-permanent memory in a computer-readable medium, random access memory (RAM) and / or non-volatile memory in the form of read-only memory (ROM) or flash RAM. The memory is an example of a computer-readable medium.

[0091] Computer readable media include permanent and non-permanent, removable and non-removable media that can be implemented by any method or technology to store information. Information can be computer readable instructions, data structures, program modules or other data. Examples of computer storage media include, but are not limited to, phase change memory (PRAM), static random access memory (SRAM), dynamic random access memory (DRAM), other types of random access memory (RAM), read-only memory (ROM), electrically erasable programmable read-only memory (EEPROM), flash memory or other memory technology, compact disk read-only memory (CD-ROM), digital versatile disk (DVD) or other optical storage, magnetic cassettes, magnetic tape magnetic disk storage or other magnetic storage devices or any other non-transmission media that can be used to store information that can be accessed by a computing device. As defined herein, computer readable media does not include temporary computer readable media (transitory media), such as modulated data signals and carrier waves.

[0092] It should also be noted that the terms "include", "comprises" or any other variations thereof are intended to cover non-exclusive inclusion, so that a process, method, commodity or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, commodity or device. In the absence of more restrictions, the elements defined by the sentence "comprises a ..." do not exclude the existence of other identical elements in the process, method, commodity or device including the elements.

[0093] Note that the above are only preferred embodiments of the present invention and the technical principles used. Those skilled in the art will understand that the present invention is not limited to the specific embodiments herein, and that various obvious changes, readjustments and substitutions can be made by those skilled in the art without departing from the scope of protection of the present invention. Therefore, although the present invention has been described in more detail through the above embodiments, the present invention is not limited to the above embodiments, and may include more other equivalent embodiments without departing from the concept of the present invention, and the scope of the present invention is determined by the scope of the appended claims.

Claims

1. A clock signal correction method, characterized in that: Applied to a terminal device, the terminal device comprises a cellular network module and an RSMC chip, the RSMC chip comprises a first clock unit, and the cellular network module is connected to the RSMC chip; The cellular network module generates a plurality of continuous second pulse signals and sends the second pulse signals to the RSMC chip; The RSMC chip receives the second pulse signal, and counts the number of beats of the first clock unit during the process of receiving the second pulse signal; The RSMC chip corrects the beating period of the first clock unit according to the number of the received second pulse signals and the statistical result of the beating times; The corrected beating cycles corresponding to the most recent preset number of corrections are compared, and the time for the next correction is determined based on the comparison result.

2. The clock signal correction method according to claim 1, characterized in that: The cellular network module includes an analog timing unit; The cellular network module generates a plurality of continuous second pulse signals, including: receiving a clock reference signal sent by a base station; According to the clock reference signal, a plurality of continuous second pulse signals are generated by the analog timing unit.

3. The clock signal correction method according to claim 2, characterized in that: The step of generating a plurality of continuous second pulse signals by the analog timing unit according to the clock reference signal comprises: generating at least three consecutive second pulse signals through the analog timing unit according to the clock reference signal; Correspondingly, the RSMC chip receives the second pulse signal and counts the number of beats of the first clock unit in the process of receiving the second pulse signal, including: The RSMC chip receives the at least three consecutive second pulse signals, and counts the number of beats of the first clock unit during the process of receiving the at least three consecutive second pulse signals.

4. The clock signal correction method according to claim 1, characterized in that: The cellular network module includes a second clock unit; The cellular network module generates a plurality of continuous second pulse signals, including: The cellular network module generates two consecutive second pulse signals through the second clock unit; Correspondingly, the RSMC chip receives the second pulse signal and counts the number of beats of the first clock unit in the process of receiving the second pulse signal, including: The RSMC chip receives the two consecutive second pulse signals, and counts the number of beats of the first clock unit during the process of receiving the two consecutive second pulse signals.

5. The clock signal correction method according to claim 1, characterized in that: The RSMC chip corrects the beating period of the first clock unit according to the number of the received second pulse signals and the statistical result of the beating times, including: The RSMC chip calculates the average interval between two adjacent beats based on the number of received second pulse signals and the statistical result of the beat times, and obtains the corrected beat cycle.

6. The clock signal correction method according to claim 1, characterized in that: Also includes: The RSMC chip captures the satellite signal based on the corrected jitter period.

7. The clock signal correction method according to any one of claims 1 to 5, characterized in that: The step of comparing the corrected beating cycles corresponding to the most recent preset number of corrections and determining the time for the next correction according to the comparison result includes: Compare the corrected beating cycles corresponding to the most recent preset calibration times to confirm whether the beating cycles after each calibration are consistent; When the beating cycle after each calibration is consistent, extend the interval between the next calibration and the current calibration; When the beating period after each calibration is inconsistent, shorten the interval between the next calibration and the current calibration.

8. A terminal device, characterized in that: It includes a cellular network module and an RSMC chip, wherein the RSMC chip includes a first clock unit, and the cellular network module is connected to the RSMC chip; The cellular network module is used to generate a plurality of continuous second pulse signals and send the second pulse signals to the RSMC chip; The RSMC chip is used to receive the second pulse signal and count the number of beats of the first clock unit during the process of receiving the second pulse signal; The RSMC chip is used to correct the beating period of the first clock unit according to the number of the received second pulse signals and the statistical result of the beating times; The RSMC chip is used to compare the corrected beating cycles corresponding to the most recent preset number of corrections, and to determine the time for the next correction according to the comparison result.

9. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed by a processor, the clock signal correction method as described in any one of claims 1 to 7 is implemented.

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