An integrated controller based on multiple monitoring channels

Abstract

The embodiment of the present application provides an integrated controller based on multiple monitoring channels, including a watchdog circuit and a processor circuit. The watchdog circuit is used to receive a status signal output by the processor circuit, and to perform a reset operation on the processor circuit when the status signal is a status abnormality signal; the processor circuit is configured with a master control unit and at least one slave control unit, and the master control unit is also connected to the slave control unit signal through an internal monitoring channel and an external monitoring channel respectively, and the master control unit and / or the slave control unit perform a reset preprocessing operation based on a first abnormal signal of the internal monitoring channel and a second abnormal signal of the external monitoring, and when the reset preprocessing operation is completed, the master control unit sends a status abnormality signal to the master monitoring channel. In this way, the normally operating control unit can perform a reset preprocessing operation in time when passively restarting, thereby improving the operating stability of the integrated controller.

Description

Technical Field

[0001] The present application relates to the field of vehicle technology, and in particular to an integrated controller based on multiple monitoring channels. Background Art

[0002] Integrated controllers generally consist of a control chip and a watchdog circuit, which is used to monitor the overall operation of the control chip. When a control unit in the control chip operates abnormally, the watchdog will reset the control chip. At this time, other control units that are operating normally cannot perform corresponding operations during passive reset, resulting in poor operating stability of the integrated controller. Summary of the invention

[0003] In order to solve the above problems, the present application provides an integrated controller based on multiple monitoring channels to solve the problem of poor operating stability of existing integrated controllers.

[0004] In view of this, the present application discloses an integrated controller based on multiple monitoring channels, the integrated controller comprising a watchdog circuit and a processor circuit, wherein:

[0005] The watchdog circuit is connected to the processor circuit, and is used to receive a status signal output by the processor circuit, and to perform a reset operation on the processor circuit when the status signal is a status abnormality signal;

[0006] The processor circuit is configured with a main control unit and at least one slave control unit. The main control unit is signal-connected to the watchdog circuit via a main monitoring channel. The main control unit is also signal-connected to the slave control unit via an internal monitoring channel and an external monitoring channel, respectively. The main control unit and / or the slave control unit performs a reset preprocessing operation based on a first abnormal signal of the internal monitoring channel and a second abnormal signal of the external monitoring channel. When the reset preprocessing operation is completed, the main control unit sends the status abnormality signal to the main monitoring channel.

[0007] Optionally, the master control unit and the slave control unit correspond to different reset preprocessing operations, and different slave control units correspond to different reset preprocessing operations.

[0008] Optionally, the reset preprocessing operation includes recording working status information, locking the working status, generating driving safety control instructions, and stopping execution of related actions affected by the reset, or a combination thereof.

[0009] Optionally, the two slave control units are connected by signals via the internal monitoring channel and the external monitoring channel.

[0010] Optionally, when the slave control unit determines that the master control unit is abnormal based on the first abnormal signal and the second abnormal signal, the slave control unit performs a reset preprocessing operation corresponding to the slave control unit.

[0011] Optionally, when the master control unit determines that the slave control unit is abnormal based on the first abnormal signal and the second abnormal signal, the master control unit performs a reset preprocessing operation corresponding to the master control unit.

[0012] Optionally, when there are multiple slave control units, at least a first slave control unit and a second slave control unit are included, wherein:

[0013] When the master control unit determines that the first slave control unit is abnormal according to the first abnormal signal and the second abnormal signal, the master control unit sends a notification message to the second slave control unit so that the second slave control unit performs a corresponding reset preprocessing operation.

[0014] Optionally, when the second slave control unit determines that the first slave control unit is abnormal based on the first abnormal signal and the second abnormal signal of the first slave control unit, the second slave control unit performs a reset preprocessing operation corresponding to the second slave control unit.

[0015] Optionally, the processor circuit includes multiple cores, and the cores are respectively configured as the master control unit or the slave control unit; the internal monitoring channel between the cores includes an inter-core communication module; the external monitoring channel between the cores is a CAN bus; the master monitoring channel is a serial communication bus; the master control unit includes a motor controller, and the slave control unit includes a vehicle controller and / or a battery management controller.

[0016] A vehicle is also provided, which includes the above-provided integrated controller based on multiple monitoring channels.

[0017] It can be seen from the above technical solution that the present application provides an integrated controller based on multiple monitoring channels, including a watchdog circuit and a processor circuit. The watchdog circuit is used to receive the status signal output by the processor circuit, and to perform a reset operation on the processor circuit when the status signal is a status abnormality signal; the processor circuit is configured with a main control unit and at least one slave control unit, and the main control unit is also connected to the slave control unit signal through the internal monitoring channel and the external monitoring channel respectively, and the main control unit and / or the slave control unit perform a reset preprocessing operation based on the first abnormal signal of the internal monitoring channel and the second abnormal signal of the external monitoring, and when the reset preprocessing operation is completed, the main control unit sends a status abnormality signal to the main monitoring channel. In this way, the normally operating control unit can perform a reset preprocessing operation in time when passively restarting, thereby improving the operating stability of the integrated controller.

[0018] In addition, by monitoring the internal and external monitoring channels to determine the abnormality of the control unit, it is possible to avoid judging the normal state as an abnormal state, thereby avoiding affecting the stable operation of the system due to misjudgment. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0020] Figure 1 A block diagram of an integrated controller based on multiple monitoring channels according to an embodiment of the present application;

[0021] Figure 2 This is a block diagram of another integrated controller based on multiple monitoring channels according to an embodiment of the present application. DETAILED DESCRIPTION

[0022] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0023] Embodiment 1

[0024] Figure 1 This is a block diagram of an integrated controller based on multiple monitoring channels according to an embodiment of the present application.

[0025] Reference Figure 1 As shown, the integrated controller provided in this embodiment implements security monitoring based on multiple monitoring channels, including at least one watchdog circuit 100 and a processor circuit 200. This application uses a watchdog circuit as an example to illustrate the integrated controller.

[0026] The watchdog circuit and the processor circuit are in the same working environment, or on the same circuit board, and the two are not only electrically connected through a power line, but also signal connected through a corresponding signal line. When the state signal received by the watchdog circuit from the processor circuit is a state abnormality signal, that is, when the received signal reflects that the processor circuit is abnormal, the reset control signal is output to the processor circuit to control the processor circuit to perform a reset operation.

[0027] The processor circuit is built based on a general-purpose processor or a special-purpose processor, such as a single-chip microcomputer, which includes not only the general-purpose processor or the special-purpose processor itself, but also corresponding peripheral circuits, such as power supply circuits, resistors, capacitors or other chips. The processor circuit is configured with at least one main control unit 10 and one or more slave control units 20. The internal monitoring channel and the external monitoring channel between the main control unit and the slave control unit are connected. In this embodiment, two slave control units 20 are used as an example to illustrate the technical solution of this application.

[0028] The master control unit is connected to the watchdog circuit via the master monitoring channel 300, is internally connected to each slave control unit via the internal monitoring channel 11, and is externally connected to each slave control unit via the external monitoring channel 12. The external monitoring here is established through the external communication port of the processor circuit and the corresponding external circuit. That is, each slave control unit is connected to the master control unit by a signal through an internal monitoring channel, and is also connected to the master control unit by a separate external monitoring channel.

[0029] When the master control unit receives the first abnormal signal sent by the corresponding slave control unit through the internal monitoring channel, it monitors the external monitoring channel connected to the slave control unit. If the second abnormal signal is detected at this time, it is determined that the corresponding slave control unit is abnormal, that is, it is necessary to perform a corresponding reset operation. When the master control unit determines that any slave control unit is abnormal, it promptly performs a corresponding reset preprocessing operation.

[0030] In addition, when any slave control unit determines that an abnormality has occurred in the master control unit according to the above mechanism, a corresponding reset preprocessing operation is performed in a timely manner. The reset preprocessing operation in this application refers to a set of predetermined interrupt operations, including but not limited to recording the node position of program execution, recording the data or information in the register or temporary storage unit, so that the corresponding control unit starts executing the program from the node position after the reset is completed, and loads the corresponding data or information from the storage unit into the corresponding register or temporary storage unit, that is, avoiding the corresponding control unit from erroneous execution, or obtaining an abnormal processing result.

[0031] In the present application, the reset preprocessing operation includes recording the reset situation and working conditions, locking certain working states, stopping the execution of certain actions, etc.

[0032] In the specific implementation, by recording the reset situation and operating conditions, it is possible to determine whether to re-execute the corresponding program according to the saved operating conditions after the reset is completed. For example, the throttle, brake, and gear status before the reset are recorded, and the program is executed according to these recorded status after the reset is completed. This can prevent the vehicle state from being unstable due to sudden changes in the state after the reset.

[0033] Recording and locking certain working states includes recording and locking the on and off states of equipment such as water pumps and fans to prevent reset from causing water pump and fan shutdown. This way, there is no need to restart after reset, avoiding repeated switching of working states and reducing electrical losses.

[0034] In addition, the reset preprocessing operation can also determine whether to perform speed limit processing before resetting according to actual needs, and send a torque limit instruction to the engine controller or motor controller when necessary to ensure the safety of vehicle driving. It can also include stopping communication to prevent the reset from interfering with the communication network, and stopping reading and writing to the storage unit to prevent the reset from damaging the memory or generating erroneous data.

[0035] It can be seen from the above technical solution that this embodiment provides an integrated controller, including a watchdog circuit and a processor circuit. The watchdog circuit is used to receive the status signal output by the processor circuit, and perform a reset operation on the processor circuit when the status signal is a status abnormality signal; the processor circuit is configured with a main control unit and at least one slave control unit, and the main control unit is also connected to the slave control unit signal through an internal monitoring channel and an external monitoring channel respectively, and the main control unit and / or the slave control unit perform a reset preprocessing operation based on the first abnormal signal of the internal monitoring channel and the second abnormal signal of the external monitoring, and when the reset preprocessing operation is completed, the main control unit sends a status abnormality signal to the main monitoring channel. In this way, the normally operating control unit can perform a reset preprocessing operation in time when passively restarting, thereby improving the operating stability of the integrated controller.

[0036] In addition, by monitoring the internal and external monitoring channels to determine the abnormality of the control unit, it is possible to avoid judging the normal state as an abnormal state, thereby avoiding affecting the stable operation of the system due to misjudgment.

[0037] The integrated control in this application can operate in an autonomous learning mode and / or a passive notification mode when performing corresponding security monitoring.

[0038] When working in the autonomous learning mode, when any slave control unit determines that the master control unit has an abnormality and needs to be reset through signal monitoring of the internal monitoring channel and the external monitoring channel, it will promptly perform the reset preprocessing operation, that is, save the node position, data and information, so as to restart the program from the node position after the reset is completed. And if there are other slave control units, it will control other slave control units to perform corresponding reset preprocessing operations at the same time.

[0039] When working in the passive notification mode, when the master control unit determines that a slave control unit has an abnormality and needs to be reset through monitoring the internal monitoring channel and the external monitoring channel, the corresponding reset preprocessing operation is performed in time, so that the program can be restarted from the saved node position after the reset is completed. In addition, when there are other slave control units, when performing the reset preprocessing operation, other slave control units are notified to perform corresponding reset preprocessing operations.

[0040] The master control unit and slave control unit in the above embodiments can be understood as functional modules obtained by software configuration in a processor circuit, and can also be hardware units, such as cores in a general-purpose processor or a special-purpose processor. Based on the hardware core, we propose the following embodiments.

[0041] Embodiment 2

[0042] Figure 2 This is a block diagram of another integrated controller based on multiple monitoring channels according to an embodiment of the present application.

[0043] Reference Figure 2 As shown, the integrated controller provided in this embodiment includes a watchdog circuit 100 and a processor circuit 200. The watchdog circuit in this embodiment can perform the same operations as the watchdog circuit in the previous embodiment, and the processor circuit in this embodiment is used to perform the same operations as the processor circuit in the previous embodiment.

[0044] The processor circuit in this embodiment includes a first core CPU1 and at least one second core CPU2. The first core is equivalent to the master control unit in the previous embodiment, and the second core is equivalent to the slave control unit in the previous embodiment.

[0045] The first core is connected to the watchdog circuit via the SPI serial communication interface of the processor circuit, thereby forming the main monitoring channel. The first core in this embodiment is connected to the second core via the inter-core communication module. The first core is also connected to the second core via an external monitoring channel, which is implemented via the CAN bus.

[0046] Specifically, the first core is connected to an external first CAN transceiver through a first CAN controller inside the processor circuit, the second core is connected to an external second CAN transceiver through a second CAN controller inside the processor circuit, and the first CAN transceiver and the second CAN transceiver form an effective signal connection through an external circuit, thereby forming the external monitoring channel.

[0047] In this embodiment, the first core or main control unit of the processor circuit can be configured as the motor controller MCU of the integrated controller, and the second core can be configured as the vehicle controller VCU or the battery management controller BMC, or the second core can be configured as the vehicle controller and the battery management controller.

[0048] Based on the specific scheme in this embodiment, the motor controller, vehicle controller and battery management controller can achieve effective reset coordination, that is, before an abnormal controller is reset, other normally operating controllers perform service preprocessing operations, so that after the reset is completed, the originally normally operating controller re-executes the corresponding program from the saved node position. This improves the operating stability of the integrated controller.

[0049] Embodiment 3

[0050] The present embodiment provides a vehicle, which includes but is not limited to a fuel vehicle and an electric vehicle. In particular, the vehicle is provided with an integrated controller provided in the first embodiment or the second embodiment, and the integrated controller works based on multiple monitoring channels. The integrated controller includes a watchdog circuit and a processor circuit. The watchdog circuit is used to receive a state signal output by the processor circuit, and performs a reset operation on the processor circuit when the state signal is a state abnormality signal; the processor circuit is configured with a main control unit and at least one slave control unit, and the main control unit is also connected to the slave control unit signal through an internal monitoring channel and an external monitoring channel respectively, and the main control unit and / or the slave control unit perform a reset preprocessing operation based on a first abnormal signal of the internal monitoring channel and a second abnormal signal of the external monitoring, and when the reset preprocessing operation is completed, the main control unit sends a state abnormality signal to the main monitoring channel. In this way, the normally operating control unit can perform a reset preprocessing operation in time when passively restarting, thereby improving the operating stability of the integrated controller.

[0051] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0052] Although the preferred embodiments of the present application have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of the embodiments of the present application.

[0053] Finally, it should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or terminal device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or terminal device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or terminal device including the elements.

[0054] The technical solution provided by the present application is introduced in detail above. Specific examples are used in this article to illustrate the principles and implementation methods of the present application. The description of the above embodiments is only used to help understand the method of the present application and its core idea. At the same time, for general technicians in this field, according to the idea of ​​the present application, there will be changes in the specific implementation methods and application scope. In summary, the content of this specification should not be understood as a limitation on the present application.

Claims

1. An integrated controller based on multiple monitoring channels, characterized in that: The integrated controller includes a watchdog circuit and a processor circuit, wherein: The watchdog circuit is connected to the processor circuit, and is used to receive a status signal output by the processor circuit, and to perform a reset operation on the processor circuit when the status signal is a status abnormality signal; The processor circuit is configured with a master control unit and at least one slave control unit, the master control unit is connected to the watchdog circuit by signal through a master monitoring channel, the master control unit is also connected to the slave control unit by signal through an internal monitoring channel and an external monitoring channel, the master control unit and / or the slave control unit performs a reset preprocessing operation based on a first abnormal signal of the internal monitoring channel and a second abnormal signal of the external monitoring channel, and when the reset preprocessing operation is completed, the master control unit sends the abnormal state signal to the master monitoring channel; The reset preprocessing operation includes at least one of the following: recording the throttle, brake, and gear status before the reset, so that after the reset is completed, the program is executed according to the recorded throttle, brake, and gear status; determining whether to perform speed limit processing before the reset, and sending a torque limit instruction to the engine controller or the motor controller when speed limit processing is required; When the master control unit receives the first abnormal signal sent by the corresponding slave control unit through the internal monitoring channel, the master control unit monitors the external monitoring channel connected to the slave control unit, and if a second abnormal signal is detected, it is determined that the corresponding slave control unit is abnormal and needs to perform a corresponding reset operation; When the master control unit determines that the slave control unit is abnormal according to the first abnormal signal and the second abnormal signal, the master control unit performs a reset preprocessing operation corresponding to the master control unit; When there are multiple slave control units, at least a first slave control unit and a second slave control unit are included, wherein: When the master control unit determines that the first slave control unit is abnormal according to the first abnormal signal and the second abnormal signal, the master control unit sends a notification message to the second slave control unit so that the second slave control unit performs a corresponding reset preprocessing operation; When the second slave control unit determines that the first slave control unit is abnormal according to the first abnormal signal and the second abnormal signal of the first slave control unit, the second slave control unit performs a reset preprocessing operation corresponding to the second slave control unit.

2. The integrated controller according to claim 1, characterized in that: The master control unit and the at least one slave control unit correspond to different reset preprocessing operations, and different slave control units correspond to different reset preprocessing operations.

3. The integrated controller according to claim 1, characterized in that: The two slave control units are connected by signals via the internal monitoring channel and the external monitoring channel.

4. The integrated controller according to claim 1, characterized in that: When the at least one slave control unit determines that the master control unit is abnormal according to the first abnormal signal and the second abnormal signal, the at least one slave control unit performs a reset pre-processing operation corresponding to the at least one slave control unit.

5. The integrated controller according to claim 1, characterized in that: The processor circuit includes multiple cores, and the cores are respectively configured as the main control unit or the at least one slave control unit; the internal monitoring channel between the cores includes an inter-core communication module; the external monitoring channel between the cores is a CAN bus; the main monitoring channel is a serial communication bus; the main control unit includes a motor controller, and the at least one slave control unit includes a vehicle controller and / or a battery management controller.

6. A vehicle, characterized in that: It includes the integrated controller based on multiple monitoring channels as described in any one of claims 1-5.

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