A wafer detection method, device and storage medium

Abstract

The present application relates to a method, device and storage medium for wafer detection, the method comprising obtaining a wafer type of a wafer, matching the wafer type in a preset template library, the preset template library including a preset wafer type and a detection template corresponding to the preset wafer type, if the match is successful, obtaining a detection template corresponding to the preset wafer type that is the same as the wafer type, and detecting the wafer according to the detection template. The present application has the effect of improving the wafer detection speed.

Description

Technical Field

[0001] The present application relates to the field of wafer detection, and in particular to a method, device and storage medium for wafer detection. Background Art

[0002] Currently, in the wafer production process, the wafer needs to be inspected after manufacturing. Usually, the wafer inspection method is to inspect each core particle in the wafer. However, when the wafer size is different or the type of core particles is different, the corresponding wafer type is also different. That is, when each core particle in the wafer is inspected, in order to ensure the accuracy of the inspection, manual participation is required to adjust the position of each wafer.

[0003] With the continuous advancement of technology and the continuous expansion of the wafer market, the demand for wafers is also increasing. If we continue to use manual adjustment to adjust the position of each wafer, the inspection efficiency of the wafers will be low due to the large number of wafers and the large number of cores in each wafer. Therefore, how to inspect wafers more efficiently becomes a problem. Summary of the invention

[0004] In order to improve the efficiency of wafer inspection, the present application provides a wafer inspection method, device and storage medium.

[0005] In a first aspect, the present application provides a wafer detection method, which adopts the following technical solution:

[0006] A wafer inspection method, comprising:

[0007] Get the wafer type of the wafer;

[0008] Matching the wafer type in a preset template library, wherein the preset template library includes preset wafer types and detection templates corresponding to the preset wafer types;

[0009] If the match is successful, obtaining a detection template corresponding to a preset wafer type that is the same as the wafer type;

[0010] The wafer is inspected according to the inspection template.

[0011] By adopting the above technical scheme, the wafer type of the wafer is obtained, so as to judge whether there is a detection template for the wafer according to the wafer type of the wafer, and the wafer type of the wafer is matched in the preset template library. When the match is successful, it means that the wafer with the same wafer type as the wafer has been detected, that is, it means that the detection template exists for the wafer, and the detection template corresponding to the preset wafer type with the same wafer type as the wafer is obtained, and the wafer is detected according to the detection template. In this way, when the wafer is detected, the manual adjustment operation of the core particle detection is reduced, thereby improving the speed of core particle alignment during the wafer detection process, and then improving the speed of wafer detection.

[0012] In another possible implementation, the method further includes:

[0013] If the matching fails, obtaining a wafer image of the wafer;

[0014] Establishing a coordinate system in the wafer image, and determining the position information of each core grain in the wafer based on a preset core grain image and the coordinate system;

[0015] Based on the position information, the wafer is inspected.

[0016] By adopting the above technical solution, when the match fails, it means that the preset wafer type that is the same as the wafer type cannot be found in the preset template library, that is, there is no detection template for the wafer of this wafer type. The wafer image of the wafer is obtained so that a coordinate system can be established in the wafer image later, so as to facilitate the clarification of the horizontal and vertical coordinates of each pixel in the wafer image, determine the pixels belonging to the core grain image in the wafer image according to the preset core grain image, and determine the position information of each core grain in the wafer image in combination with the coordinate system. In this way, each core grain in the wafer can be detected according to the position information of each core grain in the wafer, thereby achieving the effect of detecting wafers for which there is no detection template.

[0017] In another possible implementation, the wafer image and the preset core grain image are respectively provided with scale information; and determining the position information of each core grain in the wafer based on the preset core grain image and the coordinate system includes:

[0018] Determining whether the scale information of the wafer image is the same as the scale information of the preset core grain image;

[0019] If not, adjusting the preset core grain image to obtain an adjusted core grain image, wherein the scale information of the adjusted core grain image is the same as the scale information of the wafer image;

[0020] Using the adjusted core grain image to perform overlap judgment on each regional image in the wafer image, the wafer image includes a plurality of regional images, and the size of the regional images is the same as the size of the adjusted core grain image;

[0021] If all image features of the regional image and the adjusted core grain image overlap, the coordinates corresponding to the regional image are determined as the position information of the core grain in the wafer.

[0022] By adopting the above technical solution, when acquiring a wafer image, the wafer image includes scale information and the preset core grain image also includes scale information. It is judged whether the scale information of the wafer image is the same as the scale information of the preset core grain image, so as to determine whether the current preset core grain image can be used as a comparison image, and determine the specific position of each core grain in the wafer image. When the scale information of the wafer image is different from the scale information of the preset core grain image, it means that the scale information of the wafer image is different from the scale information of the preset core grain image, that is, the size of the preset core grain image and the image of the core grain in the wafer image is different, and it is impossible to use the condition of whether they overlap to determine the image of the core grain and the position information of the core grain. Therefore, it is necessary to adjust the preset core grain image to obtain the adjusted core grain image. Thereby, the core grain image in the wafer image can be determined more accurately in the future. The adjusted core grain image is used to make a coincidence judgment on each regional image in the wafer image, wherein the wafer image includes multiple regional images, and the size of the regional image is the same as the size of the adjusted core grain image. When all image features of the regional image and the adjusted core grain image coincide, it is indicated that the regional image is the image of the core grain in the wafer, and the coordinates corresponding to the regional image are determined as the position information of the core grain in the wafer. Thus, the effect of determining the position information of each core grain in the wafer image is achieved.

[0023] In another possible implementation manner, adjusting the preset core grain image includes:

[0024] Based on the scale information of the preset core grain image and the scale information of the wafer image, obtaining a reduction factor of the preset core grain image;

[0025] The size of the preset core grain image is adjusted based on the reduction factor.

[0026] By adopting the above technical solution, the reduction factor of the preset core grain image to be reduced is determined according to the scale information of the preset core grain image and the scale information of the wafer image. The size of the preset core grain image is adjusted according to the reduction factor, thereby achieving the effect of adjusting the preset core grain image.

[0027] In another possible implementation, using the adjusted core grain image to perform overlap judgment on each regional image in the wafer image includes:

[0028] Based on the adjusted core grain image, determining a first core grain image and a second core grain image in the wafer image, wherein the first core grain image and the second core grain image are adjacent to each other and there is a gap between the first core grain image and the second core grain image;

[0029] Calculating an interval value between the first core grain image and the second core grain image;

[0030] The adjusted core grain image is used to perform overlap judgment on the regional image within the wafer image according to the interval value and the length or width of the adjusted core grain image.

[0031] By adopting the above technical scheme, the first core grain image and the second core grain image in the wafer image are determined according to the adjusted core grain image, so as to determine the interval value between each core grain image in the wafer image, wherein the images between the first core grain image and the second core grain image are adjacent to each other, so as to ensure that the calculated interval value is the interval value between two adjacent core grains in the wafer image, and the adjusted core grain image is judged to overlap with the regional image in the wafer image according to the interval value and the length or width of the adjusted core grain image, so that the adjusted core grain image does not need to be judged to overlap with each regional image, but only needs to be judged to overlap with the regional image that meets the interval value, and the length or width, thereby improving the speed of the overlap judgment, and making it faster to determine the position information of each core grain in the wafer image.

[0032] In another possible implementation manner, the detecting the wafer based on the position information includes:

[0033] Based on the position information, generating a detection route corresponding to the wafer;

[0034] Based on the detection route, the wafer is detected.

[0035] By adopting the above technical solution, a detection route corresponding to the wafer is generated according to the position information, so that the electronic device can detect the wafer according to the detection route, thereby achieving the effect that the electronic device can detect the wafer according to the position information.

[0036] In another possible implementation, the method further includes:

[0037] Determining the detection route as a detection template for the wafer;

[0038] The wafer type and the detection template are correspondingly stored in the preset template library.

[0039] By adopting the above technical solution, the detection route is determined as the detection template of the wafer, and the wafer type and the detection template are stored correspondingly in a preset template library, so that when a wafer of the same wafer type as the wafer is subsequently detected, the detection template can be directly retrieved from the preset template library for detection, thereby improving the detection efficiency of the wafer detection.

[0040] In a second aspect, the present application provides a wafer detection device, which adopts the following technical solution:

[0041] A wafer inspection device, comprising:

[0042] A first acquisition module, used for acquiring a wafer type of a wafer;

[0043] A matching module, used for matching the wafer type in a preset template library, wherein the preset template library includes preset wafer types and detection templates corresponding to the preset wafer types;

[0044] A second acquisition module is used to acquire a detection template corresponding to a preset wafer type that is the same as the wafer type when the match is successful;

[0045] The first detection module is used to detect the wafer according to the detection template.

[0046] By adopting the above technical scheme, the wafer type of the wafer is acquired through the first acquisition module, so as to judge whether there is a detection template for the wafer according to the wafer type of the wafer. Then, the wafer type of the wafer is matched in the preset template library through the matching module. When the match is successful, it means that the wafer with the same wafer type as the wafer has been detected, that is, it means that the detection template exists for the wafer. Therefore, the detection template corresponding to the preset wafer type with the same wafer type as the wafer is acquired through the second acquisition module, and the wafer is detected according to the detection template through the first detection module. Therefore, when the wafer is detected, the manual adjustment operation of the core particle detection is reduced, thereby improving the speed of core particle alignment during the wafer detection process, and then improving the speed of wafer detection.

[0047] In another possible implementation, the device further includes:

[0048] A third acquisition module, used for acquiring a wafer image of the wafer when the matching fails;

[0049] A first determination module is used to establish a coordinate system in the wafer image, and determine the position information of each core grain in the wafer based on a preset core grain image and the coordinate system;

[0050] The second detection module is used to detect the wafer based on the position information.

[0051] In another possible implementation, the wafer image and the preset core grain image are respectively provided with scale information; when the first determination module determines the position information of each core grain in the wafer based on the preset core grain image and the coordinate system, it is specifically used to:

[0052] Determining whether the scale information of the wafer image is the same as the scale information of the preset core grain image;

[0053] If not, adjusting the preset core grain image to obtain an adjusted core grain image, wherein the scale information of the adjusted core grain image is the same as the scale information of the wafer image;

[0054] Using the adjusted core grain image to perform overlap judgment on each regional image in the wafer image, the wafer image includes a plurality of regional images, and the size of the regional images is the same as the size of the adjusted core grain image;

[0055] If all image features of the regional image and the adjusted core grain image overlap, the coordinates corresponding to the regional image are determined as the position information of the core grain in the wafer.

[0056] In another possible implementation, when the first determining module adjusts the preset core grain image, it is specifically used to:

[0057] Based on the scale information of the preset core grain image and the scale information of the wafer image, obtaining a reduction factor of the preset core grain image;

[0058] The size of the preset core grain image is adjusted based on the reduction factor.

[0059] In another possible implementation, when the first determination module uses the adjusted core grain image to perform overlap judgment on each regional image in the wafer image, it is specifically used to:

[0060] Based on the adjusted core grain image, determining a first core grain image and a second core grain image in the wafer image, wherein the first core grain image is adjacent to the second core grain image and there is a gap between the first core grain image and the second core grain image;

[0061] Calculating the interval value between the first core grain image and the second core grain;

[0062] The adjusted core grain image is used to perform overlap judgment on the regional image within the wafer image according to the interval value and the length or width of the adjusted core grain image.

[0063] In another possible implementation, when the second detection module detects the wafer based on the position information, it is specifically used to:

[0064] Based on the position information, generating a detection route corresponding to the wafer;

[0065] Based on the detection route, the wafer is detected.

[0066] In another possible implementation, the device further includes:

[0067] A second determination module, configured to determine the detection route as a detection template for the wafer;

[0068] The storage module is used to store the wafer type and the detection template in the preset template library accordingly.

[0069] In a third aspect, the present application provides an electronic device, which adopts the following technical solution:

[0070] An electronic device, comprising:

[0071] one or more processors;

[0072] Memory;

[0073] One or more applications, wherein one or more applications are stored in a memory and configured to be executed by one or more processors, and the one or more applications are configured to: execute a wafer inspection method shown in any possible implementation of the first aspect.

[0074] In a fourth aspect, the present application provides a computer-readable storage medium, which adopts the following technical solution:

[0075] A computer-readable storage medium, when the computer program is executed in a computer, enables the computer to execute the wafer detection method described in any one of the first aspects.

[0076] In summary, the present application includes at least one of the following beneficial technical effects:

[0077] 1. Obtain the wafer type of the wafer, so as to judge whether there is a detection template for the wafer according to the wafer type of the wafer, match the wafer type of the wafer in the preset template library, and when the match is successful, it means that the wafer of the same wafer type as the wafer has been detected, that is, it means that the detection template exists for the wafer, obtain the detection template corresponding to the preset wafer type of the same wafer type as the wafer, and detect the wafer according to the detection template, so that when the wafer is detected, the manual adjustment operation of the core particle detection is reduced, thereby improving the speed of core particle alignment during the wafer detection process, and further improving the speed of wafer detection;

[0078] 2. When the match fails, it means that the preset wafer type that is the same as the wafer type cannot be found in the preset template library, that is, there is no detection template for the wafer of this wafer type. The wafer image of the wafer is obtained so that a coordinate system can be established in the wafer image later, so as to clarify the horizontal and vertical coordinates of each pixel in the wafer image, determine the pixels in the wafer image that belong to the core grain image according to the preset core grain image, and determine the position information of each core grain in the wafer image in combination with the coordinate system. In this way, each core grain in the wafer can be detected according to the position information of each core grain in the wafer, thereby achieving the effect of detecting wafers that do not have a detection template. BRIEF DESCRIPTION OF THE DRAWINGS

[0079] Figure 1 It is a flow chart of a wafer detection method in an embodiment of the present application.

[0080] Figure 2 This is an example diagram of the distribution of core particles in a wafer in an embodiment of the present application.

[0081] Figure 3 It is a structural schematic diagram of a wafer detection device in an embodiment of the present application.

[0082] Figure 4 It is a structural schematic diagram of an electronic device in an embodiment of the present application. DETAILED DESCRIPTION

[0083] The following is combined with Figure 1-4 This application is described in further detail.

[0084] After reading this specification, those skilled in the art may make non-creative modifications to this embodiment as needed, but such modifications are protected by patent law as long as they are within the scope of the claims of this application.

[0085] In order to make the purpose, technical solution and advantages of the embodiments of the present application clearer, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0086] In addition, the term "and / or" in this article is only a description of the association relationship of associated objects, indicating that there can be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the character " / " in this article, unless otherwise specified, generally means that the associated objects before and after are in an "or" relationship.

[0087] The embodiments of the present application are further described in detail below in conjunction with the drawings in the specification.

[0088] The embodiment of the present application provides a wafer inspection method, which is performed by an electronic device, which can be a server or a terminal device, wherein the server can be an independent physical server, or a server cluster or distributed system composed of multiple physical servers, or a cloud server that provides cloud computing services. The terminal device can be a smart phone, a tablet computer, a laptop computer, a desktop computer, etc., but is not limited to this. The terminal device and the server can be directly or indirectly connected via wired or wireless communication, and the embodiment of the present application does not limit this. Figure 1 As shown, the method includes: step S101, step S102, step S103 and step S104, wherein:

[0089] Step S101, obtaining the wafer type of the wafer.

[0090] For the embodiment of the present application, the wafer type of the wafer is obtained so that it can be judged whether the wafer has a detection template according to the wafer type of the wafer. Assume that the wafer type of wafer A is type A. Type A can indicate that the wafer diameter is 300mm (millimeters), the size of the core grain in the wafer is 10mm×10mm, and the type of the core grain is type a1. In the embodiment of the present application, the electronic device can obtain the wafer type of the wafer through user input.

[0091] Step S102, matching the wafer type in a preset template library.

[0092] Among them, the preset template library includes preset wafer types and detection templates corresponding to the preset wafer types.

[0093] For the embodiment of the present application, the preset template library is a template library set in advance, which includes a preset wafer type and a detection template corresponding to the preset wafer type. The wafer type of the wafer is matched in the preset template library to determine whether there is a detection template for the wafer type of the wafer currently to be detected. For example, type A of wafer A is matched in the preset template library to determine whether there is a detection template for wafer A.

[0094] Step S103: if the match is successful, obtaining a detection template corresponding to a preset wafer type that is the same as the wafer type.

[0095] For the embodiment of the present application, for example, when type A of wafer A is successfully matched in the preset template library, it indicates that there is a detection template for wafer A, and the detection template A corresponding to type A in the preset template library is obtained. This allows wafer A to be detected according to detection template A in the subsequent process, thereby improving the efficiency of wafer detection.

[0096] Step S104, inspecting the wafer according to the inspection template.

[0097] For the embodiment of the present application, for example, wafer A is inspected according to inspection template A. The electronic device can control the inspection probe to inspect wafer A according to the inspection template A.

[0098] A possible implementation of the embodiment of the present application further includes step S105 (not shown in the figure), step S106 (not shown in the figure), and step S107 (not shown in the figure), wherein step S105 may be performed before step S102, may be performed after step S102, or may be performed simultaneously with step S102, wherein:

[0099] Step S105: if the matching fails, a wafer image of the wafer is acquired.

[0100] For the embodiment of the present application, for example, when type A of wafer A fails to match in the preset template library, type A cannot be found in the preset template library, and there is no detection template for wafer A. Wafer image A of wafer A is obtained so that a coordinate system can be established in wafer image A later, thereby making it easier to clarify the horizontal and vertical coordinates of each pixel in wafer image A.

[0101] Step S106 , establishing a coordinate system in the wafer image, and determining the position information of each chip in the wafer based on the preset chip image and the coordinate system.

[0102] For an embodiment of the present application, for example, a coordinate system is established in wafer image A, so that the position of each pixel in wafer image A can be clearly understood, thereby facilitating the determination of the position information of the core grain in wafer image A. The preset core grain image is a pre-set core grain image, which can be an image entered in advance by the user, or a core grain image manually selected by the user from the wafer image. Assuming that the preset core grain image is image a, the pixels belonging to the core grain image in wafer image A are determined based on image a, and at the same time, the position information of each core grain in wafer image A is determined in combination with the coordinate system.

[0103] Step S107: inspect the wafer based on the position information.

[0104] According to the embodiment of the present application, wafer A is inspected according to the position information of each core particle in wafer image A, so as to achieve the effect of being able to inspect wafers without inspection templates.

[0105] The probe can be used to detect each core particle in the wafer. Furthermore, a shooting device can be provided on the probe. When the probe detects each core particle in the wafer according to the position information, in order to ensure the accuracy of the detection, the target core particle that the probe currently needs to detect can be placed at the center of the image captured by the shooting device.

[0106] Furthermore, a method for determining whether the core particle is in the center position is to pre-set an alignment area at the center position and obtain an image within the alignment area. When the image of the target core particle exists in the image of the alignment area and the four vertices of the alignment area all pass through the central pixel of the core particle adjacent to the alignment area, it indicates that the current core particle is in the center position.

[0107] In a possible implementation of the embodiment of the present application, when determining the position information of each core grain in the wafer based on the preset core grain image and the coordinate system, step S106 specifically includes step S1061 (not shown in the figure), step S1062 (not shown in the figure), step S1063 (not shown in the figure) and step S1064 (not shown in the figure), wherein:

[0108] Step S1061 , determining whether the scale information of the wafer image is the same as the scale information of the preset chip image.

[0109] For an embodiment of the present application, for example, when acquiring wafer image A, wafer image A includes scale information and image a also includes scale information. It is determined whether the scale information of the wafer image is the same as the scale information of the preset core grain image, so as to determine whether the current preset core grain image can be used as a comparison image. Assume that the scale information of wafer image A is 10:1 (10 cm on the image represents 1 cm (10 mm) in reality), and the scale information of image a is 200:1 (200 cm in the image represents 1 cm (10 mm) in reality).

[0110] Step S1062: if not, adjust the preset core grain image to obtain an adjusted core grain image.

[0111] The scale information of the adjusted core particle image is the same as the scale information of the wafer image.

[0112] For the embodiment of the present application, when the scale information of the wafer image is different from the scale information of the preset core grain image, it means that the scale information of the wafer image A is different from the scale information of the a image, that is, the size of the a image and the image of the core grain in the wafer image A is different, and it is impossible to use the condition of whether they overlap to determine the image of the core grain and the position information of the core grain. Therefore, it is necessary to adjust the a image, and the adjusted core grain image is obtained as the b image. This makes it possible to more accurately determine the position information of the core grain in the wafer image later.

[0113] Step S1063 , using the adjusted core grain image to perform overlap determination on each area image in the wafer image.

[0114] The wafer image includes a plurality of regional images, and the size of the regional images is the same as the size of the adjusted core particle image.

[0115] For the embodiment of the present application, the size of the regional image is the same as the size of the core grain image. For example, the wafer image A includes regional image A1, regional image A2 and regional image A3. The b image is used to perform overlap judgment with regional image A1, regional image A2 and regional image A3 respectively, so as to judge whether regional image A1, regional image A2 and regional image A3 are core grain images.

[0116] Step S1064 , if all image features of the regional image and the adjusted core grain image overlap, the coordinates corresponding to the regional image are determined as the position information of the core grain in the wafer.

[0117] For example, when all the image features of the region image A1 and the image b coincide, it means that the region image A1 is a core grain image in the wafer image A, and the coordinates of the region image A1 are determined as the position information of a core grain in the wafer image A. Thus, the position information of the core grain is determined in the wafer image.

[0118] Furthermore, when the scale information of the wafer image is the same as the scale information of the preset core grain image, it means that the scale information of the preset core grain image is the same as the scale information of the wafer image, which means that there is no need to process the preset core grain image, that is, the preset core grain image can be directly used to perform overlap judgment on the regional image within the wafer image.

[0119] In a possible implementation of the embodiment of the present application, when adjusting the preset core grain image, step S1062 specifically includes step S10621 (not shown in the figure) and step S10622 (not shown in the figure), wherein:

[0120] Step S10621, based on the scale information of the preset core grain image and the scale information of the wafer image, obtain the reduction factor of the preset core grain image.

[0121] For the embodiment of the present application, for example, the scale information of image a is 200:1, and the scale information of wafer image A is 10:1. According to 200:1 and 10:1, it is determined that the reduction factor of image a is 10. Specifically, 200:1 can be divided by 10:1 to obtain the reduction factor of image a as 10, or other calculation methods can be used.

[0122] Step S10622, adjusting the size of the preset core grain image based on the reduction factor.

[0123] For the embodiment of the present application, the size of the preset core grain image is adjusted according to the reduction factor, and the size of the preset core grain image can be accurately adjusted to the size of the image for overlap judgment. Further, the length and width of the a image can be reduced by 10 times respectively to obtain the b image. Thus, the effect of adjusting the a image is achieved.

[0124] In a possible implementation of the embodiment of the present application, when step S1063 uses the adjusted core grain image to perform overlap judgment on each regional image in the wafer image, it specifically includes step S10631 (not shown in the figure), step S10632 (not shown in the figure) and step S10633 (not shown in the figure), wherein:

[0125] Step S10631, based on the adjusted core grain image, determine the first core grain image and the second core grain image in the wafer image.

[0126] The images between the first core grain image and the second core grain image are adjacent, and there is a gap between the first core grain image and the second core grain image.

[0127] For the embodiment of the present application, the first core grain image and the second core grain image in the wafer image are determined according to the adjusted core grain image, so as to facilitate the subsequent calculation of the interval value between the first core grain image and the second core grain image. Among them, the first core grain image is adjacent to the second core grain image. So that the interval value calculated subsequently is the interval value of two adjacent core grains in the wafer image. If the first core grain image and the second core grain image are not two adjacent core grain images, the interval value determined subsequently will be too large. If the subsequent overlap judgment is performed according to the larger interval value, the position information of each core grain in the wafer cannot be accurately and completely determined. That is, the first core grain image and the second core grain image here must be two adjacent core grain images. So that the position information of each core grain can be completely and accurately determined subsequently.

[0128] The first core grain image and the second core grain image may be selected from core grain images at any position in the wafer image, but the first core grain image and the second core grain image must be adjacent core grain images. Figure 2 shown.

[0129] Step S10632, calculating the interval value between the first core grain image and the second core grain image.

[0130] For the embodiment of the present application, for example, the size of the core particle is 10mm×10mm, and the scale information of the wafer image A is 10:1 (10cm on the figure represents 1cm in reality), that is, 1cm on the figure in the wafer image A represents 1mm in reality. Assuming that the coordinates of the central pixel point of the first core particle image are (20,5), and the coordinates of the central pixel point in the second core particle image are (31,5), 31 minus 20, the interval value between the central pixels is 11cm, and continuing to subtract 10 from 11, it can be concluded that the interval value between the first core particle image and the second core particle in the wafer image A is 1cm.

[0131] Step S10633, the adjusted core grain image is used to perform overlap judgment on the regional image within the wafer image according to the interval value and the adjusted length or width of the core grain image.

[0132] For the embodiment of the present application, for example, since the intervals between the core particles on a wafer are equidistant, the b image is 1 cm, and the length and width of the b image are 10 cm and 10 cm, respectively, and the overlap judgment of the regional image in the wafer image is performed to accurately determine the position of each core particle. Among them, the arrangement of the core particles in the wafer can be Figure 2 As shown, when following Figure 2The arrows shown indicate that when the regional images are judged to overlap, the actual horizontal movement interval value of the b image is 11 cm, and the vertical movement interval value is 1 cm plus the core particle width of 10 cm, that is, 11 cm.

[0133] In a possible implementation of the embodiment of the present application, when step S107 detects the wafer based on the position information, it specifically includes step S1071 (not shown in the figure) and step S1072 (not shown in the figure), wherein:

[0134] Step S1071, generating a detection route corresponding to the wafer based on the position information.

[0135] For the embodiment of the present application, for example, assuming that the position information of some a1-type core particles in wafer A is (20, 5), (31, 5), (42, 5) and (53, 5), the detection route corresponding to wafer A can be to preferentially detect the a1-type core particle at (20, 5), then detect the a1-type core particle at (31, 5), then detect the a1-type core particle at (42, 5), and finally detect the a1-type core particle at (53, 5).

[0136] Step S1072, inspecting the wafer based on the inspection route.

[0137] For the embodiments of the present application, for example, the electronic device can control the detection probe to detect the a1 core particles at positions (20, 5), (31, 5), (42, 5) and (53, 5) in wafer A in the order of “first detecting the a1 core particle at (20, 5), then detecting the a1 core particle at (31, 5), then detecting the a1 core particle at (42, 5), and finally detecting the a1 core particle at (53, 5)”.

[0138] A possible implementation of the embodiment of the present application further includes step S108 (not shown in the figure) and step S109 (not shown in the figure), wherein step S108 may be performed after step S1072, wherein:

[0139] Step S108, determining the inspection route as an inspection template for the wafer.

[0140] For the embodiments of the present application, for example, if there are only a1-type core particles at (20, 5), (31, 5), (42, 5) and (53, 5) in wafer A, the detection route of "prioritizely detecting the a1-type core particle at (20, 5), then detecting the a1-type core particle at (31, 5), then detecting the a1-type core particle at (42, 5), and finally detecting the a1-type core particle at (53, 5)" can be determined as the detection template for wafer A.

[0141] Step S109, storing the wafer type and the detection template in a preset template library in correspondence.

[0142] For an embodiment of the present application, for example, wafer A and the detection template corresponding to wafer A are stored in a preset template library, so that the detection template can be directly retrieved from the preset template library later, and the electronic device performs detection according to the detection template, thereby reducing the process of the electronic device determining the position of each core particle in wafer A and generating a detection route, thereby improving the efficiency of wafer detection.

[0143] The above-mentioned embodiment introduces a wafer detection method from the perspective of method flow, and the following embodiment introduces a wafer detection device from the perspective of a virtual module or a virtual unit. Please refer to the following embodiment for details.

[0144] The present application embodiment provides a wafer detection device, such as Figure 3 As shown, the device 20 for wafer inspection may specifically include:

[0145] A first acquisition module 201 is used to acquire the wafer type of the wafer;

[0146] A matching module 202 is used to match the wafer type in a preset template library, where the preset template library includes preset wafer types and detection templates corresponding to the preset wafer types;

[0147] The second acquisition module 203 is used to acquire a detection template corresponding to a preset wafer type that is the same as the wafer type when the match is successful;

[0148] The first inspection module 204 is used to inspect the wafer according to the inspection template.

[0149] For the embodiment of the present application, the wafer type of the wafer is acquired through the first acquisition module 201, so as to subsequently determine whether there is a detection template for the wafer based on the wafer type of the wafer, and then the wafer type of the wafer is matched in the preset template library through the matching module 202. When the match is successful, it means that a wafer with the same wafer type as the wafer has been detected, that is, it means that a detection template exists for the wafer. Therefore, the detection template corresponding to the preset wafer type with the same wafer type as the wafer is acquired through the second acquisition module 203, and the wafer is detected according to the detection template through the first detection module 204. Therefore, when the wafer is detected, the manual adjustment operation of the core particle detection is reduced, thereby improving the speed of core particle alignment during the wafer detection process, and then improving the speed of wafer detection.

[0150] In a possible implementation of the embodiment of the present application, the device 20 further includes:

[0151] A third acquisition module, used for acquiring a wafer image of the wafer when the matching fails;

[0152] A first determination module is used to establish a coordinate system in the wafer image, and determine the position information of each core grain in the wafer based on the preset core grain image and the coordinate system;

[0153] The second detection module is used to detect the wafer based on the position information.

[0154] In a possible implementation of the embodiment of the present application, scale information is respectively provided in the wafer image and the preset core grain image; when the first determination module determines the position information of each core grain in the wafer based on the preset core grain image and the coordinate system, it is specifically used to:

[0155] Determine whether the scale information of the wafer image is the same as the scale information of the preset core grain image;

[0156] If not, the preset core grain image is adjusted to obtain an adjusted core grain image, and the scale information of the adjusted core grain image is the same as the scale information of the wafer image;

[0157] Using the adjusted core grain image, performing a coincidence judgment on each regional image in the wafer image, wherein the wafer image includes a plurality of regional images, and the size of the regional image is the same as the size of the adjusted core grain image;

[0158] If all image features of the regional image and the adjusted core grain image coincide with each other, the coordinates corresponding to the regional image are determined as the position information of the core grain in the wafer.

[0159] In a possible implementation manner of the embodiment of the present application, when the first determination module adjusts the preset core grain image, it is specifically used to:

[0160] Based on the scale information of the preset core grain image and the scale information of the wafer image, a reduction factor of the preset core grain image is obtained;

[0161] The size of the preset core grain image is adjusted based on the reduction factor.

[0162] In a possible implementation of the embodiment of the present application, when the first determination module uses the adjusted core grain image to perform overlap judgment on each regional image in the wafer image, it is specifically used to:

[0163] Based on the adjusted core grain image, determining a first core grain image and a second core grain image in the wafer image, wherein the first core grain image is adjacent to the second core grain image, and there is a gap between the first core grain image and the second core grain image;

[0164] Calculating the interval value between the first core grain image and the second core grain image;

[0165] The adjusted core grain image is used to perform overlap judgment on the regional image within the wafer image according to the interval value and the length or width of the adjusted core grain image.

[0166] In a possible implementation of the embodiment of the present application, when the second detection module detects the wafer based on the position information, it is specifically used to:

[0167] Based on the location information, generate the inspection route corresponding to the wafer;

[0168] Based on the inspection route, the wafer is inspected.

[0169] In a possible implementation of the embodiment of the present application, the device 20 further includes:

[0170] A second determination module is used to determine the detection route as a detection template of the wafer;

[0171] The storage module is used to store the wafer type and the detection template in a preset template library.

[0172] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0173] An electronic device is provided in an embodiment of the present application, such as Figure 4 As shown, Figure 4 The electronic device 30 shown includes: a processor 301 and a memory 303. The processor 301 and the memory 303 are connected, such as through a bus 302. Optionally, the electronic device 30 may also include a transceiver 304. It should be noted that in actual applications, the transceiver 304 is not limited to one, and the structure of the electronic device 30 does not constitute a limitation on the embodiments of the present application.

[0174] The processor 301 may be a CPU (Central Processing Unit), a general-purpose processor, a DSP (Digital Signal Processor), an ASIC (Application Specific Integrated Circuit), an FPGA (Field Programmable Gate Array) or other programmable logic devices, transistor logic devices, hardware components or any combination thereof. It may implement or execute various exemplary logic blocks, modules and circuits described in conjunction with the disclosure of this application. The processor 301 may also be a combination that implements computing functions, such as a combination of one or more microprocessors, a combination of a DSP and a microprocessor, etc.

[0175] The bus 302 may include a path to transmit information between the above components. The bus 302 may be a PCI (Peripheral Component Interconnect) bus or an EISA (Extended Industry Standard Architecture) bus. The bus 302 may be divided into an address bus, a data bus, a control bus, etc. For ease of representation, Figure 4 Only one thick line is used in the diagram, but it does not mean that there is only one bus or only one type of bus.

[0176] The memory 303 may be a ROM (Read Only Memory) or other types of static storage devices that can store static information and instructions, a RAM (Random Access Memory) or other types of dynamic storage devices that can store information and instructions, or an EEPROM (Electrically Erasable Programmable Read Only Memory), a CD-ROM (Compact Disc Read Only Memory) or other optical disk storage, optical disk storage (including compressed optical disk, laser disk, optical disk, digital versatile disk, Blu-ray disk, etc.), a magnetic disk storage medium or other magnetic storage device, or any other medium that can be used to carry or store the desired program code in the form of instructions or data structures and can be accessed by a computer, but is not limited thereto.

[0177] The memory 303 is used to store the application code for executing the solution of the present application, and the execution is controlled by the processor 301. The processor 301 is used to execute the application code stored in the memory 303 to implement the contents shown in the above method embodiment.

[0178] The electronic devices include, but are not limited to, mobile terminals such as mobile phones, laptop computers, digital broadcast receivers, PDAs (personal digital assistants), PADs (tablet computers), PMPs (portable multimedia players), vehicle-mounted terminals (such as vehicle-mounted navigation terminals), and fixed terminals such as digital TVs, desktop computers, etc. It can also be a server, etc. Figure 4 The electronic device shown is merely an example and should not bring any limitation to the functions and scope of use of the embodiments of the present application.

[0179] The embodiment of the present application provides a computer-readable storage medium, on which a computer program is stored, and when it is run on a computer, the computer can execute the corresponding content in the aforementioned method embodiment. Compared with the related art, in the embodiment of the present application, the wafer type of the wafer is obtained, so that it is convenient to judge whether the wafer has a detection template according to the wafer type of the wafer in the future, and the wafer type of the wafer is matched in the preset template library. When the match is successful, it means that the wafer with the same wafer type as the wafer has been detected, that is, it means that the wafer has a detection template, and the detection template corresponding to the preset wafer type with the same wafer type as the wafer is obtained, and the wafer is detected according to the detection template, so that when the wafer is detected, the manual adjustment operation of the core particle detection is reduced, thereby improving the speed of core particle alignment during the wafer detection process, and then improving the speed of wafer detection.

[0180] It should be understood that, although the steps in the flowchart of the accompanying drawings are displayed in sequence as indicated by the arrows, these steps are not necessarily executed in sequence in the order indicated by the arrows. Unless otherwise specified herein, there is no strict order restriction on the execution of these steps, and they can be executed in other orders. Moreover, at least a part of the steps in the flowchart of the accompanying drawings may include multiple sub-steps or multiple stages, and these sub-steps or stages are not necessarily executed at the same time, but can be executed at different times, and their execution order is not necessarily sequential, but can be executed in turn or alternately with other steps or at least a part of the sub-steps or stages of other steps.

[0181] The above description is only a partial implementation method of the present application. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present application. These improvements and modifications should also be regarded as the scope of protection of the present application.

Claims

1. A wafer inspection method, characterized in that: include: Get the wafer type of the wafer; Matching the wafer type in a preset template library, wherein the preset template library includes preset wafer types and detection templates corresponding to the preset wafer types; the detection templates include detection routes; If the match is successful, obtaining a detection template corresponding to a preset wafer type that is the same as the wafer type; Inspecting the wafer according to the inspection template; If the matching fails, obtaining a wafer image of the wafer; Establishing a coordinate system in the wafer image, and determining the position information of each core grain in the wafer based on a preset core grain image and the coordinate system; Based on the position information, generating a detection route corresponding to the wafer; Based on the detection route, the wafer is detected.

2. A wafer detection method according to claim 1, characterized in that: The wafer image and the preset core grain image respectively correspond to scale information; The determining the position information of each chip in the wafer based on the preset chip image and the coordinate system includes: Determining whether the scale information of the wafer image is the same as the scale information of the preset core grain image; If not, adjusting the preset core grain image to obtain an adjusted preset core grain image, wherein the scale information of the adjusted preset core grain image is the same as the scale information of the wafer image; Using the adjusted preset core grain image to perform overlap judgment on each regional image in the wafer image, the wafer image includes a plurality of regional images, and the size of the regional images is the same as the size of the adjusted preset core grain image; If all image features of the regional image and the adjusted preset core grain image coincide with each other, the coordinates corresponding to the regional image are determined as the position information of the core grain in the wafer.

3. A wafer detection method according to claim 2, characterized in that: The step of adjusting the preset core grain image includes: Based on the scale information of the preset core grain image and the scale information of the wafer image, obtaining a reduction factor of the preset core grain image; The size of the preset core grain image is adjusted based on the reduction factor.

4. The wafer detection method according to claim 2, characterized in that: The using the adjusted preset core grain image to perform overlap judgment on each area image in the wafer image includes: Based on the adjusted preset core grain image, determining a first core grain image and a second core grain image in the wafer image, wherein the first core grain image is adjacent to the second core grain image, and there is a gap between the first core grain image and the second core grain image; Calculating an interval value between the first core grain image and the second core grain image; The adjusted preset core grain image is used to perform overlap judgment on the regional image within the wafer image according to the interval value and the length or width of the adjusted preset core grain image.

5. A wafer detection method according to any one of claims 1 to 4, characterized in that: The method further comprises: Determining the detection route as a detection template for the wafer; The wafer type and the detection template are correspondingly stored in the preset template library.

6. A wafer inspection device, characterized in that: include: A first acquisition module, used for acquiring a wafer type of a wafer; A matching module, used for matching the wafer type in a preset template library, wherein the preset template library includes preset wafer types and detection templates corresponding to the preset wafer types; the detection templates include detection routes; A second acquisition module is used to acquire a detection template corresponding to a preset wafer type that is the same as the wafer type when the match is successful; A first detection module, used for detecting the wafer according to the detection template; A third acquisition module, used for acquiring a wafer image of the wafer when the matching fails; A first determination module is used to establish a coordinate system in the wafer image, and determine the position information of each core grain in the wafer based on a preset core grain image and the coordinate system; A second detection module, used for generating a detection route corresponding to the wafer based on the position information; Based on the detection route, the wafer is detected.

7. An electronic device, characterized in that: It includes: One or more processors; Memory; One or more applications, wherein the one or more applications are stored in the memory and configured to be executed by the one or more processors, and the one or more applications are configured to: execute the wafer detection method according to any one of claims 1 to 5.

8. A computer-readable storage medium having a computer program stored thereon, characterized in that: When the computer program is executed in a computer, the computer is caused to execute the wafer inspection method according to any one of claims 1 to 5.

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