Orthogonal system tofino cross chip unified control circuit and implementation method

Abstract

This patent relates to a unified control circuit and implementation method of a tofino cross chip in an orthogonal system, and belongs to the field of Ethernet switching chip circuit control. The orthogonal system includes 3 cross cards and 8 front plug-in cards, each cross card has a CPU module, and each cross card and front plug-in card has a tofino cross chip. The unified control circuit of the present invention is composed of 8 front plug-in card control circuits and 3 cross card control circuits. The CPU modules on the 3 cross card control circuits control the tofino cross chips on the cross card and the front plug-in card that matches it. Only 3 CPU modules can control 11 tofino cross chips, completing the unified control of the tofino cross chips in the orthogonal system. The present invention not only has a simple circuit, but also reduces the number of CPU modules used, thereby reducing the cost of use.

Description

Technical Field

[0001] This invention relates to a control circuit, and more particularly to a unified control circuit and implementation method for an orthogonal system Tofino crossover chip, belonging to the field of Ethernet switching chip circuit control. Background Technology

[0002] With the advancement of Ethernet technology, Ethernet signals are being used more and more widely. And against the backdrop of the continuous development of emerging technologies such as big data and cloud computing, the cross-exchange of large-capacity Ethernet data is increasingly becoming an indispensable part of communication links.

[0003] Tofino cross-connect chips are high-capacity cross-connect chips, with capacities up to 3.2Gbps and 6.4Gbps. They are dedicated chips specifically designed to solve the cross-connection problem of Ethernet data, and their application greatly improves the efficiency of Ethernet signal processing. Using multiple Tofino cross-connect chips to build larger-capacity orthogonal systems is one of the future directions of technological development. The control interface of the Tofino cross-connect chip is PCIe. PCIe itself is a one-to-one single-point control interface, meaning each Tofino cross-connect chip requires a CPU module PCIe port for control. Due to the structural limitations of orthogonal systems, using multiple Tofino cross-connect chips on front and rear expansion cards requires configuring a corresponding number of CPU modules to complete one-to-one control, resulting in poor scalability and significantly increasing equipment costs due to the use of CPU modules. Summary of the Invention

[0004] To address the issues of poor scalability and high cost associated with configuring the same number of CPU modules for multiple Tofino cross-connect chips in current orthogonal systems, this invention designs a unified control circuit for Tofino cross-connect chips in orthogonal systems. Through the CPU modules on the cross-connect cards, the Tofino cross-connect chips on the cross-connect card and its matching front-end cards can be controlled separately. The orthogonal system has 3 cross-connect cards and 8 front-end cards. Each cross-connect card has one CPU module, and each cross-connect card and front-end card has one Tofino cross-connect chip. Through the 3 CPU modules, all Tofino cross-connect chips (a total of 11 chips) can be controlled, achieving unified control of the Tofino cross-connect chips in the orthogonal system.

[0005] The technical solution adopted in this invention is: a unified control circuit for an orthogonal system Tofino cross-chip, wherein the unified control circuit consists of 8 front-insertion card control circuits and 3 cross-chip control circuits;

[0006] The front card control circuit is located on the front card of the orthogonal system and consists of one Tofino crossover chip, one 1:3 PCIe switch, and one STM32 controller; the crossover card control circuit is located on the crossover card of the orthogonal system and consists of one CPU module, one Tofino crossover chip, and three 1:3 PCIe switches; each front card is connected to each crossover card through an orthogonal connector.

[0007] The CPU module of the cross-connect card control circuit outputs one set of PCIe 3.0 x4 signals to control the Tofino cross-connect chip on this board, and then outputs three sets of PCIe 3.0 x4 signals, which are connected to three 1:3 PCIe switches respectively. The three 1:3 PCIe switches are connected to the CPU module through pins SW1 and SW2. The PCIe signals output by the three 1:3 PCIe switches are connected to three front-end card control circuits through quadrature connectors respectively. The front-end card control circuit selects the PCIe signal of the cross-connect card control circuit through the 1:3 PCIe switches and outputs one PCIe signal to control the Tofino cross-connect chip on this board. The channels of the 1:3 PCIe switches of the front-end card control circuit are connected to the STM32 controller through pins SW1 and SW2.

[0008] The model number of the Tofino cross-connect chip is: BFN-T10-064Q-B0;

[0009] The CPU module model is: CMB6-QM370-E2176M;

[0010] The model number of the 1:3 type PCIe switch is: PI3PCIE3413;

[0011] The model of the STM32 controller is: STM32F103.

[0012] A method for implementing a unified control circuit for an orthogonal system using the Tofino crossover chip, comprising the following steps:

[0013] Step 1, Implement cross-card control:

[0014] Insert the three cross-connect cards with cross-connect control circuits into the three cross-connect slots of the orthogonal system. The CPU module of the cross-connect control circuit first identifies its own slot, outputs a PCIE 3.0*4 signal to control the Tofino cross-connect chip on this board, and then outputs three PCIE 3.0*4 signals to connect to the three 1:3 PCIE switches respectively. According to the cross-connect control scheme, it outputs SW1 and SW2 signals to turn on the three 1:3 PCIE switches on this cross-connect card and select the corresponding channel.

[0015] The cross-connect card control scheme is as follows: The CPU module of the cross-connect card A control circuit controls the Tofino cross-connect chips of the first, second, and third front-end cards. The CPU module of the cross-connect card A control circuit outputs SW1 and SW2 signals to open the three PCIe 1:3 switches (PCIe1, PCIe2, and PCIe3), which are three channels in total. The three channels are connected to the first, second, and third front-end cards respectively through connectors. The CPU module of the cross-connect card B control circuit controls the Tofino cross-connect chips of the fourth, fifth, and sixth front-end cards. The CPU module of the cross-connect card B control circuit... The U module outputs SW1 and SW2 signals to open three channels (PCIE4, PCIE5, and PCIE6) of the three 1:3 PCIE switches. These three channels are connected to the fourth, fifth, and sixth front expansion cards via connectors. The CPU module of the cross-connect card C control circuit controls the Tofino cross-connect chip of the seventh and eighth front expansion cards. The CPU module of the cross-connect card C control circuit outputs SW1 and SW2 signals to open two channels (PCIE7 and PCIE8) of the 1:3 PCIE switches. These two channels are connected to the seventh and eighth front expansion cards via connectors.

[0016] Step 2, implement front card insertion control:

[0017] Eight front-mounted cards with front-mounted card control circuits are inserted into the eight front-mounted card slots of the orthogonal system. The STM32 controller of the front-mounted card control circuit first identifies its own slot, and according to the front-mounted card control scheme, outputs SW1 and SW2 signals to turn on the 1:3 PCIe switch of this front-mounted card, select the corresponding channel, and use the PCIe 3.0*4 signal on the channel to control the Tofino cross-connect chip of this card.

[0018] The aforementioned front-end card control scheme is as follows: The Tofino cross-connect chips of the first, second, and third front-end card control circuits are controlled by the cross-connect card A control circuit. The STM32 controllers of the first, second, and third front-end card control circuits output SW1 and SW2 signals to open the PCIE1, PCIE2, and PCIE3 channels of the 1:3 type PCIE switch. These three channels are respectively connected to the cross-connect card A via connectors. The Tofino cross-connect chips of the fourth, fifth, and sixth front-end card control circuits are controlled by the cross-connect card B control circuit. The STM32 controllers of the fourth, fifth, and sixth front-end card control circuits output SW1 and SW2 signals to open the PCIE4, PCIE5, and PCIE6 channels of the 1:3 type PCIE switch. These three channels are connected to the cross-connect card B via connectors. The Tofino cross-connect chips of the seventh and eighth front-end card control circuits are controlled by the cross-connect card C control circuit. The STM32 controllers of the seventh and eighth front-end card control circuits output SW1 and SW2 signals to open the PCIE7 and PCIE8 channels of the 1:3 type PCIE switch. These two channels are connected to the cross-connect card C via connectors.

[0019] Through the above steps, unified control of the orthogonal system Tofino cross-connect chip was achieved, with 11 Tofino cross-connect chips controlled by 3 CPU modules.

[0020] The beneficial effects of this invention are: this invention uses only 3 CPU modules to achieve unified control of all Tofino cross-chips (a total of 11 chips) in an orthogonal system. Compared with the prior art, it greatly saves the number of CPU modules used and reduces equipment costs. At the same time, this invention has strong applicability and can complete the control of multiple Tofino chips in an orthogonal system without changing any hardware. Attached Figure Description

[0021] The present invention will be further described in detail below with reference to the accompanying drawings and specific embodiments:

[0022] Figure 1 This is a schematic diagram of the structure of the front insert card and cross card of the present invention located in the chassis;

[0023] Figure 2 This is a circuit connection diagram of the front insert card and the cross card of the present invention. Detailed Implementation

[0024] The embodiments of the present invention will now be explained in detail with reference to the accompanying drawings:

[0025] Figure 1This is a schematic diagram of the front insert card and cross card structure of the present invention located in the chassis. It includes a front insert card and a cross card. The front insert cards are located at the front of the chassis and are horizontally inserted, arranged from top to bottom as the first, second…eighth front insert cards. The cross cards are located at the rear of the chassis and are vertically inserted. Looking at the chassis from the rear, from right to left, they are cross card A, cross card B, and cross card C. The front insert card control circuit and the cross card control circuit of the present invention are located on the front insert card and the cross card, respectively, in the orthogonal system.

[0026] Figure 2 This diagram shows the circuit connections for the front-end cards and cross-connect cards of this invention. It includes eight front-end card control circuits and three cross-connect card control circuits. The eight front-end card control circuits are ordered from top to bottom as First, Second…Eighth, and the three cross-connect card control circuits are ordered as Cross-connect Card A, Cross-connect Card B, and Cross-connect Card C. Each front-end card control circuit consists of one Tofino cross-connect chip, one 1:3 PCIe switch, and one STM32 controller. All eight front-end card control circuits are identical. Each cross-connect card control circuit consists of one CPU module, one Tofino cross-connect chip, and three 1:3 PCIe switches. All three cross-connect card control circuits are identical. Each front-end card control circuit is connected to each cross-connect card control circuit via one and only one orthogonal connector.

[0027] The CPU module on the cross-connect card control circuit outputs one set of PCIe 3.0 x4 signals to control the Tofino cross-connect chip on the board, and then outputs three sets of PCIe 3.0 x4 signals, which are connected to three 1:3 PCIe switches respectively. The 1:3 PCIe switches are multiplexers / demultiplexers for PCIe signals, enabling bidirectional 1:3 selection of PCIe signals based on channel selection status. The channel selection pins SW1 and SW2 of the three 1:3 PCIe switches on the cross-connect card control circuit are connected to the CPU module. The PCIe signals output from the 1:3 PCIe switches are connected to three front-end card control circuits via quadrature connectors. The front-end card control circuits select the PCIe signals from the three cross-connect card control circuits through the 1:3 PCIe switches and output one PCIe signal to control the Tofino cross-connect chip on the board. The channel selection pins SW1 and SW2 of the 1:3 PCIe switches on the front-end card control circuits are connected to the STM32 controller.

[0028] Through a unified control circuit, one CPU module of the cross-connect card A control circuit can control not only the Tofino cross-connect chip on its own board, but also the Tofino cross-connect chips of the first, second, and third front-plug card control circuits that are matched with it. Similarly, one CPU module of the cross-connect card B control circuit can control not only the Tofino cross-connect chip on its own board, but also the Tofino cross-connect chips of the fourth, fifth, and sixth front-plug card control circuits that are matched with it. One CPU module of the cross-connect card C control circuit can control not only the Tofino cross-connect chip on its own board, but also the Tofino cross-connect chips of the seventh and eighth front-plug card control circuits that are matched with it. In the end, only three CPU modules are used to achieve unified control of all Tofino cross-connect chips in the orthogonal system.

[0029] The model number of the Tofino cross-connect chip is: BFN-T10-064Q-B0;

[0030] The CPU module model is: CMB6-QM370-E2176M;

[0031] The model number of the 1:3 type PCIe switch is: PI3PCIE3413;

[0032] The model of the STM32 controller is: STM32F103.

[0033] Reference Figure 2 The specific implementation steps of the present invention are as follows:

[0034] Step 1: Implement cross-card control;

[0035] Three cross-connect cards with cross-connect control circuits are inserted into the three cross-connect slots of the orthogonal system. The CPU module on the cross-connect control circuit first identifies its own slot, outputs a PCIe 3.0 x4 signal to control the Tofino cross-connect chip on the board, and then outputs three PCIe 3.0 x4 signals to connect to the three 1:3 PCIe switches respectively. According to the cross-connect control scheme of the unified control circuit, it outputs SW1 and SW2 signals to open the three 1:3 PCIe switches on the cross-connect card and select the corresponding channels. The cross-connect control scheme is as follows: The CPU module of the cross-connect card A control circuit controls the Tofino cross-connect chips of the first, second, and third front-mounted cards that are matched with it. Therefore, the CPU module of the cross-connect card A control circuit outputs SW1 and SW2 signals to open PCIe1, PCIe2, and PCIe3 switches of the three 1:3 PCIe switches respectively. There are three channels in total, which are connected to the first, second, and third front expansion cards via connectors. The CPU module of the cross card B control circuit controls the Tofino cross chips of the fourth, fifth, and sixth front expansion cards, so the CPU module of the cross card B control circuit outputs SW1 and SW2 signals to open the three 1:3 PCIe switches, namely PCIe4, PCIe5, and PCIe6, which are connected to the fourth, fifth, and sixth front expansion cards via connectors. The CPU module of the cross card C control circuit controls the Tofino cross chips of the seventh and eighth front expansion cards, so the CPU module of the cross card B control circuit outputs SW1 and SW2 signals to open the two 1:3 PCIe switches, namely PCIe7 and PCIe8, which are connected to the seventh and eighth front expansion cards via connectors.

[0036] Step 2: Implement front-insertion card control;

[0037] Eight front-mounted cards with their control circuits installed are inserted into the eight slots of the orthogonal system. The STM32 controller on the front-mounted card control circuit first identifies its own slot and, according to the unified control circuit's front-mounted card control scheme, outputs SW1 and SW2 signals to turn on the 1:3 PCIe switch on the front-mounted card, selecting the corresponding channel. The PCIe 3.0*4 signal on this channel is then used to control the Tofino cross-connect chip on the card. The front-mounted card control scheme is as follows: the Tofino cross-connect chip in the first front-mounted card control circuit is controlled by the cross-connect card A control circuit, therefore the first front-mounted card... The STM32 controller in the control circuit outputs SW1 and SW2 signals to open the PCIe 1 channel of the 1:3 PCIe switch. This channel comes from cross-connect card A via a connector. Similarly, the Tofino cross-connect chip in the control circuits of the second and third front-end cards is controlled by the control circuit of cross-connect card A. Therefore, the STM32 controller in the control circuits of the second and third front-end cards outputs SW1 and SW2 signals to open the PCIe 2 and PCIe 3 channels of the 1:3 PCIe switch. These two channels come from cross-connect card A via connectors. The Tofino cross-connect chip in the control circuit of the fourth front-end card is controlled by... The cross-connect card B's control circuit controls the fourth front-end card's STM32 controller, which outputs SW1 and SW2 signals to open the PCIe 4 channel of the 1:3 PCIe switch. This channel originates from the cross-connect card B via a connector. Similarly, the Tofino cross-connect chips in the fifth and sixth front-end card control circuits are controlled by the cross-connect card B's control circuit. Therefore, the STM32 controllers in the fifth and sixth front-end card control circuits output SW1 and SW2 signals to open the PCIe 5 and PCIe 6 channels of the 1:3 PCIe switch. These two channels originate from the cross-connect card B via connectors. The seventh front-end card... The Tofino cross-connect chip in the card insertion control circuit is controlled by the cross-connect card C control circuit. Therefore, the STM32 controller of the seventh front card insertion control circuit outputs SW1 and SW2 signals to open the PCIE7 channel of the 1:3 PCIE switch. This channel comes from the cross-connect card C through a connector. Similarly, the Tofino cross-connect chip in the eighth front card insertion control circuit is controlled by the cross-connect card C control circuit. Therefore, the STM32 controller of the eighth front card insertion control circuit outputs SW1 and SW2 signals to open the PCIE8 channel of the 1:3 PCIE switch. This channel comes from the cross-connect card C through a connector.

[0038] After the above connection, unified control of the Tofino cross-connect chip in the orthogonal system is realized. Through 3 CPU modules, 11 Tofino cross-connect chips can be controlled.

Claims

1. An orthogonal system tofino cross chip unified control circuit, characterized in that: The unified control circuit is composed of 8 front card control circuits and 3 cross card control circuits; The front card control circuit is located on the front card of the orthogonal system, and is composed of a tofino cross chip, a 1:3 type PCIE switch, and an STM32 controller; the cross card control circuit is located on the cross card in the orthogonal system, and is composed of a CPU module, a tofino cross chip, and three 1:3 type PCIE switches; each front card is connected to each cross card through an orthogonal connector; The CPU module of the cross card control circuit outputs 1 group of PCIE3.0 x4 signals to control the tofino cross chip of this board, and then outputs 3 groups of PCIE3.0 x4 signals, which are respectively connected to 3 1:3 type PCIE switches. The 3 1:3 type PCIE switches are connected to the CPU module through pins SW1 and SW2. The PCIE signals output by the 3 1:3 type PCIE switches are respectively connected to 3 front card control circuits through orthogonal connectors; the front card control circuit selects the PCIE signal of the cross card control circuit through the 1:3 type PCIE switch, and outputs a PCIE signal to control the tofino cross chip of this board. The channel of the 1:3 type PCIE switch of the front card control circuit is connected to the STM32 controller through pins SW1 and SW2; Insert three cross-cards with cross-card control circuits into the three cross-card slots of the orthogonal system respectively. The CPU module of the cross-card control circuit first identifies its own slot, outputs a PCIE3.0*4 signal to control the tofino cross-chip of this board, and then outputs three PCIE3.0*4 signals to connect three 1:3 PCIE switches respectively, and outputs SW1 and SW2 signals according to the cross-card control scheme to turn on the three 1:3 PCIE switches on this cross-card and select the corresponding channels; Insert 8 front card control circuits into 8 front card slots of the orthogonal system respectively. The STM32 controller of the front card control circuit first identifies its own slot, and outputs SW1 and SW2 signals according to the front card control scheme, turns on the 1:3 PCIE switch of the front card, selects the corresponding channel, and uses the PCIE3.0*4 signal on the channel to control the tofino cross chip of the card. The model of the tofino crossover chip is: BFN-T10-064Q-B0; The model of the CPU module is: CMB6-QM370-E2176M; The model of the 1:3 type PCIE switch is: PI3PCIE3413; The model of the STM32 controller is: STM32F103.

2. A method for implementing the orthogonal system tofino cross chip unified control circuit according to claim 1, characterized in that: Here are the steps: Step 1: Implement cross-card control: The cross card control scheme is as follows: the CPU module of the control circuit of the cross card A controls the tofino cross chips of the first, second and third front plug-in cards, and the CPU module of the control circuit of the cross card A outputs SW1 and SW2 signals to respectively open three channels of PCIE1, PCIE2 and PCIE3 of three 1:3 type PCIE switches, and the three channels are respectively connected to the first, second and third front plug-in cards through connectors; the CPU module of the control circuit of the cross card B controls the tofino cross chips of the fourth, fifth and sixth front plug-in cards, and the CPU module of the control circuit of the cross card B ... The U module outputs SW1 and SW2 signals to open three channels of PCIE4, PCIE5, and PCIE6 of three 1:3 PCIE switches, which are respectively connected to the fourth, fifth, and sixth front plug-in cards through connectors; the CPU module of the cross card C control circuit controls the tofino cross chip of the seventh and eighth front plug-in cards, and the CPU module of the cross card C control circuit outputs SW1 and SW2 signals to open two channels of PCIE7 and PCIE8 of the 1:3 PCIE switch, which are respectively connected to the seventh and eighth front plug-in cards through connectors; Step 2: Implement front card control: The front card control scheme is as follows: the tofino cross chip of the first, second and third front card control circuits is controlled by the cross card A control circuit, the STM32 controller of the first, second and third front card control circuits outputs SW1 and SW2 signals, opens the PCIE1, PCIE2 and PCIE3 channels of the 1:3 type PCIE switch, and these three channels come from the cross card A through the connector respectively; the tofino cross chip of the fourth, fifth and sixth front card control circuits is controlled by the cross card B control circuit, the STM32 controller of the fourth, fifth and sixth front card control circuits outputs SW1 and SW2 signals, opens the PCIE4, PCIE5 and PCIE6 channels of the 1:3 type PCIE switch, and these three channels come from the cross card B through the connector; the tofino cross chip of the seventh and eighth front card control circuits is controlled by the cross card C control circuit, the STM32 controller of the seventh and eighth front card control circuits outputs SW1 and SW2 signals, opens the PCIE7 and PCIE8 channels of the 1:3 type PCIE switch, and these two channels come from the cross card C through the connector; Through the above steps, unified control of the orthogonal system tofino crossover chips is achieved, and 11 tofino crossover chips are controlled by 3 CPU modules.

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