Display panel and driving circuit thereof
By designing a driving circuit including main pixels and auxiliary pixels in the OLED display, and adjusting its grayscale in time, the problem that OLED display is difficult to achieve white balance and true color display when the LED luminance is different is solved, achieving more efficient color display and reducing costs.
Patent Information
- Application Number
- CN202310145368.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2023-01-31
- Publication Date
- 2025-03-11
- Estimated Expiration
- 2043-01-31
AI Technical Summary
When the LED luminance is different, it is difficult to meet the problems of white balance and real color display. Especially when R, G, and B are all 255 grayscale, the color cannot be improved to achieve proportion, and there is a problem of non-integer grayscale when adjusting ACC.
A driving circuit design for a display panel is adopted, in which each pixel contains one main pixel and one auxiliary pixel. The luminous color of the main pixel and the auxiliary pixel is the same, and the gray scale of the auxiliary pixel is lower than that of the main pixel. By filling the main pixel and the auxiliary pixel with different data voltages respectively, different gray scale display is realized, and ACC adjustment is achieved by adjusting the voltage of the auxiliary pixel.
It realizes grayscale adjustment of the main pixel and the auxiliary pixel in time without adding data lines and scan lines, which improves the authenticity of color display and the satisfaction of white balance, reduces costs, and releases the performance of the timing controller.
Smart Images

Figure CN116153257B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of display technology, and in particular to a display panel and a driving circuit thereof. Background Art
[0002] OLED, or Organic Light-Emitting Diode, is also known as Organic Electroluminesence Display (OELD). OLED displays are thinner, brighter, lower in power consumption, faster in response, higher in contrast, wider in color gamut, and wider in viewing angle than LCDs, and are favored by consumers. Usually after the OLED panel is prepared, the ACC (accurate color capture) adjustment will be used to adjust the Data grayscale corresponding to the R, G, and B pixels because of the different brightness of the LEDs corresponding to the R, G, and B pixels, so as to achieve a more realistic color display or meet the needs of different white balances. Usually, ACC is achieved by reducing the bright pixels (R / G / B) to match the low-brightness pixels (R / G / B). However, when R, G, and B are all 255 grayscales, it is impossible to increase a certain color to achieve the R, G, and B ratio. Generally, non-integer grayscales will be encountered during ACC adjustment, so the FRC (Frame rate control) function is also required to increase the color depth to achieve it, so it is relatively more complicated and the cost is relatively high.
[0003] Therefore, in order to solve the problem that the color display does not meet the white balance or is unrealistic due to the different brightness of LEDs in OLED, technical personnel in this field urgently need a simpler and more effective solution. Summary of the invention
[0004] The purpose of the present application is to provide a display panel and a driving circuit thereof, so as to improve the color display authenticity of the display panel and reduce the cost of the display panel.
[0005] The present application discloses a driving circuit of a display panel, wherein the display panel comprises a plurality of pixels, each of the pixels comprises a primary pixel and a secondary pixel, and the primary pixel and the secondary pixel in the same pixel have the same luminous color; the driving circuit comprises a primary pixel driving subcircuit and a secondary pixel driving subcircuit arranged in each of the pixels, the primary pixel driving subcircuit is used to drive the luminous unit in the primary pixel to emit light, and the secondary pixel driving subcircuit is used to drive the luminous unit in the secondary pixel to emit light; in the same pixel, the primary pixel driving subcircuit and the secondary pixel driving subcircuit are connected to the same data line or the same scanning line; the grayscale of the secondary pixel is lower than the grayscale of the primary pixel.
[0006] Optionally, when the driving circuit is driven in a first state, the grayscale of the main pixel is in the range of 0-255, and the grayscale of the auxiliary pixel is in the range of 0-127; when the driving circuit is driven in a second state, the grayscale of the main pixel is in the range of 0-255, and the grayscale of the auxiliary pixel is in the range of 0-255.
[0007] Optionally, within the same pixel, the main pixel driving subcircuit and the auxiliary pixel driving subcircuit are connected to the same data line and the same scan line; the main pixel driving subcircuit includes: a first data input circuit, a first capacitor circuit, a first driving circuit and a main light-emitting unit; the first data input circuit is connected to the scan signal on the scan line and the data signal on the data line, and transmits the data signal to the first node under the control of the scan signal, one end of the first capacitor circuit is connected to the first node, the other end of the first capacitor circuit is connected to the second node, and the second node is connected to the first power signal; the first driving circuit is connected to the first node, the second node and one end of the main light-emitting unit, and the other end of the main light-emitting unit is connected to the second power signal; the auxiliary pixel driving subcircuit includes: a second data input circuit, a second capacitor circuit, a second driving circuit and an auxiliary light-emitting unit; the second data input circuit is connected to the scan line The scanning signal and the data signal on the data line are transmitted to the third node under the control of the scanning signal, one end of the second capacitor circuit is connected to the third node, the other end of the second capacitor circuit is connected to the fourth node, and the fourth node is connected to the first power signal; the second driving circuit is connected to the third node, the fourth node and one end of the auxiliary light-emitting unit, and the other end of the auxiliary light-emitting unit is connected to the second power signal; the scanning line of the current row is in the scanning period, the scanning signal is divided into a first stage and a second stage, the scanning signal is a first level in the first stage, the scanning signal is a second level in the second stage, the first level is greater than the second level, the first data input circuit and the second data input circuit are turned on at the same time in the first stage, the second data input circuit remains turned on in the second stage, and the first data input circuit is in a cut-off state in the second stage.
[0008] Optionally, when the scan line in the current row is in a scan period, on the same data line, the minimum level of the data signal in the first stage is greater than the maximum level of the data signal in the second stage; the second level of the scan signal in the second stage is less than the minimum level of the data signal in the first stage.
[0009] Optionally, when the scan line of the current row is in the scan period, on the same data line, the data signal is 15-25V in the first stage, and the data signal is 0-10V in the second stage, the first level is 30V±2V, the second level is 15V±2V, and the cutoff level of the scan signal is -5V.
[0010] Optionally, the first data input circuit includes a first active switch, the second data input circuit includes a second active switch, the control end and the input end of the first active switch and the control end and the input end of the second active switch are respectively connected to the same scan line and the same data line; the first driving circuit includes a first driving transistor, the gate of the first driving transistor is connected to the first node, and the second driving circuit includes a second driving transistor, the gate of the second driving transistor is connected to the third node; when the scanning signal is in the first stage, the first active switch and the second active switch are turned on; when the scanning signal is in the second stage, the second active switch remains turned on and the first active switch is turned off.
[0011] Optionally, the width-to-length ratios of the channels of the first driving transistor and the second driving transistor are different, the saturation region operating voltage range of the first driving transistor is 15-25V, and the saturation region operating voltage range of the second driving transistor is 0-10V.
[0012] Optionally, the area of the primary pixel is larger than the area of the secondary pixel.
[0013] Optionally, each of the pixels further includes a main pixel, and two of the main pixels and one of the auxiliary pixels constitute one pixel; the two main pixels are connected to the same scan line or the same data line.
[0014] The present application also discloses a display panel, including the driving circuit of the above-mentioned display panel.
[0015] The present application changes the pixel design, and by coordinating the main pixel and the auxiliary pixel, designs the main pixel and the auxiliary pixel to different grayscales, and charges different data voltages to the main pixel and the auxiliary pixel respectively in time-sharing without adding data lines and scan lines, so as to realize different grayscale displays. And in the case of unrealistic display, the brightness of the pixel can be increased and decreased by adjusting the voltage of the auxiliary pixel, that is, adjusting the grayscale brightness of the auxiliary pixel, so as to realize ACC adjustment, which can realize more realistic color display and meet different white balance requirements. Compared with the scheme of selecting ACC and FRC in the exemplary technology, the scheme of the present application is simpler, easier to implement, and can achieve the same effect of the scheme of implementing ACC and FRC. And there is no need for a timing controller to complete ACC and FRC adjustment, which relatively releases the performance of the timing controller and is lower in cost. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] The included drawings are used to provide a further understanding of the embodiments of the present application, which constitute a part of the specification, are used to illustrate the implementation methods of the present application, and together with the text description, explain the principles of the present application. Obviously, the drawings described below are only some embodiments of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without creative work. In the drawings:
[0017] Figure 1 is a schematic diagram of a driving circuit of a display panel of the present application;
[0018] Figure 2 It is a schematic diagram of the arrangement of pixels of the present application;
[0019] Figure 3 It is a schematic diagram of the driving timing of the scan line and the data line corresponding to the current pixel of the present application;
[0020] Figure 4 is a schematic diagram of a display panel of the present application.
[0021] Among them, 1, display panel; 2, driving circuit; 10, pixel; 11, main pixel; 12, auxiliary pixel; 21, first data input circuit; 22, first capacitor circuit; 23, first driving circuit; 24, main light-emitting unit; 41, second data input circuit; 42, second capacitor circuit; 43, second driving circuit; 44, auxiliary light-emitting unit; 60, data line; 61, scan line; DETAILED DESCRIPTION
[0022] It should be understood that the terms used herein, the specific structures and functional details disclosed are only for describing specific embodiments and are representative, but the present application can be implemented in many alternative forms and should not be construed as being limited to only the embodiments described herein.
[0023] In the description of the present application, the terms "first" and "second" are used for descriptive purposes only and cannot be understood as indicating relative importance or implicitly indicating the number of technical features indicated. Therefore, unless otherwise specified, the features defined as "first" and "second" may explicitly or implicitly include one or more of the features; "multiple" means two or more. In addition, the terms "upper", "lower", "left", "right", "vertical", "horizontal", etc. indicating orientation or positional relationships are described based on the orientation or relative positional relationships shown in the accompanying drawings, and are only for the convenience of describing the simplified description of the present application, rather than indicating that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as a limitation on the present application. For those of ordinary skill in the art, the specific meanings of the above terms in the present application can be understood according to the specific circumstances.
[0024] The present application is described in detail below with reference to the accompanying drawings and optional embodiments.
[0025] Figure 1 is a schematic diagram of a driving circuit of a display panel of the present application, Figure 2 It is a schematic diagram of the arrangement of pixels of the present application, such as Figure 1-2 As shown, the present application discloses a driving circuit 2 of a display panel, wherein the display panel 1 includes a plurality of pixels 10, each of the pixels 10 includes a primary pixel 11 and a secondary pixel 12, and the primary pixel 11 and the secondary pixel 12 in the same pixel 10 have the same luminous color; the driving circuit 2 includes a primary pixel 11 driving subcircuit and a secondary pixel 12 driving subcircuit arranged in each of the pixels 10, the primary pixel 11 driving subcircuit is used to drive the luminous unit in the primary pixel 11 to emit light, and the secondary pixel 12 driving subcircuit is used to drive the luminous unit in the secondary pixel 12 to emit light; in the same pixel 10, the primary pixel 11 driving subcircuit and the secondary pixel 12 driving subcircuit are connected to the same data line 60 or the same scan line 61; the grayscale of the secondary pixel 12 is lower than the grayscale of the primary pixel 11.
[0026] The present application changes the design of the pixel 10, and by coordinating the main pixel 11 and the auxiliary pixel 12, the main pixel 11 and the auxiliary pixel 12 are designed to have different grayscales. Without adding the data line 60 and the scan line 61, the main pixel 11 and the auxiliary pixel 12 are charged with different data voltages in a time-sharing manner, so as to realize different grayscale displays. And in the case of unrealistic display, the brightness of the pixel 10 can be increased and decreased by adjusting the voltage of the auxiliary pixel 12, that is, adjusting the grayscale brightness of the auxiliary pixel 12, so as to realize ACC adjustment, realize more realistic color display, and meet different white balance requirements. Compared with the scheme of selecting ACC and FRC in the exemplary technology, the scheme of the present application is simpler, easier to implement, and can achieve the same effect of the scheme of implementing ACC and FRC. And there is no need for a timing controller to complete ACC and FRC adjustment, which relatively releases the performance of the timing controller and is lower in cost.
[0027] See also Figure 2 As shown, the pixel 10 includes a red pixel R, a green pixel G and a blue pixel B, etc. The red pixel R includes a red main pixel R2 and a red auxiliary pixel R1, the green pixel G includes a green main pixel G2 and a green auxiliary pixel G1, and the blue pixel B includes a blue main pixel B2 and a blue auxiliary pixel B1. The red pixel in this embodiment is composed of a red main pixel and a red auxiliary pixel, wherein the main pixel 11 is mainly used for display, and the auxiliary pixel 12 can adjust the required driving data voltage according to different display effects, so that the auxiliary pixel 12 can display different grayscales to compensate for the main pixel 11. The red main pixel 11 and the red auxiliary pixel 12 in this embodiment can be arranged left and right or up and down.
[0028] Specifically, the area of the main pixel 11 is larger than the area of the auxiliary pixel 12. In actual display, the display is mainly performed by the main pixel 11. The area of the auxiliary pixel 12 is set to be slightly smaller, for example, in the range of one-half to one-third of the main pixel 11, which can not only play an auxiliary role of the main pixel 11, but also avoid the problem of insufficient brightness caused by the auxiliary pixel 12 occupying too large a display area. In this embodiment, the areas of the red main pixel 11, the green main pixel 11 and the blue main pixel 11 can be further set to be the same. In practice, due to the different actual brightness of the pixels 10 of different colors, the exemplary technology often sets the pixels 10 of different colors to different sizes to achieve a more realistic color display. However, in this embodiment, the areas of the main pixels 11 of each color can be set to be the same, and the brightness compensation of the pixel 10 of the main pixel 11 can be achieved by adjusting the grayscale of the auxiliary pixel 12. In this embodiment, the areas of the auxiliary pixels 12 of each color can also be set to be different, so that the auxiliary pixels 12 have different compensation capabilities.
[0029] In order to reduce the cost of the display panel 1 and not increase the number of data lines 60 and scan lines 61 of the display panel 1 after adding the auxiliary pixel 12, in the present embodiment, the main pixel 11 driving subcircuit and the auxiliary pixel 12 driving subcircuit are connected to the same data line 60 and the same scan line 61 in the same pixel 10; specifically, the present embodiment includes:
[0030] The main pixel 11 driving subcircuit includes: a first data input circuit 21, a first capacitor circuit 22, a first driving circuit 232 and a main light-emitting unit 24; the first data input circuit 21 is connected to the scanning signal on the scanning line 61 and the data signal on the data line 60, and transmits the data signal to the first node G1 under the control of the scanning signal, one end of the first capacitor circuit 22 is connected to the first node G1, the other end of the first capacitor circuit 22 is connected to the second node S1, and the second node S1 is connected to the first power signal VDD; the first driving circuit 232 is connected to the first node G1, the second node S1 and one end of the main light-emitting unit 24, and the other end of the main light-emitting unit 24 is connected to the second power signal VDD; the auxiliary pixel 12 driving subcircuit includes: a second data input circuit 41, a second capacitor circuit 42, a second driving circuit 432 and an auxiliary light-emitting unit 44; the second data input circuit 41 is connected to the scanning signal on the scanning line 61 and the data line 60, and under the control of the scan signal, the data signal is transmitted to the third node G2, one end of the second capacitor circuit 42 is connected to the third node G2, the other end of the second capacitor circuit 42 is connected to the fourth node S2, and the fourth node S2 is connected to the first power signal; the second driving circuit 432 is connected to the third node G2, the fourth node S2 and one end of the auxiliary light-emitting unit 44, and the other end of the auxiliary light-emitting unit 44 is connected to the second power signal; when the scan line 61 of the current row is in the scan period, the scan signal is divided into a first stage and a second stage, the scan signal is a first level in the first stage, and the scan signal is a second level in the second stage, the first level is greater than the second level, the first data input circuit 21 and the second data input circuit 41 are turned on at the same time in the first stage, the second data input circuit 41 remains turned on in the second stage, and the first data input circuit 21 is in a cut-off state in the second stage.
[0031] This embodiment mainly inputs data signals of different voltages into the auxiliary pixel 12 driving circuit 2 and the main pixel 11 driving circuit 2 by time division. It mainly utilizes that the first input circuit and the second input circuit are in different states in the second stage, so that the main pixel 11 is charged in the first stage, and the auxiliary pixel 12 is charged in the second stage. In this embodiment, the use of data lines 60 and scan lines 61 is reduced, the improvement of the original circuit design is small, and the aperture ratio of the pixel 10 is increased.
[0032] The specific circuit is as follows: the first data input circuit 21 includes a first active switch T1, the second data input circuit 41 includes a second active switch T2, the control end and input end of the first active switch T1 and the control end and input end of the second active switch T2 are respectively connected to the same scan line 61 and the same data line 60; the first drive circuit 232 includes a first drive transistor Q1, the gate of the first drive transistor Q1 is connected to the first node, the second drive circuit 432 includes a second drive transistor Q2, the gate of the second drive transistor Q2 is connected to the third node; the first capacitor circuit 22 includes a first capacitor C1, the second capacitor circuit 42 includes a second capacitor C2, the first capacitor C1 and the second capacitor C2 have the same capacity. When the scan signal is in the first stage, the first active switch T1 and the second active switch T2 are turned on; when the scan signal is in the second stage, the second active switch T2 remains turned on, and the first active switch T1 is turned off.
[0033] In this embodiment, in order to achieve the purpose of turning on the second active switch T2 in both the first stage and the second stage, it is necessary to meet the requirement that when the scan line 61 of the current row is in the scan period, on the same data line 60, the minimum level of the data signal in the first stage is greater than the maximum level of the data signal in the second stage; the second level of the scan signal in the second stage is less than the minimum level of the data signal in the first stage. In the first stage, the Vgs of the first active switch T1 is greater than the Vth of the first active switch T1, and the Vgs of the second active switch T2 is greater than the Vth of the second active switch T2. In the second stage, the Vgs of the first active switch T1 is less than the Vth of the first active switch T1, and the Vgs of the second active switch T2 is still greater than the Vth of the second active switch T2. That is, in the first stage, the first active switch T1 and the second active switch T2 are turned on at the same time, and in the second stage, the second active switch T2 is turned on, while the first active switch T1 is turned off. Among them, the first active switch T1 and the second active switch T2 are both N-type thin film transistors.
[0034] Figure 3 is a schematic diagram of the driving timing of the scan line 61 and the data line 60 corresponding to the current pixel 10 of the present application, see Figure 3 As shown, the periods t1 and t2 are the scanning time corresponding to the current scanning line 61, and the periods other than t1 and t2, such as the period t3, are non-scanning periods, at which the voltage on the scanning line 61 is at a low level VGL. At time t1, the scanning signal on the scanning line 61 is at a first level VGH_H, and the data signal on the data line 60 is Data1; at time t2, the scanning signal on the scanning line 61 is at a second level VGH_M, and the data signal on the data line 60 is Data2.
[0035] The driving process of the driving circuit 2 may include three stages. In the t1 period, the scanning line 61 is fed with a scanning signal of the first level VGH_H. At this time, the Vgs of the first active switch T1 is greater than the Vth of the first active switch T1, and the Vgs of the second active switch T2 is greater than the Vth of the second active switch T2. The first active switch T1 and the second active switch T2 are turned on at the same time, and the gates of the first driving transistor Q1 of the main pixel 11 and the second driving transistor Q2 of the auxiliary pixel 12 are fed with the data signal Data1, and the main light-emitting unit 24 and the auxiliary light-emitting unit 44 are both lit. However, the difference here is that the target current flows into the main light-emitting unit 24, while the non-target current flows into the auxiliary light-emitting unit 44. However, since the time t1 is short, even if the non-target current flows into the auxiliary light-emitting unit 44 at this time, and thus the non-target brightness, it has little effect on the overall display effect. During the t2 period, the scan signal on the scan line 61 drops to the second level VGH_M. At this time, the Vgs of the first active switch T1 is less than the Vth of the first active switch T1, and the Vgs of the second active switch T2 is still greater than the Vth of the second active switch T2. Correspondingly, the second active switch T2 is turned on, and the first active switch T1 is turned off. At this time, the data signal on the data line 60 is Data2, the gate of the second driving transistor Q2 is fed with the data signal Data2, and the current flowing through the second driving transistor Q2 is controlled by Data2. At this time, the auxiliary light-emitting unit 44 flows into the target current. During the t2 period, the main light-emitting unit 24 has the first capacitor C1 to maintain the voltage. During the t3 period, the voltage on the scan line 61 drops to VGL, the first active switch T1 and the second active switch T2 are both in the off state, and the first driving transistor Q1 and the second driving transistor Q2 maintain the brightness of the main light-emitting unit 24 and the auxiliary light-emitting unit 44 of the frame through the first capacitor C1 and the second capacitor C2 until the next frame is refreshed.
[0036] It should be noted that the driving circuit 2 of the present application is implemented on the most basic 2T1C driving circuit 2. Of course, the idea of the present application is not limited to the most basic 2T1C circuit, and is also applicable to the driving circuit 2 with threshold voltage compensation, mobility compensation, and power supply voltage VDD compensation.
[0037] Specifically, when the scan line 61 of the current row is in the scan period, in order to realize that T1 can be normally turned on and off under two different VGHs, data2(max)<data1(min) and VGH_M<data1(min) must be satisfied. For example, on the same data line 60, the data signal in the first stage is 15-25V, the data signal in the second stage is 0-10V, the first level is 30V±2V, the second level is 15V±2V, and the cut-off level of the scan signal is -5V.
[0038] Specifically, the width-to-length ratios of the channels of the first driving transistor Q1 and the second driving transistor are different, the saturation region operating voltage range of the first driving transistor Q1 is 15-25V, and the saturation region operating voltage range of the second driving transistor Q2 is 0-10V.
[0039] It should be understood that the first driving transistor Q1 and the second driving transistor Q2 need to be driven by different data signals (Data1, Data2). As mentioned above, the first driving transistor Q1 is driven by 15-25V, and the second driving transistor Q2 is driven by 0-10V. Specifically, according to the TFT saturation region drain-source current formula: Wherein μ is carrier mobility, W / L is channel width-to-length ratio, C0 is gate capacitance, VDD is OLED positive voltage, Vdata is voltage fed into data line, and Vth is TFT threshold voltage. The above formula can be used to obtain the current flowing through the first driving transistor Q1 and the second driving transistor Q2, i.e., the current of the main light-emitting unit 24 and the auxiliary light-emitting unit 44. When designing the panel, the channel width-to-length ratio of the first driving transistor Q1 and the second driving transistor Q2 can be adjusted so that the main light-emitting unit 24 and the auxiliary light-emitting unit 44 are under normal operating current.
[0040] Specifically, when the driving circuit 2 is driven in the first state, the grayscale of the main pixel 11 is in the range of 0-255, and the grayscale of the auxiliary pixel 12 is in the range of 0-127; when the driving circuit 2 is driven in the second state, the grayscale of the main pixel 11 is in the range of 0-255, and the grayscale of the auxiliary pixel 12 is in the range of 0-255.
[0041] In this embodiment, the first state of the driving circuit 2 refers to the display state before adjustment, that is, the main pixel 11 normally displays 0-255 grayscale, and the auxiliary pixel 12 displays 0-127 grayscale. Here is an example, the maximum value of the auxiliary grayscale can be adjusted according to the actual situation, but in order to adjust the brightness of the pixel 10 when the main pixel 11 is displayed at 255 grayscale, the maximum value of the grayscale of the auxiliary pixel 12 cannot be set to 255, and the grayscale of the auxiliary pixel 12 cannot be increased at this time. The second state is to adjust the grayscale of the main pixel 11 to be within the range of 0-255 and the grayscale of the auxiliary pixel 12 to be displayed within the range of 0-255. When adjusting the display brightness, similar to ACC adjustment, according to the optical measurement gamma curve data, the charging data voltage of the auxiliary pixel 12 is changed, and the grayscale of the auxiliary pixel 12 can be adjusted upward or downward, so that the auxiliary pixel 12 exceeds 127 grayscale for display, so that the brightness of the main pixel 11 and the auxiliary pixel 12 can reach the required brightness.
[0042] In another embodiment, each of the pixels 10 further includes a main pixel 11, and two of the main pixels 11 and one of the auxiliary pixels 12 constitute a pixel 10; the two main pixels 11 are connected to the same scan line 61 or the same data line 60. In this embodiment, the design of two adjacent main pixels 11 sharing one auxiliary pixel 12 is mainly through the design of two adjacent main pixels 11 sharing one auxiliary pixel 12, such as the main pixel 11, auxiliary pixel 12, and main pixel 11 arranged vertically, or the main pixel 11, auxiliary pixel 12, and main pixel 11 arranged horizontally. The two main pixels 11 can be connected to the same scan line 61 as different data lines 60 or the same data line 60 as different scan lines 61. Its driving method is the same as mentioned above, and a time-sharing method of providing data voltage to the auxiliary pixel 12 is adopted, which will not be repeated here. In this embodiment, the number of auxiliary pixels 12 is reduced, thereby improving the display quality.
[0043] Figure 4 is a schematic diagram of the display panel 1 of the present application, see Figure 4 As shown, the present application also discloses a display panel 1, including the driving circuit 2 of the display panel 1 described above. The present application redesigns the auxiliary pixel 12 and the main pixel 11, charges them in time-sharing, and changes the data grayscale of the auxiliary pixel 12, so as to realize the upward and downward compensation of the brightness of the OLED panel and realize the ACC function, and the design circuit does not increase the data line 60 and the scan line 61, avoiding the additional cost. In addition, the method does not require FRC to improve the color depth, reduces the processing time of the timing controller, and can also reduce the manufacturing cost of the timing controller.
[0044] It should be noted that the inventive concept of the present application can form a large number of embodiments, but the length of the application document is limited and it is impossible to list them one by one. Therefore, under the premise of no conflict, the embodiments or technical features described above can be arbitrarily combined to form new embodiments. After the embodiments or technical features are combined, the original technical effects will be enhanced.
[0045] The above content is a further detailed description of the present application in combination with specific optional implementation methods, and it cannot be determined that the specific implementation of the present application is limited to these descriptions. For ordinary technicians in the technical field to which the present application belongs, several simple deductions or substitutions can be made without departing from the concept of the present application, which should be deemed to fall within the scope of protection of the present application.
Claims
1. A driving circuit for a display panel, characterized in that: The display panel comprises a plurality of pixels, each of the pixels comprises a primary pixel and a secondary pixel, and the primary pixel and the secondary pixel in the same pixel have the same luminous color; The driving circuit comprises a main pixel driving subcircuit and an auxiliary pixel driving subcircuit arranged in each pixel, the main pixel driving subcircuit is used to drive the light emitting unit in the main pixel to emit light, and the auxiliary pixel driving subcircuit is used to drive the light emitting unit in the auxiliary pixel to emit light; in the same pixel, the main pixel driving subcircuit and the auxiliary pixel driving subcircuit are connected to the same data line or the same scanning line; the grayscale of the auxiliary pixel is lower than the grayscale of the main pixel; In the same pixel, the main pixel driving subcircuit and the auxiliary pixel driving subcircuit are connected to the same data line and the same scan line; The main pixel driving subcircuit comprises: a first data input circuit, a first capacitor circuit, a first driving circuit and a main light-emitting unit; the first data input circuit is connected to the scanning signal on the scanning line and the data signal on the data line, and transmits the data signal to the first node under the control of the scanning signal, one end of the first capacitor circuit is connected to the first node, the other end of the first capacitor circuit is connected to the second node, and the second node is connected to the first power signal; the first driving circuit is connected to the first node, the second node and one end of the main light-emitting unit, and the other end of the main light-emitting unit is connected to the second power signal; The auxiliary pixel driving subcircuit comprises: a second data input circuit, a second capacitor circuit, a second driving circuit and an auxiliary light emitting unit; the second data input circuit receives a scan signal on the scan line and a data signal on the data line, and transmits the data signal to a third node under the control of the scan signal; one end of the second capacitor circuit is connected to the third node, the other end of the second capacitor circuit is connected to a fourth node, and the fourth node is connected to the first power signal; the second driving circuit is connected to the third node, the fourth node and one end of the auxiliary light emitting unit, and the other end of the auxiliary light emitting unit is connected to the second power signal; During the scanning period of the scanning line in the current row, the scanning signal is divided into a first stage and a second stage. The scanning signal is at a first level in the first stage, and is at a second level in the second stage. The first level is greater than the second level. The first data input circuit and the second data input circuit are turned on at the same time in the first stage, and the second data input circuit remains turned on in the second stage. The first data input circuit is in a cut-off state in the second stage.
2. The driving circuit of the display panel according to claim 1, characterized in that: When the driving circuit is driven in the first state, the grayscale of the main pixel is within the range of 0-255, and the grayscale of the auxiliary pixel is within the range of 0-127; when the driving circuit is driven in the second state, the grayscale of the main pixel is within the range of 0-255, and the grayscale of the auxiliary pixel is within the range of 0-255.
3. The driving circuit of the display panel according to claim 1, characterized in that: When the scan line in the current row is in the scan period, on the same data line, the minimum level of the data signal in the first stage is greater than the maximum level of the data signal in the second stage; the second level of the scan signal in the second stage is less than the minimum level of the data signal in the first stage.
4. The driving circuit of the display panel according to claim 3, characterized in that: When the scan line of the current row is in the scan period, on the same data line, the data signal is 15-25V in the first stage, and the data signal is 0-10V in the second stage. The first level is 30V±2V, the second level is 15V±2V, and the cut-off level of the scan signal is -5V.
5. The driving circuit of the display panel according to claim 1, characterized in that: The first data input circuit includes a first active switch, the second data input circuit includes a second active switch, the control end and the input end of the first active switch and the control end and the input end of the second active switch are respectively connected to the same scan line and the same data line; The first driving circuit comprises a first driving transistor, a gate of the first driving transistor is connected to the first node, and the second driving circuit comprises a second driving transistor, a gate of the second driving transistor is connected to the third node; When the scan signal is in the first phase, the first active switch and the second active switch are turned on; when the scan signal is in the second phase, the second active switch remains turned on and the first active switch is turned off.
6. The driving circuit of the display panel according to claim 5, characterized in that: The width-to-length ratios of the channels of the first driving transistor and the second driving transistor are different. The saturation region operating voltage range of the first driving transistor is 15-25V, and the saturation region operating voltage range of the second driving transistor is 0-10V.
7. The driving circuit of the display panel according to claim 1, characterized in that: The area of the primary pixel is larger than the area of the secondary pixel.
8. The driving circuit of the display panel according to claim 1, characterized in that: Each of the pixels further comprises a main pixel, and two of the main pixels and one of the auxiliary pixels constitute one pixel; the two main pixels are connected to the same scanning line or the same data line.
9. A display panel, characterized in that: A driving circuit for a display panel comprising any one of claims 1 to 8.
Citation Information
Patent Citations
Driving circuit and method of driving display panel
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