A synchronous acquisition circuit, system and method

Abstract

The present invention proposes a synchronous acquisition circuit, system and method, wherein the acquisition master station generates a synchronous reference clock signal, and transmits the synchronous reference clock signal to the acquisition slave stations connected in sequence; the acquisition station samples data from the sensor connected to it according to the synchronous reference clock signal and acquisition parameters to obtain a corresponding sampling signal, and transmits the sampling signal to an external device; wherein the acquisition parameters include the frequency of the synchronous reference clock signal and the ratio relationship between the target sampling frequency of the synchronous acquisition circuit and the frequency of the synchronous reference clock signal. The acquisition stations in the synchronous acquisition circuit are distributed in series, and the number of acquisition stations is no longer limited by the number of channels of the synchronous signal output. The synchronous acquisition is controlled by the synchronous reference clock signal transmitted one by one, and the line length between adjacent acquisition stations can be controlled to avoid the line being too long, thereby reducing signal attenuation and improving anti-interference ability.

Description

Technical Field

[0001] The present invention relates to the field of information transmission, and in particular to a synchronous acquisition circuit, system and method. Background Art

[0002] When monitoring large-scale equipment such as steel, cement, coal, rail transit, and electricity, it is necessary to collect and analyze signals such as vibration, impact, and displacement at each key position of the equipment, so as to monitor the large-scale equipment in an all-round way. During the monitoring process, it is necessary to synchronously collect the signals of each sensor, and conduct in-depth data analysis and processing based on the signals collected by each channel, so as to accurately analyze the working status of the large-scale equipment. The difficulty in monitoring large-scale equipment lies in the large number of sensors, their scattered distribution, and the long distances. In this case, how to achieve synchronous collection of sensor signals has become a difficult problem that technicians in this field are concerned about. Summary of the invention

[0003] The object of the present invention is to provide a synchronous acquisition circuit, system and method to at least partially improve the above-mentioned problem.

[0004] In order to achieve the above purpose, the technical solution adopted by the embodiment of the present invention is as follows:

[0005] In a first aspect, an embodiment of the present invention provides a synchronous acquisition line, the synchronous acquisition line comprising N acquisition stations, one of the N acquisition stations serving as an acquisition master station, and the remaining serving as acquisition slave stations, 2≤N, the acquisition master station being connected to the first acquisition slave station, and N-1 acquisition slave stations being connected in sequence;

[0006] The acquisition master station is used to generate a synchronous reference clock signal, and transmit the synchronous reference clock signal to N-1 acquisition slave stations connected in sequence;

[0007] The acquisition station is used to perform data sampling on the sensor connected thereto according to the synchronous reference clock signal and the acquisition parameters to obtain a corresponding sampling signal, and transmit the sampling signal to an external device;

[0008] The acquisition parameters include the frequency of the synchronous reference clock signal and the ratio relationship between the target sampling frequency of the synchronous acquisition circuit and the frequency of the synchronous reference clock signal.

[0009] Optionally, the acquisition station includes an analog-to-digital converter, a processing unit and a communication unit, and the processing unit is connected to the analog-to-digital converter and the communication unit respectively;

[0010] The analog-to-digital converter is used to connect the sensor corresponding to the acquisition station, the communication unit of the acquisition master station is connected to the communication unit of the first acquisition slave station, and the communication units of N-1 acquisition slave stations are connected in sequence;

[0011] The processing unit in the acquisition master station is used to generate the synchronous reference clock signal and transmit the synchronous reference clock signal to N-1 acquisition slave stations connected in sequence;

[0012] The processing unit in the acquisition station is used to generate a driving pulse signal according to the synchronous reference clock signal and the acquisition parameters, and transmit the driving pulse signal to the analog-to-digital converter connected thereto, so as to control the analog-to-digital converter to perform data sampling on the sensor connected thereto according to the target sampling frequency, so as to obtain a corresponding sampling signal;

[0013] The analog-to-digital converter is used to transmit the sampled signal to the processing unit;

[0014] The processing unit is used to transmit the sampling signal to an external device.

[0015] Optionally, the synchronous reference clock signal generated by the acquisition master station includes a plurality of pulse signals, and the information transmission area of ​​each pulse signal carries its corresponding pulse count information;

[0016] The acquisition station is used to obtain the characteristic edge time mark in the pulse signal when the pulse counting information is the target counting information;

[0017] The acquisition station is used to transmit the feature to the external device along the time scale;

[0018] The external device is used to perform alignment processing on the acquired sampling signals according to the characteristic edge time scale.

[0019] Optionally, the external device is used to verify the rationality of the characteristic edge timing according to the sequence number of the acquisition station in the synchronous acquisition line, and if the rationality verification passes, align the acquired sampling signal according to the characteristic edge timing.

[0020] Optionally, the acquisition station is used to identify whether the current pulse signal acquired is a valid pulse signal according to the standard pulse width;

[0021] If it is not a valid pulse signal, the acquisition station is used to remove the current pulse signal;

[0022] If it is a valid pulse signal, the acquisition station is used to update the pulse value stored therein;

[0023] The acquisition station is also used to identify the pulse counting information in the acquired pulse signal, and obtain the deviation value S between the pulse value and the pulse counting information;

[0024] If the deviation value S is not 0, the acquisition station is used to perform synchronous acquisition error correction.

[0025] Optionally, if the deviation value S is greater than 0, the acquisition station is used to suspend data sampling in the next S clock cycles, and continue to update the pulse value stored therein after S clock cycles;

[0026] Among them, 1 clock cycle corresponds to 1 pulse signal.

[0027] Optionally, if the deviation value S is less than 0 and the deviation value S is greater than a first threshold value, the acquisition station is used to update the stored pulse value according to a specified multiple when a valid pulse signal is obtained within a preset time length, and complete synchronous acquisition and error correction based on the updated pulse value.

[0028] Optionally, if the deviation value S is less than 0, and the deviation value S is less than or equal to a first threshold, and greater than a second threshold, the acquisition station is further used to generate error correction sampling points based on historical sampling signals, and update its stored pulse values ​​according to acquisition parameters.

[0029] Optionally, if the deviation value S is less than or equal to a second threshold, the acquisition station is also used to determine whether the pulse count information in the acquired pulse signal matches the data packet header. If not, data sampling is suspended; if matched, data sampling is restarted.

[0030] Optionally, the external device is used to send a data acquisition trigger signal to the acquisition master station, so that the acquisition master station generates a synchronous reference clock signal.

[0031] Optionally, the external device is used to send the acquisition parameters to each acquisition station in the synchronous acquisition line.

[0032] In a second aspect, an embodiment of the present invention provides a synchronous acquisition system, wherein the synchronous acquisition system comprises at least one of the above-mentioned synchronous acquisition lines.

[0033] In a third aspect, an embodiment of the present invention provides a synchronous acquisition method, which is applied to the above-mentioned synchronous acquisition circuit, and the method includes:

[0034] The acquisition master station generates a synchronous reference clock signal, and transmits the synchronous reference clock signal to N-1 acquisition slave stations connected in sequence;

[0035] The acquisition station performs data sampling on the sensor connected thereto according to the synchronous reference clock signal and the acquisition parameters to obtain a corresponding sampling signal, and transmits the sampling signal to an external device;

[0036] The acquisition parameters include the frequency of the synchronous reference clock signal and the ratio relationship between the target sampling frequency of the synchronous acquisition circuit and the frequency of the synchronous reference clock signal.

[0037] In a fourth aspect, an embodiment of the present invention provides a synchronous acquisition method, which is applied to an acquisition station in the above-mentioned synchronous acquisition line, wherein the synchronous reference clock signal generated by the acquisition master station includes multiple pulse signals, and each pulse signal carries its corresponding pulse count information in its information transmission area, and the method includes:

[0038] The acquisition station acquires a characteristic edge time mark in a pulse signal when the pulse counting information is the target counting information;

[0039] The acquisition station transmits the characteristic edge time scale to an external device, so that the external device performs alignment processing on the acquired sampling signals according to the characteristic edge time scale.

[0040] Optionally, the method further comprises: the acquisition station identifying, according to the standard pulse width, whether the current pulse signal acquired is a valid pulse signal;

[0041] If it is not a valid pulse signal, the acquisition station will remove the current pulse signal;

[0042] If it is a valid pulse signal, the acquisition station updates its stored pulse value;

[0043] The acquisition station identifies the pulse counting information in the acquired pulse signal, and obtains a deviation value S between the pulse value and the pulse counting information;

[0044] If the deviation value S is not 0, the collection station performs synchronous collection and error correction.

[0045] Compared with the prior art, the embodiment of the present invention provides a synchronous acquisition line, system and method, wherein the synchronous acquisition line includes N acquisition stations, one of the N acquisition stations is used as the acquisition master station, and the rest are used as acquisition slave stations, 2≤N, the acquisition master station is connected to the first acquisition slave station, and N-1 acquisition slave stations are connected in sequence; the acquisition master station is used to generate a synchronous reference clock signal, and transmit the synchronous reference clock signal to the N-1 acquisition slave stations connected in sequence; the acquisition station is used to perform data sampling on the sensor connected to it according to the synchronous reference clock signal and the acquisition parameters to obtain the corresponding sampling signal, and transmit the sampling signal to the external device; wherein the acquisition parameters include the frequency of the synchronous reference clock signal and the ratio relationship between the target sampling frequency of the synchronous acquisition line and the frequency of the synchronous reference clock signal. The acquisition stations in the synchronous acquisition line are distributed in series, and the number of acquisition stations is no longer limited by the number of channels of the synchronous signal output. The synchronous acquisition is realized by controlling the synchronous reference clock signal transmitted one by one, and the line length between adjacent acquisition stations can be controlled to avoid the line being too long, thereby reducing signal attenuation and improving anti-interference ability. In addition, the difficulty and construction cost of transmission line layout are lower.

[0046] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, preferred embodiments are given below and described in detail with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0047] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for use in the embodiments will be briefly introduced below. It should be understood that the following drawings only show certain embodiments of the present invention and therefore should not be regarded as limiting the scope. For ordinary technicians in this field, other related drawings can be obtained based on these drawings without paying creative work.

[0048] Figure 1 A schematic diagram of the structure of a synchronous acquisition circuit provided in an embodiment of the present application.

[0049] Figure 2 A schematic diagram of the structure of a collection station provided in an embodiment of the present invention.

[0050] Figure 3 A schematic diagram of the relationship between a driving pulse signal and a synchronous reference clock signal provided by an embodiment of the present invention.

[0051] Figure 4 A schematic diagram of a synchronous reference clock signal provided by an embodiment of the present invention.

[0052] Figure 5 This is a flow chart of a synchronous acquisition method provided by an embodiment of the present invention.

[0053] Figure 6 The second flowchart of the synchronous acquisition method provided by the embodiment of the present invention.

[0054] Figure 7 The third flowchart of the synchronous acquisition method provided by the embodiment of the present invention.

[0055] In the figure: 10-synchronous acquisition circuit; 20-external equipment; 100-acquisition station; 101-analog-to-digital converter; 102-processing unit; 103-communication unit. DETAILED DESCRIPTION

[0056] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Generally, the components of the embodiments of the present invention described and shown in the drawings here can be arranged and designed in various different configurations.

[0057] Therefore, the following detailed description of the embodiments of the present invention provided in the accompanying drawings is not intended to limit the scope of the invention claimed for protection, but merely represents selected embodiments of the present invention. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0058] It should be noted that similar reference numerals and letters represent similar items in the following drawings, so once an item is defined in one drawing, it does not need to be further defined and explained in the subsequent drawings. At the same time, in the description of the present invention, the terms "first", "second", etc. are only used to distinguish the description and cannot be understood as indicating or implying relative importance.

[0059] It should be noted that, in this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, the elements defined by the sentence "comprise a ..." do not exclude the existence of other identical elements in the process, method, article or device including the elements.

[0060] In the description of the present invention, it should be noted that the terms "upper", "lower", "inside", "outside", etc. indicate directions or positional relationships based on the directions or positional relationships shown in the accompanying drawings, or are directions or positional relationships in which the product of the invention is usually placed when in use. They are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific direction, be constructed and operated in a specific direction, and therefore should not be understood as a limitation on the present invention.

[0061] In the description of the present invention, it is also necessary to explain that, unless otherwise clearly specified and limited, the terms "disposed" and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be an indirect connection through an intermediate medium, or it can be the internal communication of two elements. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0062] Some embodiments of the present invention are described in detail below in conjunction with the accompanying drawings. In the absence of conflict, the following embodiments and features in the embodiments can be combined with each other.

[0063] In order to realize synchronous acquisition of sensor signals, a synchronous signal generator can be connected to each acquisition device respectively. The synchronous signal generator is used to send synchronous acquisition signals to each acquisition device to control each acquisition device to perform synchronous acquisition. When monitoring large targets (which can be equipment or buildings), more acquisition devices are required. When the synchronous signal generator is used to monitor large targets (which can be equipment or buildings), the following problems may occur:

[0064] Problem 1: The transmission and wiring of synchronous acquisition signals is difficult and costly to construct. When synchronous acquisition signals are laid out through star-shaped transmission lines, there will be more transmission lines, which will result in higher construction costs and difficulty. Especially when the acquisition stations are distributed in a straight line, the construction costs and difficulty will increase significantly.

[0065] Problem 2: The distance between the synchronous signal generator and some acquisition devices is far, so the transmission line is too long, resulting in large attenuation of the synchronous acquisition signal and the signal is susceptible to interference. The transmission line can be a coaxial line, twisted pair or ordinary transmission line. When transmitted over long distances, the signal attenuates greatly and has poor anti-interference ability, which can easily lead to false triggering at the receiving end.

[0066] Problem 3: The error correction and calibration capabilities of synchronous acquisition are insufficient. When the synchronization signal is interfered with, it is impossible to maintain the accuracy of the system's synchronous acquisition and the authenticity of subsequent data acquisition.

[0067] Problem 4: Each synchronous signal output channel of the synchronous signal generating device can be connected to a collection device, which results in a problem of weak scalability, and the number of collection devices is limited by the number of synchronous signal output channels in the synchronous signal generating device.

[0068] In order to solve the above problems, the embodiment of the present invention provides a synchronous acquisition circuit, please refer to Figure 1 , Figure 1 A schematic diagram of the structure of a synchronous acquisition circuit provided in an embodiment of the present application.

[0069] The synchronous acquisition line 10 includes N acquisition stations 100, one of the N acquisition stations 100 is used as an acquisition master station, and the rest are used as acquisition slave stations, 2≤N, the acquisition master station is connected (communication) to the first acquisition slave station, and N-1 acquisition slave stations are connected (communication) in sequence.

[0070] Optionally, when 3≤N, the i-th acquisition slave station is connected to the i+1-th acquisition slave station, and 1≤i≤N-2. The communication mode between the acquisition stations 100 may be, but is not limited to, unidirectional optical fiber communication.

[0071] In an optional implementation, the synchronous acquisition line 10 is a ring line, that is, the N-1th acquisition slave station is connected to the acquisition master station.

[0072] When the synchronous acquisition line 10 is a ring line, any acquisition station 100 in the synchronous acquisition line 10 can be used as a collection master station, and the collection master station can be flexibly configured by the external device 20. When the synchronous acquisition line 10 is not a ring line, the first acquisition station 100 in the synchronous acquisition line 10 is used as the collection master station.

[0073] The acquisition master station is used to generate a synchronous reference clock signal and transmit the synchronous reference clock signal to N-1 acquisition slave stations connected in sequence.

[0074] Optionally, the acquisition master station generates a synchronous reference clock signal when receiving an acquisition trigger signal transmitted by the external device 20; or, the acquisition master station generates a synchronous reference clock signal according to a preset period.

[0075] The acquisition master station transmits the synchronous reference clock signal to the i-th acquisition slave station, and the i-th acquisition slave station is used to transmit the received synchronous reference clock signal to the i+1-th acquisition slave station, thereby completing the one-to-one transmission of the synchronous reference clock signal.

[0076] The acquisition station 100 is used to perform data sampling on the sensor connected thereto according to the synchronous reference clock signal and the acquisition parameters to obtain a corresponding sampling signal, and transmit the sampling signal to the external device 20 .

[0077] The sampling signal includes a master sampling signal and a slave sampling signal. The external device 20 may be, but is not limited to, a server or a user's central control system. The acquisition parameters include the frequency of the synchronous reference clock signal and the ratio relationship between the target sampling frequency of the synchronous acquisition circuit 10 and the frequency of the synchronous reference clock signal.

[0078] Optionally, the frequency of the synchronous reference clock signal is at least twice the target sampling frequency.

[0079] When acquiring the acquisition parameters, the acquisition station 100 determines the target sampling frequency and the corresponding sampling period based on the ratio relationship therein, and then counts the clocks in the synchronous reference clock signal, determines the number of clocks based on the counting result, and performs data sampling on the connected sensor according to the target sampling frequency.

[0080] It should be noted that the number of sensors connected to the collection station 100 is greater than or equal to 1, and the types of the connected sensors may be different, including but not limited to vibration sensors, temperature sensors, rotation speed sensors, humidity sensors, and the like.

[0081] The external device 20 may perform comprehensive correlation analysis on the received sampling signals (comprehensive processing and analysis may be performed in combination with information such as amplitude and frequency in the sampling signals) to determine the working status of the monitored target device.

[0082] In the synchronous acquisition line provided by the embodiment of the present invention, the acquisition stations are distributed in series, and the number of acquisition stations is no longer limited by the number of channels of synchronous signal output. The synchronous acquisition is controlled by the synchronous reference clock signal transmitted one by one, and the line length between adjacent acquisition stations can be controlled to avoid the line being too long, thereby reducing signal attenuation and improving anti-interference ability. In addition, the difficulty and construction cost of transmission line layout are lower.

[0083] exist Figure 1 Based on the structure of the collection station, the embodiment of the present invention also provides an optional implementation method, please refer to Figure 2 , Figure 2 A schematic diagram of the structure of a collection station provided in an embodiment of the present invention.

[0084] The collection station 100 includes an analog-to-digital converter 101 , a processing unit 102 and a communication unit 103 . The processing unit 102 is connected to the analog-to-digital converter 101 and the communication unit 103 , respectively.

[0085] The analog-to-digital converter 101 is used to connect to the sensor corresponding to the acquisition station 100. The communication unit 103 of the acquisition master station is connected to the communication unit 103 of the first acquisition slave station, and the communication units 103 of N-1 acquisition slave stations are connected in sequence.

[0086] The analog-to-digital converter 101 is also called an A / D converter, or ADC for short. The analog-to-digital converter 101 is used to connect one or more (nearby) sensors. In some scenarios, the length of the wire between the sensor and the analog-to-digital converter 101 can be kept below 10m.

[0087] In an optional implementation, the communication unit 103 includes a first communication unit and a second communication unit. The first communication unit may be, but is not limited to, optical fiber communication, and the second communication unit may be a wired communication module or a wireless communication module, such as WiFi, 5G, 4G, and the like.

[0088] The first communication unit is used for inter-station communication within the synchronous acquisition line, including for transmitting synchronous reference clock signals between acquisition stations 100. The second communication unit is used for the acquisition station 100 to communicate with the external device 20.

[0089] In an optional implementation, the processing unit 102 includes a microprocessor (Microprocessor Unit, MPU for short) and a field programmable gate array (Field Programmable Gate Array, FPGA for short).

[0090] The FPGA is connected to the analog-to-digital converter 101, the MPU and the first communication unit, and the MPU is connected to the second communication unit.

[0091] The processing unit 102 in the acquisition master station is used to generate a synchronous reference clock signal and transmit the synchronous reference clock signal to N-1 acquisition slave stations connected in sequence.

[0092] The synchronous reference clock signal can be generated by the FPGA in the processing unit 102 of the acquisition master station, and transmitted to the first acquisition slave station in the synchronous acquisition line 10 through the first communication unit therein. The i-th acquisition slave station can forward the received synchronous reference clock signal to the lower-level device (the next acquisition slave station) through the first communication unit therein, until it is transmitted to the N-1-th acquisition slave station, thereby completing the sequential transmission of the synchronous reference clock signal in the N-1 acquisition slave stations.

[0093] The processing unit 102 (which may be an FPGA therein) in the acquisition station 100 (including the acquisition master station and the acquisition slave station) is used to generate a driving pulse signal according to the synchronous reference clock signal and the acquisition parameters, and transmit the driving pulse signal to the analog-to-digital converter 101 connected thereto, so as to control the analog-to-digital converter 101 to sample data of the sensor connected thereto according to the target sampling frequency, so as to obtain a corresponding sampling signal.

[0094] Please refer to Figure 3 , Figure 3 Schematic diagram of the relationship between the driving pulse signal and the synchronous reference clock signal provided by the embodiment of the present invention. Figure 3 As shown, the cycle length of the driving pulse signal is a predetermined multiple of the cycle length of the synchronous reference clock signal, that is, the frequency of the synchronous reference clock signal is a predetermined multiple of the frequency of the driving pulse signal.

[0095] The processing unit 102 can count the number of pulses of the synchronous reference clock signal to obtain the corresponding pulse value, and generate a driving pulse signal based on the pulse value. For example, when the cycle length of the driving pulse signal is 4 times the cycle length of the synchronous reference clock signal, when the high level of the driving pulse signal is output, when two pulse signals in the synchronous reference clock signal are received, that is, the pulse value increases by 2, the driving pulse signal can be switched to a low level, and when two pulse signals in the synchronous reference clock signal are received again, that is, the pulse value increases by 2 again, the driving pulse signal can be switched to a high level, and this is repeated, and the driving pulse signal is the working clock signal of the analog-to-digital converter 101.

[0096] When receiving the driving pulse signal, the analog-to-digital converter 101 samples data of the sensor connected thereto according to the target sampling frequency under the control of the driving pulse signal to obtain a corresponding sampling signal.

[0097] The analog-to-digital converter 101 is used to transmit the sampled signal to the processing unit 102 .

[0098] The processing unit 102 (which may be an FPGA therein) may preprocess the received sampling signal, and the preprocessing includes any one or more of filtering processing, data packet processing, and clock tag processing. Among them, filtering processing refers to filtering out noise in the sampling signal. Data packet processing refers to packaging the data of each sensor separately. When the data packet corresponding to the sensor is packaged, the data packet corresponding to the sensor is sent to the external device 20. The completion of data packet packaging may be that the duration of packaging exceeds a preset time threshold, or the length of the data packet reaches a preset length. Clock tag processing refers to adding a clock tag to the received sampling signal, and the clock tag may be the time when the analog-to-digital converter 101 transmits it to the processing unit 102.

[0099] The processing unit 102 is used to transmit the sampled signal to the external device 20 .

[0100] Optionally, the FPGA transmits the preprocessed sampling signal to the MPU, and after the MPU processes the sampling signal according to the agreed communication protocol, the MPU transmits the processed sampling signal to the external device 20 through the second communication unit.

[0101] Based on the above, the synchronous reference clock signal can be used to control all acquisition stations to perform synchronous acquisition. However, when the synchronous reference clock signal is transmitted in the synchronous acquisition line, there is still a transmission delay between the acquisition stations. In this case, how to ensure that the external device can align the sampling signals transmitted by each acquisition station? The embodiment of the present invention also provides an optional implementation method, please refer to Figure 4 , Figure 4 A schematic diagram of a synchronous reference clock signal provided by an embodiment of the present invention.

[0102] The synchronous reference clock signal generated by the acquisition master station includes multiple pulse signals, and the pulse signal includes a first blank area, a first information transmission area, a second blank area, a third blank area, a second information transmission area and a fourth blank area arranged in sequence. Among them, the lengths of the first blank area, the second blank area, the third blank area and the fourth blank area are fixed, and the lengths of the four can be the same or different, which is not limited here. The information transmission area is used to transmit data, wherein the transmitted data can be the pulse count information corresponding to the pulse. The information transmission area (first information transmission area or second information transmission area) of each pulse signal carries its corresponding pulse count information. In an optional embodiment, each information transmission area includes Q bit data bits, and the pulse count information is between 0 and 2 Q -1, when the pulse count information is 0, it means that the pulse signal is the first pulse signal of this round, when the pulse count information is j, it means that the pulse signal is the j+1th pulse signal of this round, and when the pulse count information is 2 Q -1 indicates that the pulse signal is the second in this round. Q Pulse signal, 0≤j≤2 Q -1.

[0103] In the embodiment of the present invention, the data in the information transfer area is encoded in a unipolar encoding manner to ensure that the blank area and the information transfer area can be correctly identified.

[0104] The acquisition station 100 (including the acquisition master station and the acquisition slave station) is used to obtain the characteristic edge time mark in the pulse signal when the pulse counting information is the target counting information.

[0105] The characteristic edge time mark indicates the time point when the characteristic edge appears, and the characteristic edge can be any edge (rising edge or falling edge) of the synchronous clock pulse when the acquired pulse count information is the target count information (which can be but is not limited to 0). The target count information can also be used as a collection parameter and sent by the external device 20 to each collection station 100. Alternatively, the target count information can be a predetermined fixed value.

[0106] The acquisition station 100 (including the acquisition master station and the acquisition slave station) is used to transmit the features to the external device 20 along the time scale.

[0107] The external device 20 is used to perform alignment processing on the acquired sampling signals according to the characteristic edge time scale.

[0108] Optionally, the delay Δti between each acquisition slave station and the acquisition master station is calculated according to the characteristic edge time scale transmitted by each acquisition station 100, wherein Δti represents the delay between the i-th acquisition slave station and the acquisition master station.

[0109] In an optional implementation, the external device is further used to analyze the working status of the monitored target device according to the aligned sampled signal (the amplitude information and frequency information therein) to ensure that the analysis result is more accurate.

[0110] In an optional embodiment, the external device 20 is used to verify the rationality of the characteristic edge time mark according to the sequence number of the acquisition station 100 in the synchronous acquisition line 10, and if the rationality verification passes, the acquired sampling signal is aligned according to the characteristic edge time mark.

[0111] Among them, rationality verification means that the characteristic edge time scale transmitted by the collection station with a larger sorting number is larger, or the △ti corresponding to the collection station with a larger sorting number is larger.

[0112] During the process of the acquisition station 100 transmitting the synchronous reference clock signal, the number of pulse signals may increase or decrease compared with normal operation due to external factors, thereby making the synchronous acquisition invalid.

[0113] The number of pulse signals received by the acquisition slave station is greater than the number of pulse signals actually sent by the acquisition master station, which may be caused by external interference signals. There are many factors that cause the number of pulse signals received by the acquisition slave station to be less than the number of pulse signals actually sent by the acquisition master station, and the number of lost pulses is different in different situations. In this case, regarding how to perform synchronous acquisition error correction, the embodiment of the present invention also provides an optional implementation method, please refer to the following, the acquisition slave station can perform synchronous acquisition error correction.

[0114] The acquisition station 100 (mainly the acquisition slave station) is used to identify whether the current pulse signal obtained is a valid pulse signal according to the standard pulse width.

[0115] The standard pulse width may also be used as a collection parameter and sent by the external device 20 to each collection station 100. Alternatively, the standard pulse width may be a pre-determined fixed value.

[0116] If it is not a valid pulse signal, the acquisition station 100 is used to discard the current pulse signal.

[0117] If it is a valid pulse signal, the collection station 100 is used to update the pulse value stored therein.

[0118] It should be noted that the pulse value of the collection station 100 has the same counting rule as the pulse counting information, and can also be between 0 and 2. Q -1 loop count.

[0119] The acquisition station 100 is also used to identify the pulse counting information in the acquired pulse signal, and obtain the deviation value S between the pulse value and the pulse counting information.

[0120] The deviation value S is the difference between the pulse value and the pulse counting information.

[0121] If the deviation value S is 0, it is determined that the pulse value is correct and there is no need to perform synchronous acquisition error correction.

[0122] If the deviation value S is not 0, the collection station 100 is used to perform synchronous collection error correction.

[0123] On the basis of the foregoing, regarding how the acquisition station 100 (mainly the acquisition slave station) performs synchronous acquisition error correction, the embodiment of the present invention further provides an optional implementation, please refer to the following.

[0124] If the deviation value S is greater than 0, the acquisition station 100 is used to suspend data sampling in the next S clock cycles (ie, stop updating its stored pulse values ​​in the next S clock cycles), and continue to update its stored pulse values ​​after S clock cycles.

[0125] Among them, 1 clock cycle corresponds to 1 pulse signal.

[0126] If the deviation value S is less than 0 and the deviation value S is greater than the first threshold, the collection station 100 is used to update the stored pulse value according to a specified multiple when a valid pulse signal is obtained within a preset time length, and complete synchronous collection and error correction according to the updated pulse value.

[0127] The preset time length is related to the specified multiple and the deviation value S. When the specified multiple is 2, the preset time length is S clock cycles.

[0128] Optionally, the processing unit 102 may generate a driving pulse signal according to the updated pulse value, thereby completing synchronous acquisition error correction.

[0129] If the deviation value S is less than 0, and the deviation value S is less than or equal to the first threshold, and greater than the second threshold (the second threshold can be but is not limited to the number of pulse signals corresponding to the agreed number of sampling points, and the agreed number is less than or equal to 5), the collection station 100 is also used to generate error correction sampling points based on historical sampling signals, and update its stored pulse values ​​according to the collection parameters.

[0130] The historical sampling signal may include but is not limited to the most recent preset number of sampling points, and the average value of the historical sampling signal may be used as the error correction sampling point. The preset number may be 1 or an integer greater than 1.

[0131] Optionally, after the error correction sampling points are generated, the number of pulse signals corresponding to the error correction sampling points may be increased based on the current pulse value to complete the task of updating the pulse value.

[0132] If the deviation value S is less than or equal to the second threshold, the collection station 100 is also used to determine whether the pulse count information in the acquired pulse signal matches the data packet header. If not, data sampling is suspended; if matched, data sampling is restarted.

[0133] It should be noted that the collection station 100 can perform data packet processing on the received sampling signal. Each data packet header corresponds to a pulse counting information. When the pulse counting information does not match any data packet header, data sampling is suspended; if it matches, data sampling is restarted and the stored pulse value is updated according to the matching pulse counting information.

[0134] In an optional implementation, the external device 20 is used to send a data acquisition trigger signal to the acquisition master station, so that the acquisition master station generates a synchronous reference clock signal.

[0135] The external device 20 is further used to send a data acquisition stop signal to the acquisition master station, so that the acquisition master station stops generating a synchronous reference clock signal.

[0136] In an optional implementation, the external device 20 is used to send acquisition parameters to each acquisition station 100 in the synchronous acquisition line 10 .

[0137] The acquisition parameters may be flexibly set by the external device 20, or the acquisition parameters may be fixed parameters set in advance by the staff.

[0138] The embodiment of the present invention further provides a synchronous acquisition system, which includes at least one synchronous acquisition line 10 as described above.

[0139] In the synchronous acquisition system, the acquisition master stations of different synchronous acquisition lines can be the same, that is, the lines overlap partially but not completely, or the acquisition master stations of different synchronous acquisition lines can be different, that is, different synchronous acquisition lines do not overlap at all.

[0140] The embodiment of the present invention also provides a synchronous acquisition method, which is applied to the above-mentioned synchronous acquisition circuit, please refer to Figure 5 , the synchronous acquisition method includes: S301 and S302, which are specifically described as follows.

[0141] S301, the acquisition master station generates a synchronous reference clock signal, and transmits the synchronous reference clock signal to N-1 acquisition slave stations connected in sequence.

[0142] S302, the acquisition station samples data from the sensor connected thereto according to the synchronous reference clock signal and the acquisition parameters to obtain a corresponding sampling signal, and transmits the sampling signal to an external device.

[0143] The acquisition parameters include the frequency of the synchronous reference clock signal and the ratio relationship between the target sampling frequency of the synchronous acquisition line and the frequency of the synchronous reference clock signal.

[0144] The embodiment of the present invention also provides a synchronous acquisition method, which is applied to the acquisition station in the above-mentioned synchronous acquisition line. The synchronous reference clock signal generated by the acquisition master station includes multiple pulse signals, and the information transmission area of ​​each pulse signal carries its corresponding pulse count information. Please refer to Figure 6 , the synchronous acquisition method includes: S501 and S502, which are specifically described as follows.

[0145] S501, a collection station obtains a characteristic edge time mark in a pulse signal when pulse counting information is target counting information.

[0146] S502, the acquisition station transmits the characteristic edge time mark to the external device, so that the external device performs alignment processing on the acquired sampling signals according to the characteristic edge time mark.

[0147] Please refer to Figure 7 In an optional implementation, the synchronous acquisition method further includes: S701, S702, S703, S704 and S705, which are specifically described as follows.

[0148] S701, the acquisition station identifies whether the current pulse signal obtained is a valid pulse signal according to the standard pulse width. If it is not a valid pulse signal, execute S702; if it is a valid pulse signal, execute S703.

[0149] S702, the acquisition station will remove the current pulse signal.

[0150] S703, the acquisition station updates the pulse value stored therein.

[0151] S704, the acquisition station identifies the pulse counting information in the acquired pulse signal, and obtains the deviation value S between the pulse value and the pulse counting information.

[0152] S705, if the deviation value S is not 0, the collection station performs synchronous collection error correction.

[0153] It should be noted that the synchronous acquisition method provided in this embodiment can perform the functions and uses shown in the above synchronous acquisition circuit embodiment to achieve the corresponding technical effects. For the sake of brief description, for parts not mentioned in this embodiment, reference can be made to the corresponding contents in the above embodiments.

[0154] In summary, the embodiment of the present invention provides a synchronous acquisition line, system and method, wherein the synchronous acquisition line includes N acquisition stations, one of the N acquisition stations is used as the acquisition master station, and the rest are used as acquisition slave stations, 2≤N, the acquisition master station is connected to the first acquisition slave station, and N-1 acquisition slave stations are connected in sequence; the acquisition master station is used to generate a synchronous reference clock signal, and transmit the synchronous reference clock signal to the N-1 acquisition slave stations connected in sequence; the acquisition station is used to perform data sampling on the sensor connected to it according to the synchronous reference clock signal and the acquisition parameters to obtain the corresponding sampling signal, and transmit the sampling signal to the external device; wherein the acquisition parameters include the frequency of the synchronous reference clock signal and the ratio relationship between the target sampling frequency of the synchronous acquisition line and the frequency of the synchronous reference clock signal. The acquisition stations in the synchronous acquisition line are distributed in series, and the number of acquisition stations is no longer limited by the number of channels of the synchronous signal output. The synchronous acquisition is realized by controlling the synchronous reference clock signal transmitted one by one, and the line length between adjacent acquisition stations can be controlled to avoid the line being too long, thereby reducing signal attenuation and improving anti-interference ability. In addition, the difficulty and construction cost of transmission line layout are lower.

[0155] The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention. For those skilled in the art, the present invention may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention shall be included in the protection scope of the present invention.

[0156] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations falling within the meaning and scope of the equivalent elements of the claims be included in the invention. Any reference numeral in a claim should not be considered as limiting the claim to which it relates.

Claims

1. A synchronous acquisition circuit, characterized in that: The synchronous acquisition line includes N acquisition stations, one of the N acquisition stations is used as an acquisition master station, and the rest are used as acquisition slave stations, 2≤N, the acquisition master station is connected to the first acquisition slave station, and N-1 acquisition slave stations are connected in sequence; The acquisition master station is used to generate a synchronous reference clock signal, and transmit the synchronous reference clock signal to N-1 acquisition slave stations connected in sequence; The acquisition station is used to perform data sampling on the sensor connected thereto according to the synchronous reference clock signal and acquisition parameters to obtain a corresponding sampling signal, and transmit the sampling signal to an external device; wherein the acquisition parameters include the frequency of the synchronous reference clock signal and the ratio relationship between the target sampling frequency of the synchronous acquisition line and the frequency of the synchronous reference clock signal; The synchronous reference clock signal generated by the acquisition master station includes a plurality of pulse signals, and the information transmission area of ​​each pulse signal carries its corresponding pulse count information; The acquisition station is used to obtain the characteristic edge time mark in the pulse signal when the pulse counting information is the target counting information; The acquisition station is used to transmit the feature to the external device along the time scale; The external device is used to verify the rationality of the characteristic edge timing according to the sequence number of the acquisition station in the synchronous acquisition line. If the rationality verification passes, the acquired sampling signal is aligned according to the characteristic edge timing, wherein the rationality verification means that the acquisition station with a larger sequence number transmits a larger characteristic edge timing.

2. The synchronous acquisition circuit according to claim 1, characterized in that: The acquisition station includes an analog-to-digital converter, a processing unit and a communication unit, and the processing unit is connected to the analog-to-digital converter and the communication unit respectively; The analog-to-digital converter is used to connect the sensor corresponding to the acquisition station, the communication unit of the acquisition master station is connected to the communication unit of the first acquisition slave station, and the communication units of N-1 acquisition slave stations are connected in sequence; The processing unit in the acquisition master station is used to generate the synchronous reference clock signal and transmit the synchronous reference clock signal to N-1 acquisition slave stations connected in sequence; The processing unit in the acquisition station is used to generate a driving pulse signal according to the synchronous reference clock signal and the acquisition parameters, and transmit the driving pulse signal to the analog-to-digital converter connected thereto, so as to control the analog-to-digital converter to perform data sampling on the sensor connected thereto according to the target sampling frequency, so as to obtain a corresponding sampling signal; The analog-to-digital converter is used to transmit the sampled signal to the processing unit; The processing unit is used to transmit the sampling signal to an external device.

3. The synchronous acquisition circuit according to claim 1, characterized in that: The acquisition station is used to identify whether the current pulse signal obtained is a valid pulse signal according to the standard pulse width; If it is not a valid pulse signal, the acquisition station is used to remove the current pulse signal; If it is a valid pulse signal, the acquisition station is used to update the pulse value stored therein; The acquisition station is also used to identify the pulse counting information in the acquired pulse signal, and obtain the deviation value S between the pulse value and the pulse counting information; If the deviation value S is not 0, the acquisition station is used to perform synchronous acquisition error correction, including: if the deviation value S is greater than 0, the acquisition station is used to suspend data sampling within the next S clock cycles, and continue to update its stored pulse value after S clock cycles; if the deviation value S is less than 0, and the deviation value S is greater than a first threshold, the acquisition station is used within a preset time length, and the acquisition station is also used to update its stored pulse value according to a specified multiple when a valid pulse signal is obtained, and complete synchronous acquisition error correction according to the updated pulse value; if the deviation value S is less than 0, and the deviation value S is less than or equal to the first threshold, and greater than the second threshold, the acquisition station is also used to generate error correction sampling points according to historical sampling signals, and update its stored pulse value according to acquisition parameters; if the deviation value S is less than or equal to the second threshold, the acquisition station is also used to determine whether the pulse count information in the acquired pulse signal matches the data packet header, if not, suspend data sampling; if matching, restart data sampling; wherein, 1 clock cycle corresponds to 1 pulse signal.

4. The synchronous acquisition circuit according to claim 1, characterized in that: The external device is used to send a data acquisition trigger signal to the acquisition master station, so that the acquisition master station generates a synchronous reference clock signal.

5. The synchronous acquisition circuit according to claim 1, characterized in that: The external device is used to send the acquisition parameters to each acquisition station in the synchronous acquisition line.

6. A synchronous acquisition system, characterized in that: The synchronous acquisition system comprises at least one synchronous acquisition line according to any one of claims 1-5.

7. A synchronous acquisition method, characterized in that: Applied to the synchronous acquisition circuit according to any one of claims 1 to 5, the method comprises: The acquisition master station generates a synchronous reference clock signal, and transmits the synchronous reference clock signal to N-1 acquisition slave stations connected in sequence; The acquisition station samples data from the sensor connected to it according to the synchronous reference clock signal and the acquisition parameters to obtain a corresponding sampling signal, and transmits the sampling signal to an external device; wherein the acquisition parameters include the frequency of the synchronous reference clock signal and the ratio relationship between the target sampling frequency of the synchronous acquisition line and the frequency of the synchronous reference clock signal, The synchronous reference clock signal generated by the acquisition master station includes a plurality of pulse signals, and the information transmission area of ​​each pulse signal carries its corresponding pulse count information. The method further includes: The acquisition station acquires a characteristic edge time mark in a pulse signal when the pulse counting information is the target counting information; The acquisition station transmits the feature to the external device along the time scale; The external device performs rationality verification on the characteristic edge timing according to the sequence number of the acquisition station in the synchronous acquisition line. If the rationality verification passes, the acquired sampling signal is aligned according to the characteristic edge timing, wherein the rationality verification means that the acquisition station with a larger sequence number transmits a larger characteristic edge timing.

8. A synchronous acquisition method, characterized in that: The acquisition station used in the synchronous acquisition line of any one of claims 1 to 5, wherein the synchronous reference clock signal generated by the acquisition master station includes a plurality of pulse signals, and the information transmission area of ​​each pulse signal carries its corresponding pulse count information, and the method includes: The acquisition station acquires a characteristic edge time mark in a pulse signal when the pulse counting information is the target counting information; The acquisition station transmits the characteristic edge time stamp to an external device, so that the external device performs rationality verification on the characteristic edge time stamp according to the sequence number of the acquisition station in the synchronous acquisition line. If the rationality verification passes, the acquired sampling signal is aligned according to the characteristic edge time stamp, wherein the rationality verification means that the acquisition station with a larger sequence number transmits a larger characteristic edge time stamp.

9. The synchronous acquisition method according to claim 8, characterized in that: The method further comprises: The acquisition station identifies whether the current pulse signal acquired is a valid pulse signal according to the standard pulse width; If it is not a valid pulse signal, the acquisition station will remove the current pulse signal; If it is a valid pulse signal, the acquisition station updates its stored pulse value; The acquisition station identifies the pulse counting information in the acquired pulse signal, and obtains a deviation value S between the pulse value and the pulse counting information; If the deviation value S is not 0, the acquisition station performs synchronous acquisition error correction, including: if the deviation value S is greater than 0, the acquisition station is used to suspend data sampling within the next S clock cycles, and continue to update its stored pulse value after S clock cycles; if the deviation value S is less than 0, and the deviation value S is greater than a first threshold, the acquisition station is used within a preset time length, and the acquisition station is also used to update its stored pulse value according to a specified multiple when a valid pulse signal is obtained, and complete synchronous acquisition error correction according to the updated pulse value; if the deviation value S is less than 0, and the deviation value S is less than or equal to the first threshold, and greater than the second threshold, the acquisition station is also used to generate error correction sampling points according to historical sampling signals, and update its stored pulse value according to acquisition parameters; if the deviation value S is less than or equal to the second threshold, the acquisition station is also used to determine whether the pulse count information in the acquired pulse signal matches the data packet header, if not, suspend data sampling; if matching, restart data sampling; wherein, 1 clock cycle corresponds to 1 pulse signal.

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