A phased array probe device with built-in storage function

By integrating the memristor memory unit in the phased array probe device in series circuit board, the storage and image processing functions are realized, and the existing phased array equipment is solved, the size and weight of the host are reduced, and the weight of the host is improved. Application scope.

CN119023814BActive Publication Date: 2025-02-18ZHEJIANG ZHENENG TECHN RES INST CO LTD
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Patent Information

Application Number
CN202411495963.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2024-10-25
Publication Date
2025-02-18
Estimated Expiration
2044-10-25

AI Technical Summary

Technical Problem

The existing phased array ultrasonic detection equipment has a large volume and weight, making it difficult to use in environments with poor working conditions.

Method used

A phased array probe device with its own storage function is designed, and the storage and image processing functions are realized by integrating the memristor memory unit into the probe, thereby reducing the size and weight of the host.

Benefits of technology

It effectively reduces the size and weight of the phased array equipment host, improves the application range of ultrasonic phased array technology, and simplifies the production process.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention discloses a phased array probe device with a storage function. The probe device as a whole is mainly composed of a housing, a back substrate, an inner sleeve, a matching layer, a memristor storage unit series circuit board, a piezoelectric composite material chip and a corresponding matching layer. The memristor storage unit is a sandwich structure, and the main components from bottom to top are a metal coating, a dielectric layer, and a metal coating array. The probe device has a built-in storage function and a certain image recognition capability, which can effectively simplify the size and weight of the phased array host device, and it is even possible to use a mobile phone or a tablet to replace the heavy phased array host device, and has broad application prospects in the field of non-destructive testing.
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Description

Technical Field

[0001] The invention belongs to the field of nondestructive testing, and in particular relates to a phased array probe device with a built-in storage function. Background Art

[0002] With the rapid development of electronic technology and computer technology, ultrasonic phased array technology has been gradually applied to industrial non-destructive testing, especially in the fields of thermal power, nuclear industry and aviation industry. For example, the detection of the sealing weld of the reheater through the ceiling of a thermal power plant is a complex sealing structure and densely packed with pipes, which cannot be detected by X-ray and conventional ultrasonic testing. The use of phased array ultrasonic testing technology can detect crack defects. However, the current size and weight of the phased array are relatively large. For example, the size (height × width × depth) of the industry-leading fully integrated 16-channel phased array ultrasonic testing equipment currently produced by a certain company is 221 × 271 × 120 mm (8.7 × 10.6 × 4.7 inches) and the weight is (including a battery) 4.54 kg (10.0 pounds). For technicians, it is extremely inconvenient to use in some poor working conditions.

[0003] Ultrasonic phased array is a combination of ultrasonic probe chips, which are arranged according to a certain pattern. Then, each chip is stimulated one by one according to a predetermined delay time. The ultrasonic waves emitted by all chips form an overall wavefront. Ultrasonic phased array detection technology uses multi-element transducers of different shapes to generate and receive ultrasonic beams. By controlling the different delay times of the pulses emitted by each element in the transducer array, the phase relationship when the sound wave arrives at (or comes from) a certain point in the object is changed to achieve ultrasonic beam scanning, deflection and focusing. Then, a combination of mechanical scanning and electronic scanning is used to achieve image formation. A one-dimensional linear array probe is usually used. The piezoelectric chips are arranged in a straight line, and the focused sound field is in the form of a sheet. A two-dimensional image with defects can be obtained. The structure of this type of two-dimensional image is not complicated. At present, it is not difficult to use memristor integrated circuits to identify and process this type of two-dimensional image.

[0004] Memristor arrays have many advantages, such as non-volatile memory, high speed and low power consumption, simple structure, multi-level storage, and easy high-level integration. They show great application prospects in the new generation of high-density non-volatile memory, brain-like artificial intelligence, complex image processing, high-performance logic operations, and confidential communications. They provide a feasible route for developing a new computer architecture that integrates information storage and processing and breaking through the bottleneck of the traditional von Neumann architecture. In addition, the sandwich structure of the memristor unit array is similar to the structure of the ultrasonic probe wafer. Its manufacturing process is compatible with the traditional complementary metal oxide semiconductor (CMOS) process and is easy to integrate, which is consistent with the existing mature phased array probe preparation process. The present invention proposes a new design method, which is to transfer the storage and image processing capabilities in the host to the probe to minimize the size and weight of the phased array device host. Summary of the invention

[0005] The purpose of the present invention is to provide a phased array probe device with a built-in storage function. The phased array probe device manufactured by this method has a built-in storage function and a certain image processing capability, which can effectively reduce the weight of the host and improve the application scope of ultrasonic phased array technology.

[0006] The objective of the present invention is achieved through the following technical solutions:

[0007] A phased array probe device with a built-in storage function comprises a shell, a multi-conductor coaxial cable arranged on the shell, and a corresponding matching layer, a piezoelectric composite material chip and a memristor storage and computing unit series circuit board which are encapsulated in the shell and arranged in sequence from bottom to top; the memristor storage and computing unit in the memristor storage and computing unit series circuit board has a sandwich structure, which comprises a metal coating at a lower part, a dielectric layer at a middle part and a metal coating array at an upper part, and the metal coating array at an upper part is connected to the multi-conductor coaxial cable.

[0008] Furthermore, in the memristor storage and computing unit series circuit board, the metal coating at the bottom is made of one of Au, Pt or Cu, and the size of the metal coating needs to cover all the chips in the piezoelectric composite chip to ensure that the current at the metal coating can be transmitted to each piezoelectric composite chip, and the metal coating and the piezoelectric composite chip are combined by physical vapor deposition.

[0009] Furthermore, in the memristor storage and computing unit series circuit board, the dielectric layer is made of wide bandgap metal oxide material, and the combination method of the dielectric layer and the metal plating layer includes but is not limited to physical vapor deposition and chemical vapor deposition.

[0010] Furthermore, in the memristor storage and computing unit series circuit board, the metal plating array adopts one of Au, Pt, Ag, Al or Cu, the thickness of the metal plating array is 50nm~10um, and the combination method of the metal plating array and the dielectric layer includes but is not limited to physical vapor deposition, and the metal plating array is prepared by photoresist etching or using a metal mask.

[0011] Furthermore, in the memristor storage and computing unit series circuit board, the array types of the metal plating array include but are not limited to a linear array, a two-dimensional rectangular array and a circular array.

[0012] Furthermore, in the metal plating array, the size range of a single array is 10um~1mm×10um~1mm.

[0013] Furthermore, the metal coating array is connected to the conductors in the multi-conductor coaxial cable, and the connection method includes but is not limited to welding.

[0014] Furthermore, an inner sleeve is arranged inside the outer shell, and the inner space of the outer shell is filled with a back substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0015] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings required for use in the description of the embodiments will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0016] Figure 1 This is a schematic diagram of the structure of a phased array probe device with built-in storage function, where A is the external features of the device and B is the internal structure of the probe device:

[0017] Figure 2 The diagram is a schematic diagram of the structure of a 3×4 memristor storage-computing serial circuit board, a cross-sectional diagram of a storage-computing memristor unit, and a microscopic morphology of a storage-computing memristor unit, wherein A is a schematic diagram of the structure of a 3×4 storage-computing array of a memristor storage-computing unit serial circuit board, B is a cross-sectional structure of a storage-computing memristor unit, and C is a SEM microscopic morphology of a storage-computing memristor unit;

[0018] Figure 3 Schematic diagram of three types of arrays of metal coatings; A is linear (linear array), B is planar (two-dimensional rectangular array), and C is annular (circular array);

[0019] Figure 4 A circuit diagram for the serial operation of the storage and calculation units of the memristors in a phased array probe device with a built-in storage function;

[0020] Figure 5 This is a schematic diagram of the pulse voltage applied to the device in the present invention;

[0021] Figure 6 This is a schematic diagram of the non-volatile storage characteristics exhibited by the prepared device in the present invention;

[0022] Figure 7 This is a schematic diagram of the image recognition function exhibited by the prepared device in the present invention.

[0023] Compared with the prior art, the phased array probe device with built-in storage function provided by the present invention has the following beneficial effects:

[0024] 1. The present invention provides a memristor memory array connected to a series circuit board, so that the phased array probe device has a storage function and certain pattern recognition and processing capabilities, which can reduce the size and weight of the phased array device host, and provides a design idea and direction for using a mobile device to replace a phased array host device, which has broad application prospects in the field of non-destructive testing;

[0025] Second, the thickness of the memory array of the memristor memory-computing series circuit board provided in the present invention is maintained at the nanometer to micrometer level, which does not increase the volume and weight of the mature phased array probe in the existing market, and is easy to carry;

[0026] 3. The preparation process of the storage device of the present invention is compatible with the traditional complementary metal oxide semiconductor (CMOS) process and is consistent with the preparation process of the existing phased array probe device, which greatly reduces the complexity of the process and is conducive to simplifying the production process of the device. DETAILED DESCRIPTION

[0027] The following examples are intended to further illustrate the present invention, rather than to limit the scope of protection of the claims of the present invention.

[0028] In order to enable those skilled in the art to better understand the technical solutions in the embodiments of the present invention and to make the above-mentioned objects, features and advantages of the present invention more obvious and understandable, the specific implementation modes of the present invention are further described below.

[0029] The endpoints and any values ​​of the ranges disclosed in this article are not limited to the precise ranges or values, and these ranges or values ​​should be understood to include values ​​close to these ranges or values. For numerical ranges, the endpoint values ​​of each range, the endpoint values ​​of each range and the individual point values, and the individual point values ​​can be combined with each other to obtain one or more new numerical ranges, which should be considered as specifically disclosed in this article.

[0030] A phased array probe device with built-in storage function comprises a housing 1, a back substrate 2, an inner sleeve 3, a memristor storage unit series circuit board 4, a piezoelectric composite material chip 5 and a corresponding matching layer 6 and a multi-conductor coaxial cable 7.

[0031] Specifically, the corresponding matching layer 6, the piezoelectric composite material chip 5 and the memristor storage and computing unit series circuit board 4 are packaged in the housing 1 and arranged in sequence from top to bottom.

[0032] Specifically, the unit array of the memristor array unit is a sandwich structure, which includes a metal coating 41 at the bottom, a dielectric layer 42 at the middle, and a metal coating array 43 at the top;

[0033] The metal coating 41 is made of one of Au, Pt or Cu, the size of the metal coating 41 is consistent with the size of the piezoelectric composite material chip 5, and the metal coating 41 and the piezoelectric composite material chip 5 are preferably combined by physical vapor deposition.

[0034] The dielectric layer 42 is a wide bandgap metal oxide material, such as TiO2, Al2O3 and SiO2, etc., and may also include perovskite, organic materials (such as silk protein), and graphene-based two-dimensional materials, etc. The combination of the metal oxide material and the metal coating 41 includes, but is not limited to, physical vapor deposition, chemical vapor deposition, and photoresist etching.

[0035] The metal coating array 43 uses one of Au, Pt, Ag, Al or Cu, and the thickness of the metal coating array 43 ranges from 50nm to 10um. The combination of the metal coating array 43 and the dielectric layer 42 preferably uses physical vapor deposition. The metal coating array 43 needs to select the corresponding array type; the array types that can be selected for the metal coating array 43 include but are not limited to linear (linear array), planar (two-dimensional rectangular array) and annular (circular array). The size range of the array unit of the metal coating array 43 is 10um~1mm×10um~1mm. The metal coating array 43 needs to be connected to the wires in the multi-conductor coaxial cable 7.

[0036] Specifically, the metal coating array 43 is connected to the conductors in the multi-conductor coaxial cable 7 , and the connection method includes but is not limited to welding.

[0037] Specifically, the size of the metal coating layer 41 is consistent with the size of the piezoelectric composite material chip 5 to ensure that the current at the metal coating layer 41 can be smoothly transmitted to each piezoelectric composite material chip 5 .

[0038] The working principle of the phased array probe device with built-in storage function in this embodiment is as follows:

[0039] The pulse voltage (such as Figure 5 The memristor storage unit circuit board 4 is connected to the metal plating array 43 in the memristor storage unit circuit board 4, activating the memristor storage unit circuit board 4, so that the dielectric layer 42 in the memristor storage unit circuit board 4 changes from an insulating state to a conductive state. At this time, the memristor storage unit circuit board 4 is in an ON state. Figure 6As shown, the current is then transmitted to the piezoelectric composite material chip 5 through the metal plating layer 41. The piezoelectric composite material chip 5 can convert the electrical signal into an ultrasonic signal, and by controlling the phase and amplitude of each transmitter in the piezoelectric composite material chip 5, the focusing and directional emission of the ultrasonic wave can be realized. After the ultrasonic wave is emitted, it will propagate in the medium and interact with the object. During the propagation process, the ultrasonic wave will be attenuated, scattered and reflected by the medium. Finally, after the ultrasonic wave reaches the piezoelectric composite material chip 5, the receiver in the piezoelectric composite material chip 5 converts the ultrasonic signal into an electrical signal, and the electrical signal is finally transmitted to the memristor storage and computing unit series circuit board 4. After the single pulse voltage ends, the dielectric layer 42 in the memristor storage and computing unit series circuit board 4 changes from a conductive state to an insulating state, and the memristor storage and computing unit series circuit board 4 is in a closed (OFF) state, and finally a single information storage is completed.

[0040] The embodiments of the present invention are described in detail above, but the present invention is not limited to the described embodiments. For those skilled in the art, various changes, modifications, substitutions and variations made to these embodiments without departing from the principles and spirit of the present invention are still within the protection scope of the present invention.

[0041] The following is a specific example of manufacturing a phased array probe device with a storage function provided by the present invention:

[0042] Production Example 1

[0043] like Figure 1 The manufacturing process of a phased array probe device with a built-in storage function is as follows:

[0044] A. The piezoelectric composite material wafer 5 and the corresponding matching layer 6 are made of lithium sulfate (Li2SO4) single crystal material and polysulfone system which are mature in the market.

[0045] B. Depositing Au metal coating 41 on the piezoelectric composite material wafer 5: Using magnetron sputtering equipment, a metal gold (Au) film is deposited on the piezoelectric composite material wafer 5 prepared in step A as the metal coating 41, with a film thickness of about 80 nm; the basic process parameters are: when the chamber vacuum is evacuated to 5×10 -3 After reaching 600 Pa, Ar gas with a purity of 99.999% was introduced to maintain the pressure at 0.6 Pa, and then the power of the Au target (with a purity of 99.99%) was turned on, the target power was 600 W, and the deposition time was 1 to 3 minutes.

[0046] C. Deposit the Al2O3 dielectric layer 42 on the Au metal coating layer 41 by magnetron sputtering: Before sputtering, in order to ensure the quality of the film, the background vacuum pressure of the chamber was extracted to 3.0×10 -4Pa, 30 sccm of Ar gas is introduced during the sputtering process and the pressure of the chamber is maintained at 1 Pa. When the RF sputtering power is 100-120 W, a 120-150 nm Al2O3 dielectric layer 42 thin film is grown on the Au metal coating 41.

[0047] D. Depositing Ag metal coating array 43 on Al2O3 dielectric layer 42: Using magnetron sputtering equipment, place a linear (line array) mask on the Al2O3 dielectric layer 42 prepared in step C, and then deposit a metal silver (Ag) film as the metal coating array 43, with a film thickness of about 100nm. The basic process parameters are: wait until the chamber vacuum is evacuated to 5×10 -3 After 0.6 Pa, Ar gas with a purity of 99.999% was introduced, and the pressure was maintained at 0.6 Pa. Then, the power supply of the Ag target (purity of 99.99%) was turned on, the target power was 600 W, and the deposition time was 2 to 5 minutes.

[0048] E. Bond the metal coating array 43 and the conductors in the multi-conductor coaxial cable 7 by spot welding.

[0049] F. Finally, the inner sleeve 3, the back substrate 2 and the outer shell 1 are assembled in sequence on the outer surface of the device to complete the production of the phased array probe device with a self-storage function.

[0050] Production Example 2

[0051] like Figure 1 The manufacturing process of a phased array probe device with a built-in storage function is as follows:

[0052] A. The piezoelectric composite material wafer 5 and the corresponding matching layer 6 are made of the mature polycrystalline material barium titanate and organic glass system.

[0053] B. Depositing a Ag metal coating 41 on the piezoelectric composite material wafer 5: Using a magnetron sputtering device, a silver (Ag) film is deposited as a metal coating 41 on the piezoelectric composite material wafer 5 prepared in step A. The film thickness is about 80 nm. The basic process parameters are: when the vacuum degree of the chamber is evacuated to 5×10 -3 After reaching 600 Pa, Ar gas with a purity of 99.999% was introduced to maintain the pressure at 0.6 Pa, and then the power of the Au target (with a purity of 99.99%) was turned on, the target power was 600 W, and the deposition time was 1 to 3 minutes.

[0054] C. Deposit the BaTiO3 dielectric layer 42 on the Ag metal coating layer 41 by magnetron sputtering: Before sputtering, in order to ensure the quality of the film, the background vacuum pressure of the chamber is extracted to 3.0×10 -4Pa, 30 sccm of Ar gas is introduced during the sputtering process and the pressure of the chamber is maintained at 1 Pa. Then, a 40-70 nm BaTiO3 film is grown on the Ag metal coating 41 at an RF sputtering power of 50-80 W.

[0055] D. Depositing Au metal coating array 43 on BaTiO3 dielectric layer 42: Using magnetron sputtering equipment, place a ring (circular array) mask on the BaTiO3 dielectric layer 42 prepared in step C, and then deposit a metal gold (Au) film as the metal coating array 43, with a film thickness of about 100nm. The basic process parameters are: wait until the chamber vacuum is evacuated to 5×10 -3 After 0.6 Pa, Ar gas with a purity of 99.999% was introduced, and the pressure was maintained at 0.6 Pa. Then, the power supply of the Au target (purity of 99.99%) was turned on, the target power was 600 W, and the deposition time was 2 to 5 minutes.

[0056] E. Bond the metal coating array 43 and the conductors in the multi-conductor coaxial cable 7 by spot welding.

[0057] F. Finally, the inner sleeve 3, the back substrate 2 and the outer shell 1 are assembled in sequence on the outer surface of the device to complete the production of the phased array probe device with a self-storage function.

[0058] Production Example 3

[0059] like Figure 1 The manufacturing process of a phased array probe device with a built-in storage function is as follows:

[0060] A. The piezoelectric composite material wafer 5 and the corresponding matching layer 6 are made of lithium sulfate (Li2SO4) single crystal material and polysulfone system which are mature in the market.

[0061] B. Depositing Au metal coating 41 on the piezoelectric composite material wafer 5: Using magnetron sputtering equipment, a metal gold (Au) film is deposited on the piezoelectric composite material wafer 5 prepared in step A as the metal coating 41, with a film thickness of about 80 nm. The basic process parameters are: when the vacuum degree of the chamber is evacuated to 5×10 -3 After reaching 600 Pa, Ar gas with a purity of 99.999% was introduced to maintain the pressure at 0.6 Pa, and then the power of the Au target (with a purity of 99.99%) was turned on, the target power was 600 W, and the deposition time was 1 to 3 minutes.

[0062] C. Deposit the Al2O3 dielectric layer 42 on the Au metal coating layer 41 by magnetron sputtering: Before sputtering, in order to ensure the quality of the film, the background vacuum pressure of the chamber was extracted to 3.0×10 -4Pa, 30 sccm of Ar gas is introduced during the sputtering process and the pressure of the chamber is maintained at 1 Pa. When the RF sputtering power is 100-120 W, a 120-150 nm Al2O3 dielectric layer 42 thin film is grown on the Au metal coating 41.

[0063] D. Depositing the Ag metal coating array 43 on the Al2O3 dielectric layer 42: Using magnetron sputtering equipment to deposit a metal silver (Ag) film as the metal coating array 43, the film thickness is about 100nm, and the basic process parameters are: when the chamber vacuum is pumped to 5×10 -3 After 400 Pa, Ar gas with a purity of 99.999% is introduced to maintain the pressure at 0.6 Pa, and then the Ag target (purity of 99.99%) power supply is turned on, the target power is 600 W, and the deposition time is 2 to 5 minutes; then a ring (circular array) is etched on the metal coating array 43 using photoresist, and then the surface of the metal coating array 43 is cleaned.

[0064] E. Bond the metal coating array 43 and the conductors in the multi-conductor coaxial cable 7 by spot welding.

[0065] F. Finally, the inner sleeve 3, the back substrate 2 and the outer shell 1 are assembled in sequence on the outer surface of the device to complete the production of the phased array probe device with a self-storage function.

Claims

1. A phased array probe device with built-in storage function, characterized in that: It comprises a housing (1), a multi-conductor coaxial cable (7) arranged on the housing (1), and corresponding matching layers (6), a piezoelectric composite material chip (5), and a memristor storage and computing unit series circuit board (4) which are arranged in sequence from bottom to top and are encapsulated in the housing (1); the memristor storage and computing unit in the memristor storage and computing unit series circuit board (4) is in a sandwich structure, comprising a lower metal coating (41), a middle dielectric layer (42), and an upper metal coating array (43); the upper metal coating array (43) is connected to the multi-conductor coaxial cable (7); In the memristor storage and computing unit series circuit board (4), the lower metal coating (41) is made of one of Au, Pt or Cu, the size of the lower metal coating (41) needs to cover all the chips in the piezoelectric composite chip (5) to ensure that the current at the lower metal coating (41) can be transmitted to each piezoelectric composite chip (5), and the lower metal coating (41) and the piezoelectric composite chip (5) are combined by physical vapor deposition; In the upper metal coating array (43), the size of a single array ranges from 10um to 1mm×10um to 1mm; The pulse voltage is transmitted to the metal plating array (43) in the memristor storage and computing unit series circuit board (4) through the multi-conductor coaxial cable (7), and the memristor storage and computing unit series circuit board (4) is activated, so that the dielectric layer (42) in the memristor storage and computing unit series circuit board (4) is changed from an insulating state to a conductive state, and the memristor storage and computing unit series circuit board (4) is in an on state; then the current is transmitted to the piezoelectric composite material chip (5) through the metal plating layer (41), and the piezoelectric composite material chip (5) converts the electrical signal into an ultrasonic signal, and controls the piezoelectric composite material chip (4) to generate an ultrasonic wave. The phase and amplitude of each transmitter in the chip (5) are adjusted to achieve focusing and directional emission of the ultrasonic wave. After emission, the ultrasonic wave propagates in the medium and reaches the piezoelectric composite material chip (5). The receiver in the piezoelectric composite material chip (5) converts the ultrasonic wave signal into an electrical signal, which is transmitted to the memristor storage and computing unit series circuit board (4). After a single pulse voltage ends, the dielectric layer (42) in the memristor storage and computing unit series circuit board (4) changes from a conductive state to an insulating state, and the memristor storage and computing unit series circuit board (4) is in a closed state, completing a single information storage.

2. The phased array probe device with built-in storage function according to claim 1, characterized in that: In the memristor storage and computing unit series circuit board (4), the dielectric layer (42) is made of a wide bandgap metal oxide material, and the dielectric layer (42) and the lower metal plating layer (41) are combined in a manner including, but not limited to, physical vapor deposition and chemical vapor deposition.

3. The phased array probe device with built-in storage function according to claim 1, characterized in that: In the memristor storage and computing unit series circuit board (4), the upper metal coating array (43) is made of one of Au, Pt, Ag, Al or Cu, the thickness of the upper metal coating array (43) is 50nm~10um, the combination method of the upper metal coating array (43) and the dielectric layer (42) includes but is not limited to physical vapor deposition, and the upper metal coating array (43) is prepared by photoresist etching or using a metal mask.

4. The phased array probe device with built-in storage function according to claim 1, characterized in that: In the memristor storage and computing unit series circuit board (4), the array type of the upper metal plating layer array (43) includes but is not limited to a linear array, a two-dimensional rectangular array and a circular array.

5. The phased array probe device with built-in storage function according to claim 1, characterized in that: The upper metal coating array (43) is connected to the conductors in the multi-conductor coaxial cable (7), and the connection method includes but is not limited to welding.

6. The phased array probe device with built-in storage function according to claim 1, characterized in that: An inner sleeve (3) is arranged on the inner side of the outer shell (1), and a back substrate (2) is filled in the inner space of the outer shell (1).

Citation Information

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