Semiconductor wafer level packaging method and packaging structure

Abstract

The invention discloses a semiconductor wafer-level packaging method and a packaging structure, and in the semiconductor wafer-level packaging method, through the arrangement of an annular projection and the cooperation of a gluing mode, the air tightness and reliability of the packaging structure are improved while the packaging bonding strength is maintained, and meanwhile, bonding glue can be prevented from influencing a functional area.

Description

Technical Field

[0001] The present invention belongs to the technical field of chip bonding packaging, and in particular relates to a semiconductor wafer-level packaging method and packaging structure. Background Art

[0002] For chip packaging with functional areas, a substrate is usually used to bond the chip to protect the functional area of ​​the chip. In the prior art, the chip and the substrate are bonded by polymer-glue, which is the most cost-effective.

[0003] There are several ways to apply glue:

[0004] The first is the screen printing method. Place the side of the substrate to be coated with glue facing up, set a window screen on the surface, and set the window (i.e. the glue lowering place) at the part of the substrate that needs to be bonded. Use a scraper to scrape the glue on the screen across the entire surface of the substrate. In this process, the glue is squeezed through the window part on the screen to the bonding part of the substrate to complete the gluing.

[0005] The second is the glue rolling method. Place the substrate with the side to be glued facing up, and roll a roller covered with glue over the surface of the substrate, so that the surface of the part of the substrate that needs to be bonded will be stained with glue.

[0006] However, whether it is screen printing or glue rolling, when the two sides of the substrate are flat or the height difference between the groove area on the substrate used to form the cavity and the bonding part is small, and the substrate part of the cavity area (the area where the chip functional area is located) has certain functions (such as glass substrates that need to be transparent) or has some functional structures (such as micromechanical structures), if screen printing is used, the screen will be pressed down and deformed during the glue printing process. When the glue flows down the window, part of the glue will flow along the back of the screen. In the case of no relative height or too low relative height, the screen will contact the cavity area and get stained with glue. If glue rolling is used, because the glue on the glue cylinder is thicker (about 10μm), and the brush surface of the glue cylinder is round, there is a slight arc in contact with the substrate. In the case of no relative height or too low relative height, the movement of the glue cylinder will make the cavity area easy to get stained with glue.

[0007] Therefore, the above two gluing methods are not suitable, and there is a high probability that the glue will be applied to the functional area, affecting the performance of the device after packaging.

[0008] The information disclosed in this background technology section is only intended to enhance the understanding of the overall background of the invention and should not be regarded as an acknowledgment or any form of suggestion that the information constitutes the prior art already known to a person skilled in the art. Summary of the invention

[0009] The object of the present invention is to provide a semiconductor wafer-level packaging method and packaging structure, which can solve the problems in the prior art.

[0010] In order to achieve the above object, a technical solution provided by a specific embodiment of the present invention is as follows:

[0011] A semiconductor wafer level packaging method, comprising:

[0012] Providing a first wafer having a plurality of chip units, each of the chip units having a functional area and a first bonding area, wherein the first bonding area is arranged around the functional area;

[0013] providing a second wafer or substrate, the second wafer or substrate having a second bonding area corresponding to the first bonding area;

[0014] A circle of first annular protrusions is formed on the first bonding area of ​​the chip unit, and a first spacing area is provided between the first annular protrusions of adjacent chip units; and / or at least one circle of first annular protrusions is formed on the second bonding area of ​​the second wafer or substrate, and a second spacing area is provided between the first annular protrusions of adjacent second bonding areas;

[0015] Filling the first spacing area and / or the second spacing area with glue, wherein the glue protrudes from the top surface of the first annular protrusion;

[0016] The second wafer or substrate is aligned and pressed onto the first wafer.

[0017] In one or more embodiments of the present invention, the filling amount of the glue is controlled so that after alignment and pressing, the glue protruding from the top surface of the first annular protrusion is partially or completely squeezed to the side of the first annular protrusion away from the first spacer area and / or the second spacer area.

[0018] In one or more embodiments of the present invention, the glue squeezed to the side of the first annular protrusion away from the first spacing area and / or the second spacing area contacts at least one of the first wafer and the second wafer or substrate.

[0019] In one or more embodiments of the present invention, the glue squeezed to the side of the first annular protrusion away from the first spacing area and / or the second spacing area contacts both the first wafer and the second wafer or substrate.

[0020] In one or more embodiments of the present invention, before aligning and pressing the second wafer or substrate with the first wafer, the process further includes:

[0021] A step of forming a second annular protrusion on the first bonding area of ​​the chip unit and / or on the second bonding area of ​​the second wafer or substrate.

[0022] In one or more embodiments of the present invention, the inner diameter of the second annular protrusion is smaller than the inner diameter of any of the first annular protrusions on the first bonding region or the second bonding region to which it belongs;

[0023] A third spacing area is formed between the second annular protrusion and the first annular protrusion adjacent thereto.

[0024] In one or more embodiments of the present invention, the filling amount of the glue is controlled so that after alignment and pressing, the glue protruding from the top surface of the first annular protrusion is only partially or completely squeezed into the third spacing area.

[0025] In one or more embodiments of the present invention, a first cutting area is formed between adjacent chip units, and the first cutting area is located in the first spacing area;

[0026] The second wafer or substrate has a second cutting area corresponding to the first cutting area, and the second cutting area is located in the second spacing area.

[0027] A semiconductor wafer level packaging method, comprising:

[0028] Providing a first wafer having one or more chip units, each of the chip units having a functional area and a first bonding area, wherein the first bonding area is arranged around the functional area;

[0029] providing a second wafer or substrate, the second wafer or substrate having a second bonding area corresponding to the first bonding area;

[0030] At least two circles of first annular protrusions are formed on the first bonding area of ​​the chip unit, and / or at least two circles of first annular protrusions are formed on the second bonding area of ​​the second wafer or substrate, and a fourth spacing area is formed between adjacent first annular protrusions;

[0031] Filling the fourth spacer with glue, wherein the glue protrudes from the top surface of the first annular protrusion;

[0032] The second wafer or substrate is aligned and pressed onto the first wafer.

[0033] In one or more embodiments of the present invention, the filling amount of the glue is controlled so that after alignment and pressing, the glue protruding from the top surface of the first annular protrusion is partially or completely squeezed to the side of the first annular protrusion away from the fourth spacing area.

[0034] In one or more embodiments of the present invention, the filling amount of the glue is controlled so that after alignment and pressing, the glue protruding from the top surface of the first annular protrusion is partially squeezed into the space between the top surface of the first annular protrusion and the first bonding area or the second bonding area aligned with the top surface.

[0035] In one or more embodiments of the present invention, when more than two circles of first annular protrusions are formed, the amount of glue filled in the fourth spacing area close to the functional area is controlled to be less than or equal to the amount of glue filled in other fourth spacing areas.

[0036] In one or more embodiments of the present invention, before aligning and pressing the second wafer or substrate with the first wafer, the process further includes:

[0037] The step of providing an annular cofferdam on the second bonding area of ​​the second wafer or substrate and / or on the first bonding area of ​​the first wafer;

[0038] In one or more embodiments of the present invention, the inner diameter of the annular cofferdam is smaller than the inner diameter of any of the first annular protrusions on the first bonding area or the second bonding area to which it belongs;

[0039] The annular cofferdam is arranged on the first bonding area or the second bonding area aligned with the top surface of the first annular protrusion of the innermost circle.

[0040] In one or more embodiments of the present invention, the method of forming the first annular protrusion includes:

[0041] Formation structure;

[0042] forming a photoresist layer on the layer structure and patterning it to form a ring-shaped convex pattern;

[0043] transferring the annular protrusion pattern to the layer structure to form the annular protrusion; or,

[0044] The method of forming the annular protrusion comprises:

[0045] forming a photoresist layer and patterning it to form a ring-shaped concave pattern;

[0046] forming a layer structure covering the annular recessed pattern;

[0047] The annular concave pattern is removed and at the same time, the layer structure located on the surface of the annular concave pattern is removed to form the annular protrusion.

[0048] In one or more embodiments of the present invention, the glue is filled by dispensing or printing.

[0049] A semiconductor packaging structure, comprising:

[0050] A first chip has a first surface, wherein the first surface has a functional area and a first bonding area, and the first bonding area is arranged around the functional area;

[0051] A second chip or substrate, disposed on the first surface of the first chip, the second chip or substrate having a second bonding area bonded to the first bonding area;

[0052] a glue bonding layer, disposed between the first bonding area and the second bonding area; and

[0053] A first annular protrusion is arranged on the first bonding area and / or the second bonding area and is partially or completely located in the glue bonding layer.

[0054] In one or more embodiments of the present invention, a second annular protrusion is further included, which is arranged on the first bonding area of ​​the first chip and / or the second bonding area of ​​the second chip or the substrate, the inner diameter of the second annular protrusion is smaller than the inner diameter of any of the first annular protrusions on the first bonding area or the second bonding area to which it belongs, and a third spacing area is formed between the second annular protrusion and the first annular protrusion adjacent to it, and the glue bonding layer is partially or fully arranged in the third spacing area.

[0055] In one or more embodiments of the present invention, the height of the second annular protrusion is greater than or equal to the height of the first annular protrusion.

[0056] A semiconductor packaging structure, comprising:

[0057] A first chip has a first surface, wherein the first surface has a functional area and a first bonding area, and the first bonding area is arranged around the functional area;

[0058] A second chip or substrate, disposed on the first surface of the first chip, the second chip or substrate having a second bonding area bonded to the first bonding area;

[0059] At least two circles of first annular protrusions are arranged on the first bonding area of ​​the first chip and / or on the second bonding area of ​​the second chip or substrate, and a fourth spacing area is formed between adjacent first annular protrusions. Glue is arranged in the fourth spacing area, and the glue extends from the fourth spacing area to at least a portion of the space between the top surface of the first annular protrusion and the first bonding area or the second bonding area aligned with the top surface.

[0060] In one or more embodiments of the present invention, an annular cofferdam is further included, and the annular cofferdam is arranged on the first bonding area or the second bonding area aligned with the top surface of the first annular protrusion arranged closest to the functional area.

[0061] Compared with the prior art, the semiconductor wafer-level packaging method and packaging structure of the present invention can prevent the glue applied during bonding from contaminating the functional area for the bonding packaging of substrates or chips, and at the same time, prevent the applied glue from overflowing and affecting the functional area by controlling the amount of glue.

[0062] The semiconductor wafer-level packaging method and packaging structure of the present invention, through the provision of annular protrusions and a glue coating method, maintain the packaging bonding strength while improving the airtightness and reliability of the packaging structure, and can also prevent the bonding glue from affecting the functional area. BRIEF DESCRIPTION OF THE DRAWINGS

[0063] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0064] Figure 1 is a process flow chart of a semiconductor wafer-level packaging method in a first embodiment of the present invention;

[0065] Figure 2a-2d Schematic diagram of the process steps of the semiconductor wafer-level packaging method in Embodiment 1 of the present invention;

[0066] Figure 3 yes Figure 2d A partial schematic diagram of the

[0067] Figure 4 is the same as in Example 2 of the present invention Figure 2d A local schematic diagram in the corresponding step;

[0068] Figure 5 is the same as in Example 3 of the present invention Figure 2d A local schematic diagram in the corresponding step;

[0069] Figure 6a-6d Schematic diagram of the process steps of the semiconductor wafer-level packaging method according to Embodiment 4 of the present invention;

[0070] Figure 7 yes Figure 6d A partial schematic diagram of the

[0071] Figure 8 is the same as in Example 5 of the present invention Figure 2d A local schematic diagram in the corresponding step;

[0072] Fig. 9A process flow chart of a semiconductor wafer-level packaging method in a second embodiment of the present invention;

[0073] Figure 10a-Figure 10d Schematic diagram of the process steps of the semiconductor wafer-level packaging method in Embodiment 6 of the present invention;

[0074] Fig.11 yes Fig.10d A partial schematic diagram of the

[0075] Fig.12 is the same as in Example 7 of the present invention Fig.10d A local schematic diagram in the corresponding step;

[0076] Fig.13 is the same as in Example 8 of the present invention Fig.10d A local schematic diagram in the corresponding step;

[0077] Fig.14 is the same as in Example 9 of the present invention Fig.10d A local schematic diagram in the corresponding step;

[0078] Figure 15a-Figure 15d is a schematic diagram of the process steps of the semiconductor wafer-level packaging method according to Embodiment 11 of the present invention;

[0079] Fig.16 yes Fig.15d A partial schematic diagram of the . DETAILED DESCRIPTION

[0080] In order to enable those skilled in the art to better understand the technical solutions in the present invention, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are only part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present invention.

[0081] As mentioned in the background technology, for the packaging of substrates with functional properties or for chips whose functional areas cannot be affected, the screen printing glue coating method or the rolling glue method in the existing technology has the problem of easily applying the bonding glue to the position of the substrate corresponding to the chip functional area or to the chip functional area, and is therefore not suitable for the bonding of the above-mentioned substrates and chips.

[0082] Based on this, the present application provides a semiconductor wafer-level packaging method, which, through the setting of annular protrusions and the glue coating method, maintains the packaging bonding strength while improving the airtightness and reliability of the packaging structure, and at the same time prevents the bonding glue from affecting the functional area.

[0083] like Figure 1As shown, the semiconductor wafer-level packaging method in the first embodiment of the present invention includes the following specific steps:

[0084] S1, providing a first wafer having a plurality of chip units, each chip unit having a functional area and a first bonding area, and the first bonding area is arranged around the functional area;

[0085] S2, providing a second wafer or substrate, wherein the second wafer or substrate has a second bonding area corresponding to the first bonding area;

[0086] S3, forming a circle of first annular protrusions on the first bonding area of ​​the chip unit, with a first spacing area between the first annular protrusions of adjacent chip units, and / or, forming at least one circle of first annular protrusions on the second bonding area of ​​the second wafer or substrate, with a second spacing area between the first annular protrusions of adjacent second bonding areas;

[0087] S4, filling the first spacing area and / or the second spacing area with glue, wherein the glue protrudes from the top surface of the first annular protrusion;

[0088] S5, aligning and pressing the second wafer or substrate to the first wafer.

[0089] In the above technical solution, by controlling the filling amount of glue, after alignment and pressing, the glue protruding from the top surface of the first annular protrusion is partially or completely squeezed to the side of the first annular protrusion away from the first spacing area and / or the second spacing area. The glue squeezed to the side of the first annular protrusion away from the first spacing area and / or the second spacing area is in contact with at least one of the first wafer and the second wafer or the substrate. Alternatively, the glue squeezed to the side of the first annular protrusion away from the first spacing area and / or the second spacing area is in contact with both the first wafer and the second wafer or the substrate.

[0090] Preferably, glue may be filled into the first spacing area and / or the second spacing area by dispensing or printing.

[0091] The number of circles of the first annular protrusion can be set to multiple circles to further increase the air tightness.

[0092] When the number of turns of the first annular protrusion is multiple, the glue can not only be filled in the first spacing area between the first annular protrusions of adjacent chip units and / or the second spacing area between the first annular protrusions of the first spacing area and / or adjacent second bonding areas, but can also be further filled in the area between adjacent first annular protrusions to further increase the bonding strength.

[0093] It is understandable that as the number of circles of the first annular protrusion increases, the first annular protrusion will get closer and closer to the functional area. At this time, the glue protruding from the top surface of the first annular protrusion is easy to flow to the location of the functional area after bonding, thereby affecting the functional area. In order to prevent the glue after bonding from affecting the functional area located within the encirclement of the first annular protrusion, the amount of glue filled into the first spacing area and / or the second spacing area close to the functional area can be controlled to be less than or equal to the amount of glue in other first spacing areas and / or second spacing areas, so that the glue filled into the first spacing area and / or the second spacing area close to the functional area will not be squeezed out of the bonding area in large quantities after alignment and pressing, thereby affecting the functional area.

[0094] In another embodiment, a circle of second annular protrusions may be provided on the second bonding area and / or the first bonding area to prevent the glue from flowing to the functional area after bonding.

[0095] Specifically, the height of the second annular protrusion is greater than or equal to the height of the first annular protrusion. The inner diameter of the second annular protrusion is smaller than the inner diameter of the first bonding area and / or any first annular protrusion on the second bonding area where the second annular protrusion is located. A third spacing area is formed between the second annular protrusion and the first annular protrusion adjacent thereto.

[0096] After the first wafer and the second wafer or substrate are bonded, the glue protruding from the top surface of the first annular protrusion is only partially or completely squeezed into the third spacing area, that is, the second annular protrusion can block the glue from flowing to the functional area after bonding. At the same time, since the top surface of the second annular protrusion can be completely contacted and sealed with the aligned first bonding area or the second bonding area, it can block the volatile gases generated by the curing of the glue in the first spacing area and / or the second spacing area and / or the third spacing area from entering the functional area and causing adverse effects on the functional area.

[0097] It is understandable that a first cutting area for cutting is formed between adjacent chip units on the first wafer. The second wafer or substrate has a second cutting area corresponding to the first cutting area. In order to improve the bonding strength, the width of the first spacing area is preferably greater than or equal to the width of the first cutting area. That is, the first cutting area is located in the first spacing area. The width of the second spacing area is preferably greater than or equal to the width of the second cutting area. That is, the second cutting area is located in the second spacing area.

[0098] Preferably, the first annular bump and the second annular bump may both be metal bumps, which may be manufactured in the following manner:

[0099] First, a metal layer structure is formed by sputtering or evaporation; a photoresist layer is formed on the metal layer structure and patterned (reserving an area for forming the first annular protrusion and / or the second annular protrusion) to form a first annular protrusion pattern and / or a second annular protrusion pattern; the first annular protrusion pattern and / or the second annular protrusion pattern is transferred to the metal layer structure to form a first annular protrusion and / or a second annular protrusion; and the remaining photoresist layer is removed.

[0100] Second, firstly, a photoresist layer is formed and patterned (the area used to form the first annular protrusion and / or the second annular protrusion is removed) to form an annular concave pattern; and a metal layer structure covering the annular concave pattern is formed by sputtering or evaporation;

[0101] The metal layer structure located on the surface of the annular recessed pattern is removed while the annular recessed pattern is removed to form a first annular protrusion and / or a second annular protrusion.

[0102] The semiconductor wafer-level packaging method of the present application is described below through several specific embodiments.

[0103] Example 1

[0104] refer to Figure 2a As shown, a substrate 10 is provided, and a plurality of grooves 11 are formed on the substrate 10. The substrate 10 has a second bonding area S2, and a second bonding area S2 is arranged around each groove 11. A second cutting area S4 is formed between adjacent second bonding areas S2.

[0105] It is understandable that in other embodiments, the groove 11 may not be provided on the substrate 10. At this time, each annular second bonding area S2 on the substrate 10 has a certain area in the middle to correspond to the functional area of ​​the chip unit of the wafer to be bonded. In other embodiments, the substrate 10 may also be another functional wafer.

[0106] refer to Figure 2b As shown, a circle of first annular protrusions 121 is provided on each second bonding area S2 of the substrate 10. A second spacing area A having a certain width is formed between the first annular protrusions 121 of adjacent second bonding areas S2.

[0107] The first annular protrusion 121 on each second bonding area S2 is arranged as close to the outer edge of the second bonding area S2 as possible but not exceeding the outer edge, so that the width of the second spacing area A is greater than or equal to the width of the second cutting area S4, thereby increasing the bonding area of ​​the subsequent glue and improving the bonding strength. A certain buffer space is reserved between the first annular protrusion 121 and the inner edge of the second bonding area S2.

[0108] Specifically, the first annular protrusion 121 is preferably a metal protrusion, and the first annular protrusion 121 can be manufactured in the following two ways.

[0109] First, the metal of the entire surface is sputtered or evaporated on the second bonding area S2 to form a metal layer structure. A photoresist is applied on the metal layer structure to form a photoresist layer. The photoresist layer is patterned (reserved for forming the first annular protrusion area) to form a first annular protrusion pattern. The metal layer structure is etched using the patterned photoresist layer as a mask, and the first annular protrusion pattern is transferred to the metal layer structure to form the first annular protrusion. The remaining photoresist layer is removed.

[0110] Second, a photoresist coating (lifting off the photoresist) is performed on the entire surface of the second bonding area S2 to form a photoresist layer. The photoresist layer is patterned (the area used to form the first annular protrusion is removed) to form an annular recessed pattern. Metal is sputtered or evaporated to form a metal layer structure covering the annular recessed pattern. The patterned photoresist layer is peeled off and the metal layer evaporated on the photoresist layer is peeled off to form a first annular protrusion.

[0111] refer to Figure 2c As shown, glue is filled in the second spacing area A between adjacent first annular protrusions 121 by dispensing or printing. The glue is filled to the top surface of the protruding first annular protrusion 121. The filling amount of the glue is controlled so that after the subsequent alignment and pressing, the glue on the top surface of the protruding first annular protrusion 121 is completely squeezed to the side of the first annular protrusion 121 away from the second spacing area A.

[0112] refer to Figure 2d As shown, a first wafer 20 is provided, and the first wafer 20 has a plurality of chip units 21, and a first cutting area S3 corresponding to the second cutting area S4 is formed between adjacent chip units 21. Each chip unit 21 has a functional area S0 and a first bonding area S1, and the first bonding area S1 is arranged around the functional area S0. The second bonding area S2 of the substrate 10 is aligned and pressed with the first bonding area S1 of the first wafer 20. During alignment and pressing, the substrate 10 is arranged at the bottom and the first wafer 20 is arranged at the top. By adjusting the pressing process parameters such as temperature, pressure, etc., the glue on the top surface of the protruding first annular protrusion 121 is squeezed and flows around.

[0113] refer to Figure 3 As shown, Figure 3 yes Figure 2d A local schematic diagram of Figure 3In the embodiment, the glue protruding from the top surface of the first annular protrusion 121 is all squeezed into the space on the side of the first annular protrusion 121 away from the second spacing area A, but does not flow to the area where the functional area is located. The glue squeezed to the side of the first annular protrusion 121 away from the second spacing area A contacts the surfaces of the first wafer 20 and the substrate 10.

[0114] Finally, the subsequent packaging is completed as required, and the single package structure is cut along the first cutting area and the second cutting area.

[0115] It is understandable that the first annular protrusion 121 may also be formed on the first bonding area S1 of the first wafer 10 .

[0116] Example 2

[0117] The difference between Example 2 and Example 1 is that during the alignment pressing, the pressing process parameter - pressure is different.

[0118] In Example 2, in order to improve the uniformity of the package and improve the bonding strength between the first wafer 20 and the substrate 10, the contact area between the glue and the substrate 10 (including the first annular protrusion 121) and the first wafer 20 is increased as much as possible without affecting the functional area S0. Figure 4 As shown, the pressure during pressing is reduced and the amount of glue on the top surface of the protruding first annular protrusion 121 is controlled so that after positioning and pressing, the glue on the top surface of the protruding first annular protrusion 121 is partially squeezed into the space on the side of the first annular protrusion 121 away from the second spacing area A, but does not flow to the area where the functional area is located, and there is no complete contact between the top surfaces of the first wafer 20 and the first annular protrusion 121 of the substrate 10, and the space is filled with glue.

[0119] Example 3

[0120] The difference between Example 3 and Example 1 is that Figure 2c In the steps shown, the amount of glue protruding from the top surface of the first annular protrusion 121 is different.

[0121] In Example 3, reference Figure 5 As shown, the glue protruding from the top surface of the first annular protrusion 121 is all squeezed into the space on the side of the first annular protrusion 121 away from the second spacing area A, but does not flow to the area where the functional area is located. The glue squeezed to the side of the first annular protrusion 121 away from the second spacing area A contacts the surface of the first wafer 20 but does not contact the surface of the substrate 10.

[0122] Example 4

[0123] refer to Figure 6aAs shown, a substrate 10 is provided, and a plurality of grooves 11 are formed on the substrate 10. The substrate 10 has a second bonding area S2, and a second bonding area S2 is arranged around each groove 11. A second cutting area S4 is formed between adjacent second bonding areas S2.

[0124] It is understandable that in other embodiments, the groove 11 may not be provided on the substrate 10. At this time, each annular second bonding area S2 on the substrate 10 has a certain area in the middle to correspond to the functional area of ​​the chip unit of the wafer to be bonded. In other embodiments, the substrate 10 may also be another functional wafer.

[0125] refer to Figure 6b As shown, a circle of first annular protrusions 121 is provided on each second bonding area S2 of the substrate 10. A second spacing area A having a certain width is formed between the first annular protrusions 121 of adjacent second bonding areas S2. At the same time, a circle of second annular protrusions 122 is provided on each second bonding area S2 of the substrate 10. The inner diameter of the second annular protrusion 122 is smaller than the inner diameter of the first annular protrusion 121, the height of the second annular protrusion 122 is greater than or equal to the height of the first annular protrusion 121, and a third spacing area C is formed between the second annular protrusion 122 and the adjacent first annular protrusion 121.

[0126] Specifically, the first annular protrusion 121 and the second annular protrusion 122 are preferably metal protrusions, which can be manufactured in the following two ways.

[0127] First, the metal of the entire surface is sputtered or evaporated on the second bonding area S2 to form a metal layer structure. A photoresist is applied on the metal layer structure to form a photoresist layer. The photoresist layer is patterned, and an area for forming an annular protrusion (including a first annular protrusion and a second annular protrusion) is reserved to form an annular protrusion pattern. The metal layer structure is etched using the patterned photoresist layer as a mask, and the annular protrusion pattern is transferred to the metal layer structure to form an annular protrusion. The remaining photoresist layer is removed.

[0128] Second, a photoresist coating (lifting off the photoresist) is performed on the entire surface of the second bonding area S2 to form a photoresist layer. The photoresist layer is patterned to remove the area used to form the annular protrusion (including the first annular protrusion and the second annular protrusion) to form an annular recessed pattern. Metal is sputtered or evaporated to form a metal layer structure covering the annular recessed pattern. The patterned photoresist layer is peeled off and the metal layer evaporated on the photoresist layer is peeled off to form an annular protrusion.

[0129] refer to Figure 6cAs shown, glue is filled in the second spacer A between adjacent first annular protrusions 121 by dispensing or printing. The glue is filled to the top surface of the protruding first annular protrusion 121. The filling amount of the glue is controlled so that after the subsequent alignment and pressing, the glue on the top surface of the protruding first annular protrusion 121 is only partially or completely squeezed into the third spacer C. The setting of the third spacer C can also accommodate the volatile gas generated by the curing of the glue, so that it does not enter the functional area and have an adverse effect on the functional area.

[0130] refer to Figure 6d As shown, a first wafer 20 is provided, and the first wafer 20 has a plurality of chip units 21, each chip unit 21 has a functional area S0 and a first bonding area S1, and the first bonding area S1 is arranged around the functional area S0. The substrate 10 and the first wafer 20 are aligned and pressed. During alignment and pressing, the substrate 10 is arranged at the bottom, and the first wafer 20 is arranged at the top. By adjusting the pressing process parameters such as temperature, pressure, etc., the glue on the top surface of the protruding first annular protrusion 121 is squeezed and flows around.

[0131] refer to Figure 7 As shown, Figure 7 yes Figure 6d A local schematic diagram of Figure 7 In the embodiment, the glue protruding from the top surface of the first annular protrusion 121 is completely squeezed into the third spacer C and does not flow into the functional area. The glue squeezed into the third spacer C contacts the surfaces of the first wafer 20 and the substrate 10. The third spacer C can also accommodate the volatile gas generated by the curing of the glue, so that it does not enter the functional area and have adverse effects on the functional area.

[0132] Finally, the subsequent packaging is completed as required, and the single package structure is cut along the first cutting area and the second cutting area.

[0133] Example 5

[0134] The difference between the fifth embodiment and the first embodiment is that, in the fifth embodiment, the first annular protrusion 121 is respectively disposed on the first bonding area S1 of the first wafer 20 and the second spacing area S2 of the substrate 10 or the second wafer. Figure 8 As shown, a first spacing region B is provided between the first annular protrusions 121 of adjacent first bonding regions S1 , and a second spacing region A is provided between the first annular protrusions 121 of adjacent second bonding regions S2 .

[0135] One or both of the first spacer B and the second spacer A are filled with glue.

[0136] After alignment and pressing, the first annular protrusion 121 of the first bonding area S1 and the first annular protrusion 121 of the second bonding area S2 are staggered.

[0137] The present application also provides a packaging structure packaged using the above packaging method.

[0138] refer to Figure 2d and Figures 3 to 5 As shown, the packaging structure of the present application includes a first wafer 20 , a substrate 10 , a glue bonding layer and a first annular protrusion 121 .

[0139] The first wafer 20 has a first surface. The first surface has a functional area S0 and a first bonding area S1. The first bonding area S1 is disposed around the functional area S0.

[0140] The substrate 10 has a second surface, the second surface has a second bonding area S2, and a groove 11 surrounded by the second bonding area S2 is formed on the second surface. The second surface of the substrate 10 is arranged to be bonded to the first surface of the first wafer 20, the groove 11 corresponds to and covers the functional area S0, and the second bonding area S2 is bonded to the first bonding area S1.

[0141] It is understandable that the groove 11 may not be provided in other embodiments.

[0142] The glue bonding layer is disposed between the first bonding area S1 and the second bonding area S2.

[0143] The first annular protrusion 121 is disposed on the first bonding area S1 and / or the second bonding area S2 and is partially or entirely located in the glue bonding layer.

[0144] In a preferred embodiment, the first annular protrusion 121 is selected from a metal bump to further improve air tightness.

[0145] In another embodiment, reference Figure 7 As shown, it also includes a second annular protrusion 122, which is arranged on the first bonding area S1 and / or the second bonding area S2 and is located within the range surrounded by the first annular protrusion 121. The height of the second annular protrusion 122 is higher than or equal to the height of the first annular protrusion 121, and a third spacing area C is formed between the second annular protrusion 122 and the first annular protrusion 121 adjacent thereto, and the third spacing area C is not connected to the area where the functional area is located, and a glue bonding layer is partially or completely arranged in the third spacing area C.

[0146] like Fig. 9 As shown, the semiconductor wafer level packaging method in the second embodiment of the present invention includes the following specific steps:

[0147] S10, providing a first wafer having one or more chip units, each chip unit having a functional area and a first bonding area, and the first bonding area is arranged around the functional area.

[0148] S20, providing a second wafer or substrate, wherein the second wafer or substrate has a second bonding area corresponding to the first bonding area.

[0149] S30, forming at least two circles of first annular protrusions on the first bonding area of ​​the chip unit, and / or forming at least two circles of first annular protrusions on the second bonding area of ​​the second wafer or substrate, with a fourth spacing area formed between adjacent first annular protrusions.

[0150] S40, filling the fourth spacing area with glue, wherein the glue protrudes from the top surface of the first annular protrusion.

[0151] S50, aligning and pressing the second wafer or substrate with the first wafer.

[0152] In the above technical solution, the filling amount of glue is controlled so that after alignment and pressing, the glue protruding from the top surface of the first annular protrusion is squeezed to partially or completely fill the space between the top surface of the first annular protrusion and the first bonding area or the second bonding area aligned with the top surface. Alternatively, the filling amount of glue is controlled so that after alignment and pressing, the glue protruding from the top surface of the first annular protrusion is squeezed to fill the entire space between the top surface of the first annular protrusion and the first bonding area or the second bonding area aligned with the top surface, and extends to the side surface of the first annular protrusion away from the fourth spacing area.

[0153] Preferably, the fourth spacer area may be filled with glue by dispensing or printing.

[0154] The number of circles of the first annular protrusion can be set to be more than two circles to further increase the air tightness.

[0155] When the number of circles of the first annular protrusion is greater than two, as the number of circles of the first annular protrusion increases, the first annular protrusion will get closer and closer to the functional area. At this time, the glue on the top surface of the first protruding annular protrusion is easy to flow to the location of the functional area after bonding, thereby affecting the functional area. In order to prevent the glue after bonding from affecting the functional area located in the encirclement of the first annular protrusion, the amount of glue filled into the fourth spacer area close to the functional area can be controlled so that the amount of glue on the top surface of the protruding first annular protrusion in the fourth spacer area is partially or completely filled after alignment and pressing. Preferably, the space between the top surface of the first annular protrusion and the first bonding area or the second bonding area aligned with the top surface is partially filled so that the glue will not be squeezed out of the bonding area.

[0156] Furthermore, on this basis, in order to ensure the bonding strength between the first wafer and the substrate or the second wafer, the amount of glue filled into the remaining fourth spacer area away from the functional area can be controlled to be slightly more than the amount of glue filled into the fourth spacer area close to the functional area, so that the amount of glue protruding from the top surface of the first annular protrusion in the remaining fourth spacer area is squeezed to completely fill the top surface of the first annular protrusion and the entire space between the first bonding area or the second bonding area aligned with the top surface after alignment and pressing, and extend to the side surface of the first annular protrusion.

[0157] In another embodiment, a circle of annular cofferdams can also be set on the second bonding area of ​​the second wafer or substrate and / or on the first bonding area of ​​the first wafer to prevent the glue from flowing to the functional area after bonding. The inner diameter of the annular cofferdam is smaller than the inner diameter of any first annular protrusion. The annular cofferdam is set on the first bonding area or the second bonding area aligned with the top surface of the first annular protrusion of the innermost circle, and the height of the annular cofferdam is less than the height between the second bonding area and the first bonding area and greater than or equal to the height between the top surface of the first annular protrusion and the first bonding area or the second bonding area aligned with the top surface.

[0158] Exemplarily, when the first annular protrusion is disposed on the first bonding area of ​​the first wafer, the annular cofferdam is disposed on the second bonding area of ​​the substrate or the second wafer, and the position is set such that, after the substrate or the second wafer is bonded to the first wafer, the annular cofferdam is located between the innermost first annular protrusion and the functional area. The height of the annular cofferdam is set such that, in a direction parallel to the first surface of the first wafer, the annular cofferdam partially overlaps with the first annular protrusion.

[0159] Exemplarily, when the first annular protrusion is disposed on the second bonding area of ​​the substrate or the second wafer, the annular cofferdam is disposed on the first bonding area of ​​the first wafer, and the position is set such that, after the substrate or the second wafer is bonded to the first wafer, the annular cofferdam is located between the innermost first annular protrusion and the functional area. The height of the annular cofferdam is set such that, in a direction parallel to the first surface of the first wafer, the annular cofferdam partially overlaps with the first annular protrusion.

[0160] In other embodiments, the flow of glue to the functional area after bonding can be blocked by combining an annular cofferdam and glue amount control.

[0161] Preferably, the first annular bump may be a metal bump, which may be manufactured in the following manner:

[0162] First, a metal layer structure is formed by sputtering or evaporation; a photoresist layer is formed on the metal layer structure and patterned (reserving an area for forming a first annular protrusion) to form an annular protrusion pattern; the annular protrusion pattern is transferred to the metal layer structure to form a first annular protrusion; and the remaining photoresist layer is removed.

[0163] Second, firstly, a photoresist layer is formed and patterned (the area used to form the first annular protrusion is removed) to form an annular concave pattern; and a metal layer structure covering the annular concave pattern is formed by sputtering or evaporation;

[0164] The metal layer structure located on the surface of the annular concave pattern is removed while removing the annular concave pattern to form a first annular protrusion.

[0165] The semiconductor wafer-level packaging method of the present application is described below through several specific embodiments.

[0166] Embodiment 6 (two circles of first annular protrusions are arranged on the substrate)

[0167] refer to Fig.10a As shown, a substrate 10 is provided. A plurality of grooves 11 are formed on the substrate 10. The substrate 10 has a second bonding area S2. Each groove 11 is surrounded by a second bonding area S2.

[0168] It is understandable that in other embodiments, the substrate 10 may not be provided with the groove 11. In this case, each annular second bonding area S2 on the substrate 10 has a certain area in the middle to correspond to the functional area of ​​the chip to be bonded. In other embodiments, the substrate 10 may also be another functional wafer.

[0169] refer to Fig.10b As shown, two circles of first annular protrusions 121 are arranged on the second bonding area S2 of the substrate 10. The two circles of first annular protrusions 121 are coaxially or non-coaxially spaced, and a fourth spacing area D with a certain width is formed between the two circles of first annular protrusions 121. A certain buffer space is reserved between the first annular protrusion 121 located in the inner circle and the inner edge of the second bonding area S2.

[0170] Specifically, the first annular protrusion 121 is preferably a metal protrusion.

[0171] refer to Fig.10c As shown, glue is filled in the fourth space D between the two circles of first annular protrusions 121 by dispensing or printing. The glue is filled to a point slightly protruding from the top surface of the first annular protrusion 121.

[0172] refer to Fig.10d As shown, a first wafer 20 is provided, and the first wafer 20 has a plurality of chip units 21, each chip unit 21 has a functional area S0 and a first bonding area S1, and the first bonding area S1 is arranged around the functional area S0. The substrate 10 and the first wafer 20 are aligned and pressed. During alignment and pressing, the substrate 10 is arranged at the bottom, and the first wafer 20 is arranged at the top. By adjusting the pressing process parameters such as temperature, pressure, etc., the glue on the top surface of the first protruding annular protrusion 121 is squeezed and flows around.

[0173] refer to Fig.11 As shown, Fig.11 yes Fig.10d A local schematic diagram of Fig.11 In the embodiment, the glue protruding from the top surface of the first annular protrusion 121 is squeezed to fill the entire space between the top surface of the first annular protrusion 121 and the first bonding area S1 aligned with the top surface. The area between the two side surfaces of the two circles of the first annular protrusion 121 that are away from each other is defined as the space area or the entire space area between the top surface of the first annular protrusion 121 and the first bonding area S1 aligned with the top surface. The above definition is used in the remaining embodiments below.

[0174] Finally, complete the subsequent packaging as needed.

[0175] Example 7

[0176] The difference between Example 7 and Example 6 is that Fig.10c In the steps shown, the amount of glue protruding from the top surface of the first annular protrusion 121 is different.

[0177] In Example 7, in order to improve the uniformity of the package and the bonding strength between the first wafer 20 and the substrate 10, the contact area between the glue and the substrate 10 (including the first annular protrusion 121) and the first wafer 20 is increased as much as possible without affecting the functional area S0. Fig.12 As shown, the amount of glue on the top surface of the protruding first annular protrusion 121 is controlled so that after alignment and pressing, the glue on the top surface of the protruding first annular protrusion 121 is squeezed to fill the entire space between the top surface of the first annular protrusion 121 and the first bonding area S1 aligned with the top surface, and extends to the side surface of the first annular protrusion 121 away from the fourth spacer area D.

[0178] Embodiment 8 (three circles of first annular protrusions are arranged on the substrate)

[0179] The difference between Example 8 and Example 7 is that in Example 8, three circles of first annular protrusions 121 are provided. The fourth spacing area D between adjacent first annular protrusions 121 is filled with glue. The provision of three circles of first annular protrusions 121 further increases the airtightness of the package. When the first bonding area S1 of the first wafer 20 around the functional area S0 is uneven (due to design reasons, the fluctuations are different in various places), the provision of multiple circles of first annular protrusions 121 can achieve the effect of multiple airtight insurance.

[0180] refer to Fig.13As shown, in Example 8, the amount of glue in each fourth spacer area D is controlled to be the same, so that the glue protruding from the top surface of the first annular protrusion 121 in each fourth spacer area D is squeezed to fill the entire space between the top surface of the first annular protrusion 121 and the first bonding area S1 aligned with the top surface after alignment and pressing, and extends to the side surface of the annular protrusion 121.

[0181] Example 9

[0182] The difference between Example 9 and Example 8 is that Fig.10c In the steps shown, the amount of glue protruding from the top surface of the first annular protrusion 121 is different.

[0183] It is understandable that the more circles the first annular protrusion 121 is arranged, the closer the first annular protrusion will be to the functional area S0. Therefore, when the first annular protrusion 121 is arranged to have three circles, the buffer area between the innermost circle of the first annular protrusion 121 and the functional area S0 will be too narrow, so that when the first annular protrusion 121 is aligned and pressed, the glue protruding from the top surface of the first annular protrusion will easily flow to the functional area S0, thereby affecting the functional area S0.

[0184] Therefore, reference Fig.14 As shown, in order to prevent the glue after bonding from affecting the functional area S0 located in the encirclement of the first annular protrusion 121, the amount of glue filled into the fourth interval area close to the functional area S0, which is defined as the fourth interval area D1, is controlled so that the amount of glue is slightly less than the amount of glue filled into the fourth interval area far from the functional area S0, which is defined as the fourth interval area D2, so that the amount of glue protruding from the top surface of the first annular protrusion in the fourth interval area D1 partially fills the space between the top surface of the first annular protrusion 121 and the first bonding area S1 aligned with the top surface after alignment and pressing, so that the glue will not be squeezed out of the bonding area. And the amount of glue protruding from the top surface of the first annular protrusion 121 in the fourth interval area D2 is squeezed to completely fill the entire space between the top surface of the first annular protrusion 121 and the first bonding area S1 aligned with the top surface after alignment and pressing, and extends to the side surface of the first annular protrusion 121.

[0185] Example 10

[0186] The only difference between Example 10 and Example 6 is that in Example 10, the first annular protrusion 121 is disposed on the first bonding area S1 of the first wafer 20 .

[0187] Embodiment 11

[0188] refer to Fig.15a As shown, a substrate 10 is provided. A plurality of grooves 11 are formed on the substrate 10. The substrate 10 has a second bonding area S2. Each groove 11 is surrounded by a second bonding area S2.

[0189] It is understandable that in other embodiments, the substrate 10 may not be provided with the groove 11. In this case, each annular second bonding area S2 on the substrate 10 has a certain area in the middle to correspond to the functional area of ​​the chip to be bonded. In other embodiments, the substrate 10 may also be another functional wafer.

[0190] refer to Fig.15b As shown, three circles of first annular protrusions 121 are arranged on the second bonding area S2 of the substrate 10. The three circles of first annular protrusions 121 are arranged coaxially or non-coaxially at intervals, and a fourth spacing area D with a certain width is formed between two adjacent circles of first annular protrusions 121. In this embodiment, the fourth spacing area D1 is defined as the first spacing area D1 close to the functional area, and the fourth spacing area D2 is defined as the second spacing area D2 far from the functional area.

[0191] Specifically, the first annular protrusion 121 is preferably a metal protrusion.

[0192] refer to Fig.15c As shown, the fourth interval area D1 and the fourth interval area D2 are filled with glue by dispensing or printing. The glue is filled to a level slightly protruding from the top surface of the first annular protrusion 121 .

[0193] refer to Fig.15d As shown, a first wafer 20 is provided, and the first wafer 20 has a plurality of chip units 21, each chip unit 21 has a functional area S0 and a first bonding area S1, and the first bonding area S1 is arranged around the functional area S0. An annular cofferdam 21 is arranged on the first bonding area S1. The inner diameter of the annular cofferdam 21 is smaller than the inner diameter of any first annular protrusion 121 on the substrate 10, so that after subsequent alignment and pressing, the annular cofferdam 21 is located in the innermost circle, blocking the glue from flowing to the functional area S0 after bonding.

[0194] The substrate 10 and the first wafer 20 are aligned and pressed together. During alignment and pressing, the substrate 10 is arranged at the bottom and the first wafer 20 is arranged at the top, and the glue on the top surface of the protruding first annular protrusion 121 is squeezed and flows around by adjusting the pressing process parameters such as temperature and pressure.

[0195] refer to Fig.16 As shown, Fig.16 yes Fig.15d A local schematic diagram of Fig.16In the embodiment, by controlling the amount of glue filled into the fourth interval zone D1 close to the functional zone S0, the amount of glue is slightly less than the amount of glue filled into the fourth interval zone D2 far from the functional zone S0, so that the amount of glue protruding from the top surface of the first annular protrusion in the fourth interval zone D1 partially fills the space between the top surface of the first annular protrusion 121 and the first bonding zone S1 aligned with the top surface after alignment and pressing, so that the glue will not be squeezed out of the bonding zone. And the amount of glue protruding from the top surface of the first annular protrusion 121 in the fourth interval zone D2 is squeezed to completely fill the entire space between the top surface of the first annular protrusion 121 and the first bonding zone S1 aligned with the top surface after alignment and pressing, and extends to the side surface of the second annular protrusion 121.

[0196] Finally, complete the subsequent packaging as needed.

[0197] The present application also provides a packaging structure packaged using the above packaging method.

[0198] refer to Fig.10d and Figures 11 to 14 As shown, the chip packaging structure of the present application includes a first wafer 20 , a substrate 10 , a glue bonding layer and at least two circles of annular protrusions 121 .

[0199] The first wafer 20 has a first surface. The first surface has a functional area S0 and a first bonding area S1. The first bonding area S1 is disposed around the functional area S0.

[0200] The substrate 10 has a second surface, the second surface has a second bonding area S2, and a groove 11 surrounded by the second bonding area S2 is formed on the second surface. The second surface of the substrate 10 is arranged to be bonded to the first surface of the first wafer 20, the groove 11 corresponds to and covers the functional area S0, and the second bonding area S2 is bonded to the first bonding area S1.

[0201] It is understandable that the groove 11 may not be provided in other embodiments.

[0202] The glue bonding layer is disposed between the first bonding area S1 and the second bonding area S2.

[0203] The multiple circles of first annular protrusions 121 are all arranged on the second bonding area S2 and / or the first bonding area S1, and the multiple circles of first annular protrusions 121 are distributed in concentric rings, and part or all of the multiple circles of first annular protrusions 121 are located in the glue bonding layer.

[0204] In a preferred embodiment, the first annular protrusion 121 is selected from a metal bump to further improve air tightness.

[0205] In another embodiment, reference Fig.16As shown, the first bonding area S1 or the second bonding area S2 is also provided with an annular cofferdam 21 aligned with the top surface of the first annular protrusion 121 disposed closest to the functional area S0. The annular cofferdam 21 is located between the first annular protrusion 121 of the innermost circle and the functional area S0. The height of the annular cofferdam 21 is set so that the annular cofferdam 21 partially overlaps with the first annular protrusion 121 in a direction parallel to the first surface of the first wafer 20 to block the glue from the fourth spacer D of the innermost circle.

[0206] Compared with the prior art, the semiconductor wafer-level packaging method and packaging structure of the present invention can prevent the glue applied during bonding from contaminating the functional area for the packaging of functional substrates and chips. At the same time, by controlling the amount of glue, the applied glue can be prevented from overflowing and affecting the functional area.

[0207] The semiconductor wafer-level packaging method and packaging structure of the present invention, through the provision of annular protrusions and a glue coating method, maintain the packaging bonding strength while improving the airtightness and reliability of the chip packaging structure, and can also prevent the bonding glue from affecting the functional area.

[0208] It will be apparent to those skilled in the art that the invention is not limited to the details of the exemplary embodiments described above and that the invention can be implemented in other specific forms without departing from the spirit or essential features of the invention. Therefore, the embodiments should be considered exemplary and non-limiting in all respects, and the scope of the invention is defined by the appended claims rather than the foregoing description, and it is intended that all variations falling within the meaning and scope of the equivalent elements of the claims be included in the invention. Any reference numeral in a claim should not be considered as limiting the claim to which it relates.

[0209] In addition, it should be understood that although the present specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each embodiment may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

Claims

1. A semiconductor wafer-level packaging method, characterized in that: include: Providing a first wafer having a plurality of chip units, each of the chip units having a functional area and a first bonding area, wherein the first bonding area is arranged around the functional area; providing a second wafer or substrate, the second wafer or substrate having a second bonding area corresponding to the first bonding area; A circle of first annular protrusions is formed on the first bonding area of ​​the chip unit, and a first spacing area is provided between the first annular protrusions of adjacent chip units; and / or at least one circle of first annular protrusions is formed on the second bonding area of ​​the second wafer or substrate, and a second spacing area is provided between the first annular protrusions of adjacent second bonding areas; Filling the first spacing area and / or the second spacing area with glue, wherein the glue protrudes from the top surface of the first annular protrusion; The second wafer or substrate is aligned and pressed onto the first wafer.

2. The semiconductor wafer level packaging method according to claim 1, characterized in that: The filling amount of the glue is controlled so that after alignment and pressing, the glue protruding from the top surface of the first annular protrusion is partially or completely squeezed to the side of the first annular protrusion away from the first spacing area and / or the second spacing area.

3. The semiconductor wafer level packaging method according to claim 2, characterized in that: The glue squeezed to the first annular protrusion away from the first spacing area and / or the second spacing area is in contact with at least one of the first wafer and the second wafer or the substrate; or The glue squeezed to the side of the first annular protrusion away from the first spacing area and / or the second spacing area contacts both the first wafer and the second wafer or the substrate.

4. The semiconductor wafer level packaging method according to claim 1, characterized in that: Before aligning and pressing the second wafer or substrate with the first wafer, the method further includes: A step of forming a second annular protrusion on the first bonding area of ​​the chip unit and / or on the second bonding area of ​​the second wafer or substrate.

5. The semiconductor wafer level packaging method according to claim 4, characterized in that: The inner diameter of the second annular protrusion is smaller than the inner diameter of any of the first annular protrusions on the first bonding area or the second bonding area to which it belongs; A third spacing area is formed between the second annular protrusion and the first annular protrusion adjacent thereto.

6. The semiconductor wafer level packaging method according to claim 5, characterized in that: The filling amount of the glue is controlled so that after alignment and pressing, the glue protruding from the top surface of the first annular protrusion is only partially or completely squeezed into the third spacing area.

7. The semiconductor wafer level packaging method according to claim 1, characterized in that: A first cutting area is formed between adjacent chip units, and the first cutting area is located in the first spacing area; The second wafer or substrate has a second cutting area corresponding to the first cutting area, and the second cutting area is located in the second spacing area.

8. A semiconductor wafer level packaging method, characterized in that: include: Providing a first wafer having one or more chip units, each of the chip units having a functional area and a first bonding area, wherein the first bonding area is arranged around the functional area; providing a second wafer or substrate, the second wafer or substrate having a second bonding area corresponding to the first bonding area; At least two circles of first annular protrusions are formed on the first bonding area of ​​the chip unit, and / or at least two circles of first annular protrusions are formed on the second bonding area of ​​the second wafer or substrate, and a fourth spacing area is formed between adjacent first annular protrusions; Filling the fourth spacer with glue, wherein the glue protrudes from the top surface of the first annular protrusion; The second wafer or substrate is aligned and pressed onto the first wafer.

9. The semiconductor wafer level packaging method according to claim 8, characterized in that: The filling amount of the glue is controlled so that after alignment and pressing, the glue protruding from the top surface of the first annular protrusion is squeezed to the side of the first annular protrusion away from the fourth spacing area.

10. The semiconductor wafer level packaging method according to claim 8, characterized in that: The filling amount of the glue is controlled so that after alignment and pressing, the glue protruding from the top surface of the first annular protrusion is partially squeezed into the space between the top surface of the first annular protrusion and the first bonding area or the second bonding area aligned with the top surface.

11. The semiconductor wafer level packaging method according to claim 8, characterized in that: When more than two circles of the first annular protrusions are formed, the amount of glue filled in the fourth spacing area close to the functional area is controlled to be less than or equal to the amount of glue filled in other fourth spacing areas.

12. The semiconductor wafer level packaging method according to claim 8, characterized in that: Before aligning and pressing the second wafer or substrate with the first wafer, the method further includes: The step of providing an annular dam on the second bonding area of ​​the second wafer or substrate and / or on the first bonding area of ​​the first wafer.

13. The semiconductor wafer level packaging method according to claim 12, characterized in that: The inner diameter of the annular cofferdam is smaller than the inner diameter of any of the first annular protrusions on the first bonding area or the second bonding area to which it belongs; The annular cofferdam is arranged on the first bonding area or the second bonding area aligned with the top surface of the first annular protrusion of the innermost circle.

14. The semiconductor wafer level packaging method according to claim 1 or 8, characterized in that: The method of forming the first annular protrusion comprises: Formation structure; forming a photoresist layer on the layer structure and patterning it to form a ring-shaped convex pattern; transferring the annular protrusion pattern to the layer structure to form the annular protrusion; or, The method of forming the annular protrusion comprises: forming a photoresist layer and patterning it to form a ring-shaped concave pattern; forming a layer structure covering the annular recessed pattern; The annular concave pattern is removed and at the same time, the layer structure located on the surface of the annular concave pattern is removed to form the annular protrusion.

15. The semiconductor wafer level packaging method according to claim 1 or 8, characterized in that: The glue is filled by dispensing or printing.

16. A semiconductor packaging structure, characterized in that: include: A first chip has a first surface, wherein the first surface has a functional area and a first bonding area, and the first bonding area is arranged around the functional area; A second chip or substrate, disposed on the first surface of the first chip, the second chip or substrate having a second bonding area bonded to the first bonding area; a glue bonding layer, disposed between the first bonding area and the second bonding area; and A first annular protrusion is arranged on the first bonding area and / or the second bonding area and is partially or completely located in the glue bonding layer.

17. The semiconductor package structure according to claim 16, wherein: It also includes a second annular protrusion, which is arranged on the first bonding area of ​​the first chip and / or the second bonding area of ​​the second chip or the substrate, the inner diameter of the second annular protrusion is smaller than the inner diameter of any of the first annular protrusions on the first bonding area or the second bonding area to which it belongs, and a third spacing area is formed between the second annular protrusion and the first annular protrusion adjacent to it, and the glue bonding layer is partially or fully arranged in the third spacing area.

18. The semiconductor package structure according to claim 17, wherein: The height of the second annular protrusion is greater than or equal to the height of the first annular protrusion.

19. A semiconductor packaging structure, characterized in that: include: A first chip has a first surface, wherein the first surface has a functional area and a first bonding area, and the first bonding area is arranged around the functional area; A second chip or substrate, disposed on the first surface of the first chip, the second chip or substrate having a second bonding area bonded to the first bonding area; At least two circles of first annular protrusions are arranged on the first bonding area of ​​the first chip and / or on the second bonding area of ​​the second chip or substrate, and a fourth spacing area is formed between adjacent first annular protrusions. Glue is arranged in the fourth spacing area, and the glue extends from the fourth spacing area to at least a portion of the space between the top surface of the first annular protrusion and the first bonding area or the second bonding area aligned with the top surface.

20. The semiconductor package structure according to claim 19, wherein: It also includes an annular cofferdam, which is arranged on the first bonding area or the second bonding area aligned with the top surface of the first annular protrusion arranged closest to the functional area.

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