Processing method and equipment of semiconductor device and storage medium

Abstract

The invention provides a processing method and equipment of a semiconductor device and a storage medium. The processing method of the semiconductor device comprises the following steps that in the atomic layer deposition circulation process, real-time state parameters of an atomic layer deposition valve are obtained, and the state parameters are selected from the accumulated action times and / or the actual response time of the switching state of the atomic layer deposition valve; according to the state parameters, delay compensation corresponding to action delay of the atomic layer deposition valve is determined; and transmitting a state switching control instruction to the atomic layer deposition valve in advance according to the delay compensation so as to control the atomic layer deposition valve to realize state switching at the target time.

Description

Technical Field

[0001] The present invention relates to the technical field of semiconductor device processing, and in particular to a semiconductor device processing method, a semiconductor device processing equipment, and a computer-readable storage medium. Background Art

[0002] In the atomic layer deposition process, the process gas is usually introduced into the chamber in a certain order and timing, and then a deposited film is formed on the surface of the wafer. This process involves multiple steps, and each step involves more process parameter conversions (for example: chamber temperature, type of gas introduced, flow rate and pressure). Therefore, the switching requirements of each step must rely on the corresponding switch switching action to achieve the control of the process gas type, flow rate and pressure. More importantly, since the time for each step is short, it is necessary to switch the switch frequently to achieve the higher precision requirements of the deposited film thickness.

[0003] The atomic layer deposition valve, which is currently widely used in the thin film deposition process, has a fast response speed and a relatively accurate action. However, as the number of actions of the atomic layer deposition valve accumulates, the response speed gradually slows down and the response time gradually increases, which seriously affects the accuracy of thin film deposition and the life of the equipment.

[0004] In order to overcome the above-mentioned defects of the prior art, there is an urgent need in the art for a semiconductor device processing technology for adaptively adjusting the response time, thereby improving the accuracy of thin film deposition and reducing the loss of equipment. Summary of the invention

[0005] A brief summary of one or more aspects is given below to provide a basic understanding of these aspects. This summary is not an exhaustive overview of all conceived aspects, and is neither intended to identify the key or decisive elements of all aspects nor to define the scope of any or all aspects. Its only purpose is to give some concepts of one or more aspects in a simplified form as a prelude to a more detailed description that will be given later.

[0006] In order to overcome the above-mentioned defects of the prior art, the present invention provides a semiconductor device processing method, a semiconductor device processing equipment, and a computer-readable storage medium for adaptively adjusting the response time, thereby improving the accuracy of thin film deposition and reducing the loss of equipment.

[0007] Specifically, the processing method of a semiconductor device provided according to the first aspect of the present invention includes the following steps: in an atomic layer deposition cycle process, obtaining real-time state parameters of an atomic layer deposition valve, wherein the state parameters are selected from the cumulative number of actions and / or the actual response time of the switching state of the atomic layer deposition valve; determining the delay compensation corresponding to the action delay of the atomic layer deposition valve according to the state parameters; and transmitting a control instruction of the switching state to the atomic layer deposition valve in advance according to the delay compensation, so as to control the atomic layer deposition valve to achieve state switching at the target time.

[0008] Further, in some embodiments of the present invention, the step of determining the delay compensation corresponding to the action delay of the atomic layer deposition valve according to the state parameter includes: counting the time stability of at least one environmental parameter of the atomic layer deposition cycle process, wherein the environmental parameter is selected from the working gas pressure, working temperature, and / or the driving gas pressure of the compressed air that drives the atomic layer deposition valve to switch the state; in response to the time stability of the environmental parameter reaching a preset stability threshold, substituting the acquired cumulative number of actions into pre-calibrated corresponding relationship data to determine its corresponding fixed compensation value; and in response to the time stability of the environmental parameter not reaching the preset stability threshold, determining the real-time compensation value for the next action of the atomic layer deposition valve according to the difference between the acquired actual response time and the preset standard response time.

[0009] Furthermore, in some embodiments of the present invention, the action delay of the atomic layer deposition valve increases with the increase of its cumulative action times. Before determining the delay compensation corresponding to the action delay of the atomic layer deposition valve according to the state parameters, the processing method also includes the following steps: calibrating the action delay of the atomic layer deposition valve at multiple cumulative action times respectively; and dividing the multiple cumulative action times into multiple intervals according to the value of the action delay, and respectively determining the fixed compensation value corresponding to each of the intervals.

[0010] Furthermore, in some embodiments of the present invention, the step of dividing the multiple cumulative action times into multiple intervals according to the value of the action delay includes: determining an upper limit of an allowable action delay according to the deposition speed and processing accuracy requirements of the atomic layer deposition cycle process; and dividing the multiple cumulative action times into multiple intervals according to the value of the action delay and the upper limit of the action delay.

[0011] Furthermore, in some embodiments of the present invention, the first value of the delay compensation in the interval of the cumulative number of actions of 10,000 to 50,000 times is 0.5 ms, and the second value of the delay compensation in the interval of the cumulative number of actions of 50,000 to 100,000 times is 1 ms.

[0012] Furthermore, in some embodiments of the present invention, the step of obtaining the actual response time includes: continuously obtaining the response time of the atomic layer deposition valve switching its state multiple times; and calculating the average value of the response time of the most recent preset number of times as the real-time response time of the atomic layer deposition valve.

[0013] Further, in some embodiments of the present invention, the processing method of the semiconductor device is implemented via a PLC module, and the step of transmitting the control instruction of the switching state to the atomic layer deposition valve in advance according to the delay compensation includes: obtaining the first action instruction of the atomic layer deposition valve in the current step of the PLC module, and the second action instruction of the atomic layer deposition valve in the next step of the PLC module; judging whether the first action instruction and the second action instruction are the same; in response to the judgment result that the first action instruction and the second action instruction are the same, waiting for the arrival of the next step; and in response to the judgment result that the first action instruction and the second action instruction are opposite, based on the first moment of the arrival of the next step, transmitting the second action instruction to the atomic layer deposition valve in advance with the delay compensation.

[0014] Further, in some embodiments of the present invention, the action of switching the state of the atomic layer deposition valve includes opening the valve and closing the valve. Before transmitting the control instruction of the switching state to the atomic layer deposition valve in advance according to the delay compensation, the processing method also includes the following steps: determining the target valve opening time of the atomic layer deposition valve according to the second moment when the target reactant controlled by the atomic layer deposition valve is introduced into the atomic layer deposition cycle process, and the standard valve opening time of the atomic layer deposition valve, and determining the first target step of performing the valve opening action accordingly; and determining the target valve closing time of the atomic layer deposition valve according to the third moment when the target reactant controlled by the atomic layer deposition valve is cut off in the atomic layer deposition cycle process, and the standard valve closing time of the atomic layer deposition valve, and determining the second target step of performing the valve closing action accordingly.

[0015] In addition, the processing equipment of the semiconductor device provided according to the second aspect of the present invention includes: a process chamber for carrying a wafer to perform an atomic layer deposition cycle process on it; a gas supply line, on which an atomic layer deposition valve is arranged, for providing the reactants required for the atomic layer deposition cycle process to the process chamber in a timely and quantitative manner; and a processor, which is configured to implement the processing method of the semiconductor device as described in the first aspect of the present invention.

[0016] In addition, the computer-readable storage medium provided according to the third aspect of the present invention stores computer instructions, which, when executed by a processor, implement the method for processing a semiconductor device according to the first aspect of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] The above features and advantages of the present invention can be better understood after reading the detailed description of the embodiments of the present disclosure in conjunction with the following drawings. In the drawings, the components are not necessarily drawn to scale, and components with similar related properties or features may have the same or similar reference numerals.

[0018] Figure 1 A method for processing a semiconductor device according to some embodiments of the present invention is shown.

[0019] Figure 2 A PLC program flow chart provided according to some embodiments of the present invention is shown.

[0020] Figure 3A A schematic diagram of the opening process of an atomic layer deposition valve in a normal state according to some embodiments of the present invention is shown.

[0021] Figure 3B A schematic diagram of the opening process of an atomic layer deposition valve in a delayed state according to some embodiments of the present invention is shown.

[0022] Figure 3C A schematic diagram of the opening process of an atomic layer deposition valve delay compensation state provided according to some embodiments of the present invention is shown.

[0023] Figure 4A A schematic diagram of the closing process of an atomic layer deposition valve in a normal state according to some embodiments of the present invention is shown.

[0024] Figure 4B A schematic diagram of the closing process of an atomic layer deposition valve in a delayed state according to some embodiments of the present invention is shown.

[0025] Figure 4C A schematic diagram of a closing process of an atomic layer deposition valve delay compensation state provided according to some embodiments of the present invention is shown. DETAILED DESCRIPTION

[0026] The following specific embodiments illustrate the implementation of the present invention, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. Although the description of the present invention will be introduced in conjunction with the preferred embodiment, this does not mean that the features of this invention are limited to this implementation. On the contrary, the purpose of introducing the invention in conjunction with the implementation is to cover other options or modifications that may be extended based on the claims of the present invention. In order to provide a deep understanding of the present invention, the following description will include many specific details. The present invention can also be implemented without using these details. In addition, in order to avoid confusion or blurring the focus of the present invention, some specific details will be omitted in the description.

[0027] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the specific meanings of the above terms in the present invention can be understood according to specific circumstances.

[0028] In addition, the terms "upper", "lower", "left", "right", "top", "bottom", "horizontal" and "vertical" used in the following description should be understood as the directions shown in the paragraph and the related drawings. Such relative terms are only used for the convenience of description and do not mean that the device described therein must be manufactured or operated in a specific direction, and therefore should not be understood as limiting the present invention.

[0029] It is understood that although the terms "first", "second", "third", etc. may be used herein to describe various components, regions, layers and / or parts, these components, regions, layers and / or parts should not be limited by these terms, and these terms are only used to distinguish different components, regions, layers and / or parts. Therefore, the first component, region, layer and / or part discussed below may be referred to as a second component, region, layer and / or part without departing from some embodiments of the present invention.

[0030] As mentioned above, the atomic layer deposition valve currently widely used in the thin film deposition process has a fast response speed and a relatively accurate action. However, as the number of actions of the atomic layer deposition valve accumulates, the response speed gradually slows down and the response time gradually increases, which seriously affects the accuracy of thin film deposition and the life of the equipment.

[0031] Specifically, the number of times the ALD valve is operated is related to the theoretical cycle life of the ALD valve and the actual working conditions. Theoretically, the performance of the ALD valves of brands such as Swagelok and CKD will not be affected if they are operated within 10 million times. However, if the working conditions are bad, for example, the working pressure of the ALD valve is higher than 35psig for a long time, or there are problems with humidity and purity, resulting in water vapor and impurities that drive the compressed air (Compressed Dry Air, CDA) of the ALD valve. The indicators cannot be met, etc., which will affect the service life, performance and response speed of the ALD valve.

[0032] The switching frequency of the ALD valve depends on the step time set in the process recipe. Because there are many steps in a recipe, and the ALD valve switching is completed when switching steps, the step time in different recipes will be different. Taking the ALD process as an example, the step time can be as short as 1 second, that is, the ALD valve switching frequency can be as fast as 1HZ.

[0033] In order to overcome the above-mentioned defects of the prior art, the present invention provides a semiconductor device processing method, a semiconductor device processing equipment, and a computer-readable storage medium for adaptively adjusting the response time, thereby improving the accuracy of thin film deposition and reducing the loss of equipment.

[0034] In some non-limiting embodiments, the processing method of the semiconductor device provided in the first aspect of the present invention can be implemented based on the processing equipment of the semiconductor device provided in the second aspect of the present invention. Specifically, the processing equipment of the semiconductor device is configured with a memory and a processor. The memory includes but is not limited to the computer-readable storage medium provided in the third aspect of the present invention, on which computer instructions are stored. When the computer instructions are executed by the processor, the processing method of the semiconductor device as in the first aspect of the present invention is implemented.

[0035] The following will describe the working principle of the processing equipment of the above-mentioned semiconductor device in combination with some embodiments of the processing method of semiconductor devices. Those skilled in the art will understand that the embodiments of the processing method of these semiconductor devices are only a non-limiting implementation method provided by the present invention, which is intended to clearly demonstrate the main concept of the present invention and provide some specific solutions that are convenient for the public to implement, rather than to limit all functions or all working modes of the processing equipment of the semiconductor device. Similarly, the processing equipment of the semiconductor device is also only a non-limiting implementation method provided by the present invention, and does not constitute a limitation on the execution subject or execution order of each step in the processing method of these semiconductor devices.

[0036] Specifically, the semiconductor device processing equipment provided by the second aspect of the present invention includes a process chamber, a gas supply pipeline and a processor. Here, the process chamber is used to carry a wafer to perform an atomic layer deposition cycle process on it. The gas supply pipeline is equipped with an atomic layer deposition valve, which is used to provide the reactants required for the atomic layer deposition cycle process to the process chamber in a timely and quantitative manner.

[0037] Please refer to Figure 1 , Figure 1 A method for processing a semiconductor device according to some embodiments of the present invention is shown.

[0038] like Figure 1As shown, the processor of the processing method of the semiconductor device can be implemented via a PLC module. Specifically, the PLC module of the processing equipment of the semiconductor device can first obtain the real-time state parameters of the atomic layer deposition valve in the atomic layer deposition cycle process, wherein the state parameters are selected from the cumulative number of actions and / or the actual response time of the switching state of the atomic layer deposition valve. Specifically, the step of obtaining the actual response time includes: continuously obtaining the response time of the atomic layer deposition valve switching its state multiple times; and calculating the average value of the response time of the most recent preset number of times as the real-time response time of the atomic layer deposition valve, and the preset number of times is usually set to 50 times. Afterwards, the PLC module can further determine the delay compensation corresponding to the action delay of the atomic layer deposition valve according to the state parameters. Finally, the PLC module can transmit the control instruction of the switching state to the atomic layer deposition valve in advance according to the delay compensation, so as to control the atomic layer deposition valve to achieve state switching at the target time. Here, the action of switching the state of the atomic layer deposition valve includes opening the valve and closing the valve.

[0039] Specifically, each time the atomic layer deposition valve is actuated, the timing starts from when the atomic layer deposition valve receives the action command (DO signal is valid) and stops when the atomic layer deposition valve actually moves (DI signal is valid). The response time of this atomic layer deposition valve can be calculated, and the response time and the current number of actions are stored in the cache. When the number of actions reaches the preset number, the average value of the atomic layer deposition valve response time within the number of actions is calculated, which is the real-time response time of the atomic layer deposition valve. The calculation method of the average value can be the cumulative value of the response time divided by the number of actions. Among them, the DO signal is the electrical signal obtained by the solenoid valve of the atomic layer deposition valve to start the switching action, and the DI signal is the position sensor of the atomic layer deposition valve detecting that the atomic layer deposition valve has actually moved.

[0040] Please refer to Figure 2 , Figure 2 A PLC program flow chart provided according to some embodiments of the present invention is shown.

[0041] like Figure 2 As shown, specifically, the PLC module first transmits the acquired cumulative number of actions and / or actual response time of the switching state of the atomic layer deposition valve to the software, and then enters the atomic layer deposition valve cycle process step.

[0042] In some embodiments, the first action instruction of the atomic layer deposition valve in the current step of the PLC module and the second action instruction of the atomic layer deposition valve in the next step of the PLC module are obtained, and then it is determined whether the first action instruction and the second action instruction are the same. In response to the judgment result that the first action instruction and the second action instruction are the same, the arrival of the next step is waited. In response to the judgment result that the first action instruction and the second action instruction are opposite, based on the first moment of the arrival of the next step, the second action instruction is transmitted to the atomic layer deposition valve in advance with delay compensation.

[0043] In some embodiments, the processing equipment of the semiconductor device counts the stability of at least one environmental parameter of the atomic layer deposition cycle process with respect to time, so that the compensation method can be selected according to the actual situation of the machine stability. Here, the environmental parameter is selected from the working pressure, working temperature, and / or driving pressure of the compressed air that drives the atomic layer deposition valve to switch the state. In response to the stability of the environmental parameter with respect to time reaching a preset stability threshold (for example: the variance of multiple data points within a preset time interval is less than or equal to the preset variance threshold), the accumulated number of actions obtained is substituted into the pre-calibrated corresponding relationship data (for example: the corresponding relationship table, the corresponding relationship curve) to determine the corresponding fixed compensation value; and in response to the stability of the environmental parameter with respect to time not reaching the preset stability threshold (for example: the variance of multiple data points within a preset time interval is greater than the preset variance threshold), according to the difference between the actual response time obtained and the preset standard response time (for example: the initial response time of the atomic layer deposition valve), the real-time compensation value for the next action of the atomic layer deposition valve is determined.

[0044] Specifically, if the conditions such as the ALD valve working pressure is normal and the CDA index of the compressed air driving the ALD valve is qualified are met, it can be judged that the working environment of the machine is relatively stable, and factors that have additional impact on the life of the ALD valve are eliminated.

[0045] Furthermore, this machine can be used as a reference machine, and the compensation value of this machine can be used as a support to perform fixed value compensation (the compensation value is the compensation value of the reference machine) on the atomic layer deposition valve response time of other machines with the same process conditions in stages (i.e., different action number intervals), so that machines with the same process can achieve more matched and unified process performance.

[0046] Accordingly, if there are predictable unstable factors in the working environment of the ALD valve of the machine for a period of time, such as unstable factory CDA pressure, too high or fluctuating working environment temperature and pressure, these factors may bring temporary additional impacts to the operation of the ALD valve, causing a response time lag, and the real-time compensation mode should be switched at this time. Calculate the actual response time of the ALD valve at the current stage and compare it with the standard response time, and make real-time dynamic compensation for the response time of the ALD valve in the current state, so as to timely capture abnormal changes in the response time of the ALD valve and make timely adjustments to avoid affecting the process performance.

[0047] Further, the action delay of the atomic layer deposition valve increases with the increase of its cumulative action times. Before determining the delay compensation corresponding to the action delay of the atomic layer deposition valve according to the state parameter, the processing method also includes the following steps: calibrating the action delay of the atomic layer deposition valve at multiple cumulative action times; and dividing the multiple cumulative action times into multiple intervals according to the value of the action delay, and determining the fixed compensation value corresponding to each interval respectively, where the fixed compensation value can be the average value or median value within the interval. Specifically, the processing equipment of the semiconductor device can determine the upper limit of the allowable action delay according to the deposition speed and processing accuracy requirements of the atomic layer deposition cycle process, and then divide the multiple cumulative action times into multiple intervals according to the value of the action delay and the upper limit of the action delay. The fixed compensation values ​​of different stages are compared with the actual response time and the standard response time (for example, 15±1ms) of different stages, and are obtained by referring to their life decay curves. For example, in the interval of 10000-50000 times of action times, it is found that the actual response time is 16.5ms, so the fixed compensation value of this stage can be set to about 0.5-1ms. Here, the first value of the delay compensation within the range of 10,000 to 50,000 cumulative action times may be 0.5 ms, and the second value thereof within the range of 50,000 to 100,000 cumulative action times may be 1 ms.

[0048] Please refer to Figure 3A to Figure 3C , Figure 3A A schematic diagram of the opening process of an atomic layer deposition valve in a normal state according to some embodiments of the present invention is shown. Figure 3B A schematic diagram of the opening process of an atomic layer deposition valve in a delayed state according to some embodiments of the present invention is shown. Figure 3C A schematic diagram of the opening process of an atomic layer deposition valve delay compensation state provided according to some embodiments of the present invention is shown.

[0049] like Figure 3A to Figure 3CAs shown, according to the second moment when the target reactant controlled by the atomic layer deposition valve is introduced into the atomic layer deposition cycle process and the standard valve opening time of the atomic layer deposition valve, the target valve opening moment of the atomic layer deposition valve is determined, and the first target step of performing the valve opening action is determined accordingly.

[0050] Specifically, if Figure 3A As shown in the figure, during the normal ALD valve opening process, the ALD valve is in a closed state in step 1, and the opening action is started in step 2. The response time from the ALD valve receiving the action command (DO_CDV is 1) to the actual opening (DI_CDV is 1) is about 15ms, which is the standard response time of the ALD valve. Figure 3B As shown in the figure, when the ALD valve has a response delay and there is no compensation in the control stage, when switching from step 1 to step 2, the actual response time of the ALD valve opening reaches about 20ms, which is 5ms longer than the standard response time, affecting the process performance. Figure 3C As shown, when compensation is performed in the control stage, the compensation time is 5ms, that is, the opening instruction is output in advance 5ms before the end of step 1. Since the actual response time of the atomic layer deposition valve is 20ms, the actual opening time can be guaranteed to be around 15ms in step 2, ensuring the accuracy of the opening time node and the process performance.

[0051] Please refer to Figure 4A to Figure 4C , Figure 4A A schematic diagram of the closing process of an atomic layer deposition valve in a normal state according to some embodiments of the present invention is shown. Figure 4B A schematic diagram of the closing process of an atomic layer deposition valve in a delayed state according to some embodiments of the present invention is shown. Figure 4C A schematic diagram of a closing process of an atomic layer deposition valve delay compensation state provided according to some embodiments of the present invention is shown.

[0052] like Figure 4A to Figure 4C As shown, according to the third moment of cutting off the target reactant controlled by the atomic layer deposition valve in the atomic layer deposition cycle process and the standard valve closing time of the atomic layer deposition valve, the target valve closing time of the atomic layer deposition valve is determined, and the second target step of performing the valve closing action is determined accordingly.

[0053] Specifically, if Figure 4A As shown in the figure, during the normal ALD valve closing process, the ALD valve is in the open state in step 1, and the closing action is started in step 2. The response time from the ALD valve receiving the action command (DO_CDV is 0) to the actual closing (DI_CDV is 0) is about 15ms, which is the standard response time of the ALD valve. Figure 4BAs shown in the figure, when the ALD valve has a response delay and there is no compensation in the control stage, when switching from step 1 to step 2, the actual response time of the ALD valve closing reaches about 20ms, which is 5ms longer than the standard response time, affecting the process performance. Figure 4C As shown, when compensation is performed in the control stage, the compensation time is 5ms, that is, the closing command is output in advance 5ms before the end of step 1. Since the actual response time of the atomic layer deposition valve is 20ms, the actual closing time can be guaranteed to be around 15ms in step 2, thereby ensuring the accuracy of the closing time node and the process performance.

[0054] In summary, the semiconductor device processing method, semiconductor device processing equipment, and computer-readable storage medium provided by the present invention can be used to adaptively adjust the response time, thereby improving the accuracy of thin film deposition and reducing the loss of equipment.

[0055] Although the above methods are illustrated and described as a series of actions for simplicity of explanation, it should be understood and appreciated that these methods are not limited by the order of the actions, because according to one or more embodiments, some actions may occur in a different order and / or concurrently with other actions from those illustrated and described herein or not illustrated and described herein but understandable to those skilled in the art.

[0056] The previous description of the disclosure is provided to enable any person skilled in the art to make or use the disclosure. Various modifications to the disclosure will be apparent to those skilled in the art, and the general principles defined herein may be applied to other variations without departing from the spirit or scope of the disclosure. Thus, the disclosure is not intended to be limited to the examples and designs described herein, but should be granted the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A method for processing a semiconductor device, characterized in that: The following steps are involved: In an atomic layer deposition cycle process, obtaining a real-time state parameter of an atomic layer deposition valve, wherein the state parameter is selected from the cumulative number of actions and / or the actual response time of the switching state of the atomic layer deposition valve; Determining a delay compensation corresponding to an action delay of the atomic layer deposition valve according to the state parameter; and According to the delay compensation, a control instruction of a switching state is transmitted to the atomic layer deposition valve in advance, so as to control the atomic layer deposition valve to realize state switching at a target time.

2. The processing method according to claim 1, characterized in that: The step of determining the delay compensation corresponding to the action delay of the atomic layer deposition valve according to the state parameter comprises: Statistically analyzing the stability of at least one environmental parameter of the atomic layer deposition cycle process over time, wherein the environmental parameter is selected from the working pressure and working temperature of the atomic layer deposition valve, and / or the driving pressure of the compressed air driving the atomic layer deposition valve to switch the state; In response to the stability of the environmental parameter with respect to time reaching a preset stability threshold, substituting the acquired cumulative number of actions into pre-calibrated corresponding relationship data to determine its corresponding fixed compensation value; and In response to the stability of the environmental parameter with respect to time not reaching a preset stability threshold, a real-time compensation value for a next action of the atomic layer deposition valve is determined according to a difference between an acquired actual response time and a preset standard response time.

3. The processing method according to claim 2, characterized in that: The action delay of the atomic layer deposition valve increases with the increase of the cumulative number of actions thereof. Before determining the delay compensation corresponding to the action delay of the atomic layer deposition valve according to the state parameter, the processing method further includes the following steps: respectively calibrating the action delay of the atomic layer deposition valve at a plurality of accumulated action times; and According to the value of the action delay, the plurality of accumulated action times are divided into a plurality of intervals, and a fixed compensation value corresponding to each of the intervals is determined respectively.

4. The processing method according to claim 3, characterized in that: The step of dividing the plurality of accumulated action times into a plurality of intervals according to the value of the action delay comprises: Determining an upper limit of an allowable action delay according to the deposition speed and processing accuracy requirements of the atomic layer deposition cycle process; and The plurality of accumulated action times are divided into a plurality of intervals according to the value of the action delay and the action delay upper limit.

5. The processing method according to claim 4, characterized in that: The first value of the delay compensation in the interval of 10,000 to 50,000 cumulative action times is 0.5 ms, and the second value of the delay compensation in the interval of 50,000 to 100,000 cumulative action times is 1 ms.

6. The processing method according to claim 2, characterized in that: The steps of obtaining the actual response time include: Continuously obtaining the response time of the atomic layer deposition valve switching its state multiple times; and An average value of the response time of the most recent preset number of times is calculated as the real-time response time of the atomic layer deposition valve.

7. The processing method according to claim 2, characterized in that: The semiconductor device processing method is implemented via a PLC module, and the step of transmitting a control instruction of a switching state to the atomic layer deposition valve in advance according to the delay compensation comprises: Obtaining a first action instruction of the atomic layer deposition valve in a current step of the PLC module and a second action instruction of the atomic layer deposition valve in a next step of the PLC module; Determining whether the first action instruction and the second action instruction are the same; In response to a determination result that the first action instruction and the second action instruction are the same, waiting for the next step to arrive; and In response to the opposite judgment result of the first action instruction and the second action instruction, based on the first moment of arrival of the next step, the second action instruction is transmitted to the atomic layer deposition valve in advance of the delay compensation.

8. The processing method according to claim 7, characterized in that: The action of switching the state of the atomic layer deposition valve includes opening the valve and closing the valve. Before transmitting the control instruction of the switching state to the atomic layer deposition valve in advance according to the delay compensation, the processing method further includes the following steps: Determine the target valve opening time of the atomic layer deposition valve according to the second time when the target reactant controlled by the atomic layer deposition valve is introduced in the atomic layer deposition cycle process and the standard valve opening time of the atomic layer deposition valve, and determine the first target step of performing the valve opening action accordingly; and According to the third moment of cutting off the target reactant controlled by the atomic layer deposition valve in the atomic layer deposition cycle process and the standard valve closing time of the atomic layer deposition valve, the target valve closing time of the atomic layer deposition valve is determined, and the second target step of performing the valve closing action is determined accordingly.

9. A semiconductor device processing equipment, characterized in that: include: A process chamber for holding wafers to be subjected to an atomic layer deposition cycle process; A gas supply pipeline, on which an atomic layer deposition valve is arranged, for providing the reactants required for the atomic layer deposition cycle process to the process chamber in a timely and quantitative manner; as well as A processor configured to implement the method for processing a semiconductor device according to any one of claims 1 to 8.

10. A computer-readable storage medium having computer instructions stored thereon, characterized in that: When the computer instructions are executed by a processor, the semiconductor device processing method according to any one of claims 1 to 8 is implemented.

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