Interrupt source processing method and device, storage medium and electronic equipment

Abstract

The embodiment of the invention provides an interrupt source processing method and device, a storage medium and electronic device.The method comprises the steps that in the process that an interrupt processing service responds to a target interrupt request to execute target interrupt processing, interrupt processing information is obtained, and the target interrupt request is a request transmitted to the interrupt processing service in advance; under the condition that it is determined that target interrupt processing executed by the interrupt processing service is abnormal from the interrupt processing information, a target interrupt source is determined, and the target interrupt source is an event or a signal which is sent by the simulation solid state disk and can trigger an interrupt request; a disable operation is performed on the target interrupt source to instruct the interrupt processing service to stop the target interrupt processing. Through the method and the device, the problem of relatively low test efficiency of interrupt processing in related technologies is solved, and the effects of improving the test efficiency and ensuring the test safety and the system stability are achieved.

Description

Technical Field

[0001] The embodiments of the present application relate to the field of computers, and in particular, to a method and device for processing an interrupt source, a storage medium, and an electronic device. Background Art

[0002] In the related art, during the verification process of the solid-state drive, a common method is to perform interrupt injection testing through a simulation platform during the design phase, and simulate interrupts through software tools to verify the system's interrupt response and processing capabilities.

[0003] However, the relevant technology does not take into account the later iterative updates of hardware design during the verification process, and the test efficiency of interrupt processing is low. Summary of the invention

[0004] The embodiments of the present application provide a method and device for processing an interrupt source, a storage medium, and an electronic device, so as to at least solve the problem of low test efficiency of interrupt processing in the related art.

[0005] According to one embodiment of the present application, a method for processing an interrupt source is provided, which is applied to an interrupt test device, wherein the interrupt test device is deployed in a simulation platform and connected to an interrupt processing service in the simulation platform, wherein the interrupt processing service is used to simulate the interrupt processing mechanism of a solid-state drive under abnormal circumstances, and the simulation platform is used to simulate the operation of a computer system, including: obtaining interrupt processing information during the process in which the interrupt processing service responds to a target interrupt request to perform a target interrupt processing, wherein the target interrupt request is a request pre-transmitted to the interrupt processing service; determining a target interrupt source when it is determined from the interrupt processing information that the target interrupt processing performed by the interrupt processing service is abnormal, wherein the target interrupt source is an event or signal emitted by the simulated solid-state drive that can trigger the interrupt request; and performing a disabling operation on the target interrupt source to instruct the interrupt processing service to stop the target interrupt processing.

[0006] In an exemplary embodiment, in the process of an interrupt processing service executing a target interrupt processing in response to an interrupt request, interrupt processing information is obtained, including at least one of the following: in the process of the interrupt processing service executing the target interrupt processing, an interrupt processing function that executes the target interrupt processing in the interrupt processing service is obtained to obtain the interrupt processing information from the interrupt processing function, wherein the interrupt processing information includes function information of the interrupt processing function; processing behavior information at a monitoring breakpoint set in the target interrupt processing is obtained to obtain the interrupt processing information; the number of times the interrupt request is triggered to execute is obtained by a counter set in the interrupt processing service to obtain the interrupt processing information; system resources of the computer system are obtained, and the interrupt processing information is extracted from the system resources, wherein the system resources include at least one of the following: processor resources, memory resources, interrupt resources, and disk storage resources; log information generated during the process of the interrupt processing service executing the target interrupt processing is obtained, and the interrupt processing information is extracted from the log information; the interrupt processing information is extracted from the trigger information generated by the trigger set in the interrupt processing service; the connection information of the simulated solid-state hard disk is detected to obtain the interrupt processing information from the connection information.

[0007] In an exemplary embodiment, when it is determined from interrupt processing information that the target interrupt processing executed by the interrupt processing service is abnormal, determining the target interrupt source includes: when it is determined from the interrupt processing information that the target interrupt processing executed by the interrupt processing service is abnormal, extracting target interrupt information from the target interrupt request, wherein the target interrupt information includes at least one of the following: interrupt vector, interrupt type, interrupt level, device identification, interrupt data pointer, interrupt mask, interrupt priority; searching for the target interrupt source from an interrupt vector table according to the target interrupt information, wherein the interrupt vector table is a vector table pre-stored in the computer system, and the interrupt vector table includes interrupt information of multiple interrupt requests.

[0008] In an exemplary embodiment, a disabling operation is performed on the target interrupt source to instruct the interrupt processing service to stop the target interrupt processing, including at least one of the following: obtaining the target hard disk information of the simulated solid-state hard disk, and disabling the target interrupt source according to the interrupt disabling method corresponding to the target hard disk information; adjusting the interrupt parameter value of the interrupt mask register in the computer system to disable the target interrupt source; disabling the target interrupt source by setting a target disabling function or disabling instruction to disable the target interrupt source.

[0009] In an exemplary embodiment, after performing a disabling operation on the target interrupt source to instruct the interrupt processing service to stop the target interrupt processing, the above method also includes: storing the target interrupt source in a disabling list, and updating the first state change information of other components to the second state change information, wherein the other components are components associated with the simulated solid-state hard disk, the first state change information is information corresponding to the target interrupt processing of the target interrupt source, and the second state change information is information corresponding to other interrupt processing of other interrupt sources; when it is determined that the interrupt processing service completes the interrupt processing mechanism for the simulated solid-state hard disk, the target interrupt source is restored and the second state change information of the other components is updated to the first state change information to restore the target interrupt processing performed on the target interrupt source.

[0010] In an exemplary embodiment, after determining that the interrupt processing service completes the interrupt processing mechanism for the simulated solid-state hard disk, restoring the target interrupt source and updating the second state change information of other components to the first state change information, the above method also includes: recording the operation process of performing the disabling operation on the target interrupt source to obtain first process information; recording and restoring the processing process of performing the target interrupt processing on the target interrupt source to obtain second process information; generating an interrupt test report for the interrupt processing service using the first process information and the second process information; and evaluating the interrupt simulation performance of the interrupt processing service based on the interrupt test report.

[0011] In an exemplary embodiment, during the process of the interrupt processing service responding to the target interrupt request to execute the target interrupt processing, after obtaining the interrupt processing information, the above method also includes: determining the target interrupt processing function when it is determined from the interrupt processing information that the target interrupt processing executed by the interrupt processing service is normal; and continuing to execute the target interrupt processing using the target interrupt processing function.

[0012] According to another embodiment of the present application, there is provided an interrupt source processing device, which is applied to an interrupt test device. The interrupt test device is deployed in a simulation platform and connected to an interrupt processing service in the simulation platform. The interrupt processing service is used to simulate the interrupt processing mechanism of a solid-state drive under abnormal circumstances. The simulation platform is used to simulate the operation of a computer system, including: a first acquisition module, used to obtain interrupt processing information during the process in which the interrupt processing service responds to a target interrupt request to perform a target interrupt processing, wherein the target interrupt request is a request pre-transmitted to the interrupt processing service; a first determination module, used to determine a target interrupt source when it is determined from the interrupt processing information that the target interrupt processing performed by the interrupt processing service is abnormal, wherein the target interrupt source is an event or signal emitted by the simulated solid-state drive that can trigger the interrupt request; a first operation module, used to perform a disabling operation on the target interrupt source to instruct the interrupt processing service to stop the target interrupt processing.

[0013] According to another embodiment of the present application, a computer-readable storage medium is provided, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when run.

[0014] According to another embodiment of the present application, an electronic device is provided, including a memory and a processor, wherein the memory stores a computer program, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0015] According to another embodiment of the present application, a computer program product is provided, including a computer program, and when the computer program is executed by a processor, the steps in any of the above method embodiments are implemented.

[0016] Through the present application, since the target interrupt request is transmitted to the interrupt processing service in advance, the interrupt processing service quickly responds to the target interrupt request to execute the target interrupt processing after obtaining the interrupt processing information, and disables the interrupt source in time when an exception occurs in the interrupt processing. Therefore, the problem of low testing efficiency of interrupt processing in related technologies can be solved, thereby achieving the effect of improving test efficiency, ensuring test safety and system stability. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 The hardware structure frame of the server device of the interrupt source processing method of the embodiment of the present application is Figure 2

[0018] Figure 2 A method for processing an interrupt source according to an embodiment of the present application is shown in the following flow Figure 2

[0019] Figure 3 The process of the automated test system based on the SSD abnormal interrupt module on the simulation platform according to the embodiment of the present application is as follows: Figure 2

[0020] Figure 4 is a schematic diagram of an interrupt disabling module according to an embodiment of the present application Figure 2

[0021] Figure 5 It is a structural block diagram of an interrupt source processing device according to an embodiment of the present application. DETAILED DESCRIPTION

[0022] The embodiments of the present application will be described in detail below with reference to the accompanying drawings and in combination with the embodiments.

[0023] It should be noted that the terms "first", "second", etc. in the specification and claims of this application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence.

[0024] The method embodiments provided in the embodiments of the present application can be executed in a server device or a similar computing device. Taking running on a server device as an example, Figure 1 FIG. 1 is a hardware structure block diagram of a server device of an interrupt source processing method according to an embodiment of the present application. Figure 1 As shown, the server device may include one or more ( Figure 1 Only one is shown in the figure) processor 102 (processor 102 may include but is not limited to a processing device such as a microprocessor MCU or a programmable logic device FPGA) and a memory 104 for storing data, wherein the server device may also include a transmission device 106 and an input / output device 108 for communication functions. It can be understood by those skilled in the art that Figure 1 The structure shown is only for illustration and does not limit the structure of the above server device. Figure 1 More or fewer components as shown, or with Figure 1 Different configurations are shown.

[0025] The memory 104 can be used to store computer programs, for example, software programs and modules of application software, such as the computer program corresponding to the processing method of the interrupt source in the embodiment of the present application. The processor 102 executes various functional applications and data processing by running the computer program stored in the memory 104, that is, to implement the above method. The memory 104 may include a high-speed random access memory, and may also include a non-volatile memory, such as one or more magnetic storage devices, flash memory, or other non-volatile solid-state memory. In some examples, the memory 104 may further include a memory remotely arranged relative to the processor 102, and these remote memories may be connected to the server device via a network. Examples of the above-mentioned network include, but are not limited to, the Internet, an intranet, a local area network, a mobile communication network, and combinations thereof.

[0026] The transmission device 106 is used to receive or send data via a network. The specific example of the above network may include a wireless network provided by a communication provider of the server device. In one example, the transmission device 106 includes a network adapter (Network Interface Controller, referred to as NIC), which can be connected to other network devices through a base station so as to communicate with the Internet. In one example, the transmission device 106 can be a radio frequency (RF) module, which is used to communicate with the Internet wirelessly.

[0027] In this embodiment, a method for processing an interrupt source is provided. Figure 2 is a flowchart of a method for processing an interrupt source according to an embodiment of the present application, such as Figure 2 As shown, the process includes the following steps:

[0028] Step S202, obtaining interrupt processing information during the process in which the interrupt processing service responds to the target interrupt request and performs the target interrupt processing, wherein the target interrupt request is a request pre-transmitted to the above-mentioned interrupt processing service;

[0029] Step S204, when it is determined from the interrupt processing information that the target interrupt processing executed by the interrupt processing service is abnormal, determining a target interrupt source, wherein the target interrupt source is an event or signal sent by the simulated solid state drive that can trigger the interrupt request;

[0030] Step S206, performing a disabling operation on the target interrupt source to instruct the interrupt processing service to stop the target interrupt processing.

[0031] Optionally, the interrupt test equipment used in this embodiment can be selected according to actual needs and application scenarios, including but not limited to the following equipment: logic analyzer, protocol analyzer, performance analysis tool, debugger, hardware emulator, embedded development tools, software testing tools such as Postman and JMeter, etc.

[0032] Optionally, the simulation platform in this embodiment is a tool or software for simulating the operation of a computer system, which can be used in various scenarios such as research, development, testing and education. The types of simulation platforms include, but are not limited to: hardware emulators, such as ARM (processor architecture based on RISC (Reduced Instruction Set Computer) principles), MIPS (processor architecture based on RISC principles), x86 and other architecture emulators. System emulators, such as QEMU (QuickEmulator), a very popular open source system emulator and virtualizer. Software emulators, such as virtual machines (VMware, VirtualBox) and container technology (Docker). Which simulation platform is chosen depends on the needs of the interrupt test.

[0033] Optionally, the interrupt handling service in this embodiment is used to simulate the interrupt handling mechanism of the solid-state drive under abnormal circumstances. The interrupt handling service is a mechanism for responding to interrupt signals generated by hardware or software. When the system receives an interrupt signal, it suspends the currently executing task and transfers control to the corresponding interrupt handler. For example, when processing storage devices such as SSDs, some key aspects of the interrupt handling service in simulating SSDs include but are not limited to: identifying different types of interrupts, such as device failure, data corruption, power failure, etc. In the event of a device failure, try to reinitialize the device or switch to a backup device. When an SSD is abnormal, data protection and recovery are critical. The interrupt handling service needs to ensure the integrity of the data and recover the lost data as much as possible. The interrupt handling service records all relevant error information and processing actions for fault analysis and system maintenance. In some cases, the firmware of the SSD may have defects, resulting in abnormal interrupts. The interrupt handling service needs to be able to detect these problems and update the firmware when necessary. When simulating the interrupt handling mechanism of the SSD, the above functions can be implemented using software simulation, which helps to test and verify the effectiveness of the interrupt handling strategy before hardware deployment. In addition, simulation can also be used to evaluate the impact of different interrupt handling strategies on system performance and reliability.

[0034] Optionally, the target interrupt request in this embodiment can be an interrupt mechanism for realizing efficient communication between hardware and software in a computer system. When a specific hardware device (target device) needs to notify the CPU or operating system to perform certain operations, an interrupt request is transmitted. This mechanism allows the system to respond to external events in a timely manner, improving system performance and response speed.

[0035] Targeted interrupt requests are sent in advance to the interrupt handling service. This means that when a hardware device needs attention, it sends a signal in advance so that the operating system or CPU can prepare. This mechanism allows the operating system or CPU to respond immediately when an interrupt request arrives, rather than checking for an interrupt request after processing the current task. This reduces latency and improves the responsiveness of the system. In addition, targeted interrupt requests can be applied to a variety of hardware devices, such as network interface cards, storage devices, graphics processors, etc. Targeted interrupt requests provide a high degree of flexibility for the system to adapt to different hardware configurations. In a multitasking operating system, interrupt requests may have different priorities. The operating system needs to be able to decide the processing order based on the priority of the interrupt request to ensure that critical tasks are processed in a timely manner. The interrupt handling service is the part of the operating system that is responsible for receiving and processing interrupt requests. It needs to be able to quickly identify the source of the interrupt request and call the corresponding handler based on the nature of the request. With targeted interrupt requests, computer systems can more effectively manage the interaction between hardware and software, improving overall performance and user experience.

[0036] Optionally, the interrupt processing information in this embodiment includes but is not limited to: the entry address of the interrupt service routine, an identification code for uniquely identifying the device or event that generated the interrupt, certain hardware allows reading its status register to obtain detailed information about the interrupt, the status when the interrupt occurs, or other relevant information.

[0037] Optionally, the target interrupt processing in the present embodiment is in an exception. In the interrupt processing service, the target interrupt processing refers to that a specific interrupt processing program is started in response to a specific interrupt signal. Each interrupt signal has an interrupt processing program associated with it, which is used to perform tasks related to the interrupt signal. An exception refers to an error or abnormal situation that occurs during the execution of a program. The exception may be caused by a hardware problem, a software error, or other reasons. When an exception occurs, the execution flow of the program may be interrupted, requiring error handling or recovery. In some cases, the interrupt processing service may encounter problems that prevent it from executing normally. This may be caused by a hardware failure, a software error, or other reasons. In this case, it is necessary to determine whether the target interrupt processing program is in an abnormal state.

[0038] Optionally, a specific solution for implementing this embodiment may include the following steps:

[0039] S1, build a simulation platform, which can be a software simulation environment, for example, using software simulation technology to simulate the operation of a computer system. The simulation platform includes a simulated interrupt processing service, which is used to simulate the interrupt processing mechanism of the solid state drive under abnormal circumstances.

[0040] S2, generation and transmission of interrupt requests, during the operation of the emulated solid state drive, interrupt requests may be generated due to various reasons (e.g., hardware failure, data error, etc.). These requests will be transmitted to the interrupt processing service in advance for subsequent processing.

[0041] S3, interrupt processing service response process, after receiving the interrupt request, the interrupt processing service starts to execute the target interrupt processing. This processing may include error detection, data recovery, status reporting and other operations.

[0042] S4, obtaining interrupt processing information. During the process of the interrupt processing service executing the target interrupt processing, it is necessary to monitor and obtain the interrupt processing information in real time. The information may include processing status, error type, processing progress, etc.

[0043] S5, abnormality detection and target interrupt source determination, analyze the interrupt processing information, if it is found that the processing performed by the interrupt processing service is abnormal (for example, the processing cannot be completed for a long time, the processing result is inconsistent with the expectation, etc.), it is necessary to further determine the cause of the abnormality. In this process, it is necessary to identify the target interrupt source that triggers the abnormal interrupt request, which may be a specific event or signal, such as a hardware failure signal, a data check error, etc.

[0044] S6, disabling operation execution: After determining the target interrupt sources, disabling operations are performed on these sources, that is, sending instructions to the interrupt processing service to stop the current target interrupt processing process. The purpose of the disabling operation is to prevent the exception processing from continuing, avoiding possible system instability or further errors or affecting the progress of the test.

[0045] S7, follow-up processing, after the disabling operation is completed, it is necessary to record the abnormal situation and decide whether to restart the interruption processing or take other remedial measures according to the specific situation.

[0046] S8, feedback and optimization, based on the results of exception handling, feedback is given to the simulation platform and interrupt handling service to optimize the simulation environment and interrupt handling mechanism to improve the stability and reliability of the system.

[0047] Through the above steps, since the target interrupt request is transmitted to the interrupt processing service in advance, the interrupt processing service quickly responds to the target interrupt request and executes the target interrupt processing after obtaining the interrupt processing information, and disables the interrupt source in time when an exception occurs in the interrupt processing. Therefore, the problem of low test efficiency of interrupt processing in related technologies can be solved, thereby achieving the effect of improving test efficiency, ensuring test safety and system stability.

[0048] In an exemplary embodiment, in the process of an interrupt processing service executing a target interrupt processing in response to an interrupt request, interrupt processing information is obtained, including at least one of the following: in the process of the interrupt processing service executing the target interrupt processing, an interrupt processing function that executes the target interrupt processing in the interrupt processing service is obtained to obtain the interrupt processing information from the interrupt processing function, wherein the interrupt processing information includes function information of the interrupt processing function; processing behavior information at a monitoring breakpoint set in the target interrupt processing is obtained to obtain the interrupt processing information; the number of times the interrupt request is triggered to execute is obtained by a counter set in the interrupt processing service to obtain the interrupt processing information; system resources of the computer system are obtained, and the interrupt processing information is extracted from the system resources, wherein the system resources include at least one of the following: processor resources, memory resources, interrupt resources, and disk storage resources; log information generated during the process of the interrupt processing service executing the target interrupt processing is obtained, and the interrupt processing information is extracted from the log information; the interrupt processing information is extracted from the trigger information generated by the trigger set in the interrupt processing service; the connection information of the simulated solid-state hard disk is detected to obtain the interrupt processing information from the connection information.

[0049] Optionally, obtaining the target interrupt processing function in the interrupt processing service and obtaining the interrupt processing information from the interrupt processing function involve the underlying implementation of the operating system and hardware in the computer system. The specific method may vary depending on the operating system and hardware platform. The interrupt processing function is a piece of code executed by the operating system or hardware when an interrupt occurs. For example, in the Linux operating system, the interrupt processing service is completed by the code in the kernel space. In the Linux operating system, interrupt processing functions can be written or modified, and these functions are called when an interrupt occurs. For example, the request_irq() function is used to register the interrupt processing function. The interrupt number, timestamp, device or condition that triggers the interrupt, etc. included in the interrupt processing function are determined as interrupt processing information.

[0050] Optionally, in the target interrupt processing, the processing behavior information at the set monitoring breakpoint includes but is not limited to: the type of monitoring breakpoint, the conditions for triggering the monitoring breakpoint, the location of the monitoring breakpoint, the behavior of the monitoring breakpoint (for example, pausing execution, recording the current program status, sending notifications or logs, etc.), the status of the monitoring breakpoint (for example, activated, disabled, or disabled after single-step execution once), and if there are multiple monitoring breakpoints in the system, it is necessary to determine the priority of their triggering to determine which breakpoint should be processed first.

[0051] Optionally, in this embodiment, the number of times the interrupt is triggered can be obtained by reading the value of a counter.

[0052] Optionally, the method of extracting interrupt processing information from system resources mainly depends on the operating system or hardware platform used. For example, the interrupt processing information is extracted by viewing the interrupt vector table in the system, wherein the interrupt vector table is a key resource that defines the mapping between the interrupt number and the interrupt processing function. For example, on a computer with an x86 architecture, the interrupt vector table is a data structure loaded into the memory by the operating system. For another example, by consulting the documentation of the operating system or hardware platform used, understand how to obtain and analyze interrupt processing information. For another example, when an interrupt occurs, the register state of the processor may contain useful information about the interrupt.

[0053] This embodiment obtains interrupt processing information in a variety of ways during the process of the interrupt processing service responding to an interrupt request and executing a target interrupt processing, thereby enriching the interrupt processing information and facilitating accurate judgment of whether the target interrupt processing executed by the interrupt processing service is abnormal.

[0054] In an exemplary embodiment, when it is determined from interrupt processing information that the target interrupt processing executed by the interrupt processing service is abnormal, determining the target interrupt source includes: when it is determined from the interrupt processing information that the target interrupt processing executed by the interrupt processing service is abnormal, extracting target interrupt information from the target interrupt request, wherein the target interrupt information includes at least one of the following: interrupt vector, interrupt type, interrupt level, device identification, interrupt data pointer, interrupt mask, interrupt priority; searching for the target interrupt source from an interrupt vector table according to the target interrupt information, wherein the interrupt vector table is a vector table pre-stored in the computer system, and the interrupt vector table includes interrupt information of multiple interrupt requests.

[0055] Optionally, in this embodiment, the target interrupt processing being abnormal includes but is not limited to: cyclically triggering the target interrupt processing, not triggering the target interrupt processing, etc.

[0056] In this embodiment, the interrupt vector is the entry address of the interrupt service routine. The interrupt type can indicate the source of the interrupt, for example, a hardware interrupt or a software interrupt. The interrupt level refers to the priority level of the interrupt. The interrupt comes from the device identifier of a specific device, which helps to identify the device. The interrupt data pointer is used to point to the interrupt-related data structure. The interrupt mask is used to determine which interrupts should be masked. The interrupt priority determines the priority of interrupt processing.

[0057] Optionally, this embodiment will query the interrupt vector table pre-stored in the computer system according to the extracted interrupt information. This vector table contains all possible interrupt requests and related information in the system. By matching the interrupt information with the records in the interrupt vector table, the system can find the interrupt source that generates the exception. For example, if the interrupt type is a hardware interrupt and the device identifier is a specific printer, the system will locate the corresponding hardware device.

[0058] This embodiment can reduce the delay of responding to interrupts and improve the efficiency and accuracy of searching for target interrupt sources by extracting target interrupt information from a target interrupt request and searching for a target interrupt source from an interrupt vector table according to the target interrupt information.

[0059] In an exemplary embodiment, a disabling operation is performed on the target interrupt source to instruct the interrupt processing service to stop the target interrupt processing, including at least one of the following: obtaining the target hard disk information of the simulated solid-state hard disk, and disabling the target interrupt source according to the interrupt disabling method corresponding to the target hard disk information; adjusting the interrupt parameter value of the interrupt mask register in the computer system to disable the target interrupt source; disabling the target interrupt source by setting a target disabling function or disabling instruction to disable the target interrupt source.

[0060] Optionally, disabling the target interrupt source in an interrupt disabling mode corresponding to the target hard disk information includes, but is not limited to: prohibiting or disabling the target interrupt source.

[0061] Optionally, in a computer system, interrupt mask registers are used to control which interrupts can be responded to by the system. By adjusting the parameter values ​​in these registers, a specific interrupt source can be disabled or enabled, thereby achieving the disabling of the target interrupt source.

[0062] Alternatively, using a target disabling function or instruction involves writing or using a specific function or instruction to disable a target interrupt source. This approach is typically implemented at the software level and may require specific programming of the interrupt handling logic to ensure that a specific interrupt source can be accurately handled and disabled.

[0063] Optionally, assuming that the interrupt number of the solid-state hard disk included in the target hard disk information is 0x01, the register of the interrupt controller can be accessed based on 0x01, and the target interrupt source can be disabled by writing a specific value to the register. It should be noted that this embodiment needs to define the interrupt number of the solid-state hard disk and the register address of the interrupt controller. Then read the current interrupt controller state, and disable the target interrupt source by calculating the mask of the disable bit. Finally, write the new state back to the interrupt controller register to achieve the disabling of the hard disk interrupt source.

[0064] This embodiment performs disabling operations on target interrupt sources in multiple ways, thereby improving the efficiency of disabling target interrupt sources.

[0065] In an exemplary embodiment, after performing a disabling operation on the target interrupt source to instruct the interrupt processing service to stop the target interrupt processing, the above method also includes: storing the target interrupt source in a disabling list, and updating the first state change information of other components to the second state change information, wherein the other components are components associated with the simulated solid-state hard disk, the first state change information is information corresponding to the target interrupt processing of the target interrupt source, and the second state change information is information corresponding to other interrupt processing of other interrupt sources; when it is determined that the interrupt processing service completes the interrupt processing mechanism for the simulated solid-state hard disk, the target interrupt source is restored and the second state change information of the other components is updated to the first state change information to restore the target interrupt processing performed on the target interrupt source.

[0066] Optionally, the updating of the first state change information and the second state change information of other components in this embodiment refers to updating the interrupt source list that has been fixedly allocated to a specific module at the hardware level.

[0067] Assume that there is an emulated solid-state drive SSD that works with multiple components (e.g., processor, memory, network interface, etc.). In this environment, you may need to handle different types of interrupts, such as data transfer interrupts or hardware failure interrupts, including the following steps:

[0068] Step 1: Identify and handle interrupt sources, including:

[0069] S1, identification of target interrupt source: the system detects an interrupt request from the simulated SSD (e.g., data writing is completed).

[0070] S2, interrupt processing: The system recognizes and handles this interrupt, for example, marking the data write operation as completed.

[0071] Step 2: Status change and disability list update, including:

[0072] S1, disable list update: Add the target interrupt source to a disable list, temporarily blocking further interrupt requests from this source.

[0073] S2, state update: For other components associated with the emulated SSD, their states are updated from the first state change (ie, corresponding to the processing of the target interrupt source) to the second state change, which indicates that they should now be prepared to handle other types of interrupts.

[0074] Step 3: Completion of interrupt processing service.

[0075] This embodiment can temporarily transfer the target interrupt source from a normal working state to a disabled state by storing the target interrupt source in the disabled list, that is, these interrupt sources will not affect the system for a period of time. The complexity and potential conflicts of the system in processing interrupts can be reduced, thereby improving the stability of the system. Once the interrupt processing service is confirmed to be completed, the system restores the target interrupt source to a normal working state, and restores the previously updated second state change information to the first state change information, and resumes processing the target interrupt source. The impact of interrupt processing on system performance can be reduced.

[0076] In an exemplary embodiment, after determining that the interrupt processing service completes the interrupt processing mechanism for the simulated solid-state hard disk, restoring the target interrupt source and updating the second state change information of other components to the first state change information, the above method also includes: recording the operation process of performing the disabling operation on the target interrupt source to obtain first process information; recording and restoring the processing process of performing the target interrupt processing on the target interrupt source to obtain second process information; generating an interrupt test report for the interrupt processing service using the first process information and the second process information; and evaluating the interrupt simulation performance of the interrupt processing service based on the interrupt test report.

[0077] Optionally, the first process information includes but is not limited to: the time point of the operation, the operation steps and any related system state changes. The second process information includes but is not limited to: the time point of recovery, the processing steps and the system state. The interruption test report records in detail the interruption disabling and recovery process, as well as the system's performance in these processes. The interruption simulation performance includes but is not limited to indicators such as interruption response time, system stability, and the accuracy and efficiency of interruption processing.

[0078] Optionally, this embodiment can analyze the problems found in the test report, such as interrupt processing delays, system crashes, etc., and provide optimization suggestions to improve the performance and stability of the interrupt processing service. The test process, results, and suggestions can also be documented for reference by the development team. The test method or interrupt processing strategy can be adjusted based on the feedback to improve the overall performance of the system.

[0079] This embodiment can more accurately evaluate the interrupt handling capability and performance of the interrupt handling service by recording the operation process of the disabling operation and the target interrupt handling. By using the interrupt test report, you can fully understand all aspects of the interrupt handling service when handling interrupts, including response time, processing efficiency, etc., to provide a basis for the optimization and improvement of the interrupt handling service.

[0080] In an exemplary embodiment, during the process of the interrupt processing service responding to the target interrupt request to execute the target interrupt processing, after obtaining the interrupt processing information, the above method also includes: determining the target interrupt processing function when it is determined from the interrupt processing information that the target interrupt processing executed by the interrupt processing service is normal; and continuing to execute the target interrupt processing using the target interrupt processing function.

[0081] Optionally, after obtaining the interrupt information, this embodiment needs to check the information to determine whether there is a valid interrupt processing service to respond to the interrupt. This may involve checking the status of the interrupt processing services to ensure that they are executable and are not suspended or executing other tasks. If the status of the interrupt processing service is normal, the operating system will look for a suitable interrupt processing function to handle the interrupt. This function is specially written to handle specific types of interrupts. Once the processing function is determined, the operating system will call this function and transfer control to it so that it can perform interrupt processing.

[0082] Optionally, after the interrupt processing is completed, this embodiment needs to restore to the context before the interruption, including saving and restoring register status, task status, etc., to ensure the stability and consistency of the system.

[0083] This embodiment determines the target interrupt processing function by using the interrupt processing information to determine that the target interrupt processing executed by the interrupt processing service is normal, so as to achieve efficient and safe response to the interrupt request.

[0084] The present application is described in detail below with reference to specific embodiments:

[0085] This specific embodiment aims to solve the problems of manual intervention, inefficiency and error-proneness in the test of interrupt processing in the related technology, and proposes an automated testing system based on the SSD abnormal interrupt module on the simulation platform. The method involves a dynamic disabling and recovery mechanism, and the key lies in the intelligent disabling logic. The system consists of an interrupt source identification module, an interrupt disabling module, a shielding maintenance module, and a report generation module. The specific steps are as follows: Figure 3 As shown, including:

[0086] S3 0 1, after the simulated target interrupt request is injected, the interrupt source identification module detects whether the interrupt processing process enters a loop trigger, wherein the loop trigger is used to indicate that when the interrupt processing service attempts to simulate an interrupt to verify the system response, if a certain interrupt has been fixedly assigned to a specific module at the hardware level, this may cause the interrupt to be continuously triggered, because the software-triggered interrupt cannot be correctly processed or cleared, which will cause the CPU to continuously try to respond to the same interrupt; when the interrupt source identification module determines that the interrupt processing enters a loop trigger, the target interrupt source is identified by the interrupt source identifier carried in the target interrupt request; when the interrupt processing does not enter a loop trigger, it directly enters the next interrupt flow test, and calls the corresponding interrupt processing function according to the normal interrupt processing mode to complete the test task function;

[0087] S302, when the interrupt processing enters the loop trigger, the interrupt disabling module disables the target interrupt source and continues to enter the next interrupt test, wherein disabling the target interrupt source means no longer generating a signal that triggers the target interrupt request, that is, no longer triggering the target interrupt request, and temporarily disabling the target interrupt source;

[0088] S303, the disabled target interrupt source in the interrupt disabling module is counted into the shielding list, and after maintenance by the shielding maintenance module, the disabled target interrupt source and the normal interrupt function are automatically restored after the test is completed; Figure 4 As shown in the figure, when the intelligent disabling logic is triggered and starts to disable a certain interrupt source, the system needs to update the interrupt mask list in time, record the disabled interrupt source information, and update the status changes of other related components; when the test is completed or the disabled interrupt source needs to be restored, according to the information recorded in the interrupt mask list, the disabled interrupt sources are restored one by one, and the status of other related components is restored, so that the system returns to the normal working state, realizing the state synchronization mechanism of disabling and restoring;

[0089] S304, the report generation module records the operation history of disability and recovery and performs stability assessment.

[0090] This specific embodiment automatically identifies interrupt sources that may cause test interference and quickly disables them, thereby improving test efficiency. It also dynamically disables related interrupt sources to ensure test safety and system stability. It automatically restores disabled interrupt sources and restores normal interrupt functions. The state synchronization mechanism ensures the state consistency of all related components during the disabling and restoring process. It generates a safety test report to record the operation history and the impact assessment on system stability.

[0091] It should be noted that, through the description of the above implementation methods, those skilled in the art can clearly understand that the method according to the above embodiment can be implemented by means of software plus a necessary general hardware platform, and of course, it can also be implemented by hardware, but in many cases the former is a better implementation method. Based on this understanding, the technical solution of the present application, or the part that contributes to the relevant technology, can be embodied in the form of a software product, which is stored in a storage medium (such as ROM / RAM, disk, CD), including a number of instructions for a terminal device (which can be a mobile phone, computer, server, or network device, etc.) to execute the methods described in each embodiment of the present application.

[0092] In this embodiment, a processing device for an interrupt source is also provided, which is applied to an interrupt test device. The interrupt test device is deployed in a simulation platform and connected to an interrupt processing service in the simulation platform. The interrupt processing service is used to simulate the interrupt processing mechanism of a solid-state hard disk under abnormal circumstances, and the simulation platform is used to simulate the operation of a computer system. The device is used to implement the above-mentioned embodiments and preferred implementation modes, and those that have been described will not be repeated. As used below, the term "module" can implement a combination of software and / or hardware for a predetermined function. Although the device described in the following embodiments is preferably implemented in software, the implementation of hardware, or a combination of software and hardware, is also possible and conceived.

[0093] Figure 5 is a structural block diagram of an interrupt source processing device according to an embodiment of the present application, such as Figure 5 As shown, the device comprises:

[0094] The first acquisition module 52 is used to obtain interrupt processing information during the process in which the interrupt processing service responds to the target interrupt request to perform the target interrupt processing, wherein the target interrupt request is a request pre-transmitted to the interrupt processing service; the first determination module 54 (corresponding to Figure 3 an interrupt source identification module in the interrupt processing service), for determining a target interrupt source when it is determined from the interrupt processing information that the target interrupt processing executed by the interrupt processing service is abnormal, wherein the target interrupt source is an event or signal issued by the emulated solid state drive that can trigger the interrupt request; a first operation module 56 (corresponding to Figure 3 An interrupt disabling module in the target interrupt source is used to perform a disabling operation on the target interrupt source to instruct the interrupt processing service to stop the target interrupt processing.

[0095] In an exemplary embodiment, the first acquisition module 52 includes at least one of the following: a first acquisition unit, used to acquire the interrupt processing function that executes the target interrupt processing in the interrupt processing service during the process of the interrupt processing service executing the target interrupt processing, so as to obtain the interrupt processing information from the interrupt processing function, wherein the interrupt processing information includes function information of the interrupt processing function; a second acquisition unit, used to acquire the processing behavior information at the monitoring breakpoint set in the target interrupt processing, to obtain the interrupt processing information; a third acquisition unit, used to acquire the number of times the interrupt request is triggered to execute through a counter set in the interrupt processing service, to obtain the interrupt processing information; a fourth acquisition unit, used to acquire system resources of the computer system and extract the interrupt processing information from the system resources, wherein the system resources include at least one of the following: processor resources, memory resources, interrupt resources, and disk storage resources; a fifth acquisition unit, used to acquire log information generated during the execution of the target interrupt processing by the interrupt processing service, and extract the interrupt processing information from the log information; a first extraction unit, used to extract the interrupt processing information from the trigger information generated by the trigger set in the interrupt processing service; a sixth acquisition unit, used to detect the connection information of the simulated solid-state hard disk to obtain the interrupt processing information from the connection information.

[0096] In an exemplary embodiment, the above-mentioned first determination module 54 includes: a second extraction unit, which is used to extract target interrupt information from the target interrupt request when it is determined from the interrupt processing information that the target interrupt processing executed by the interrupt processing service is abnormal, wherein the target interrupt information includes at least one of the following: interrupt vector, interrupt type, interrupt level, device identification, interrupt data pointer, interrupt mask, interrupt priority; a first search unit, which is used to search for the target interrupt source from the interrupt vector table according to the target interrupt information, wherein the interrupt vector table is a vector table pre-stored in the computer system, and the interrupt vector table includes interrupt information of multiple interrupt requests.

[0097] In an exemplary embodiment, the above-mentioned first operation module 56 includes at least one of the following: a seventh acquisition unit, used to obtain the target hard disk information of the simulated solid-state hard disk, and disable the target interrupt source according to the interrupt disabling method corresponding to the target hard disk information; a first adjustment unit, used to adjust the interrupt parameter value of the interrupt mask register in the computer system to disable the target interrupt source; a first processing unit, used to disable the target interrupt source by setting a target disabling function or disabling instruction to disable the target interrupt source.

[0098] In an exemplary embodiment, the above-mentioned device also includes: a first storage module (corresponding to the shielding protection module mentioned above), which is used to perform a disabling operation on the target interrupt source to instruct the interrupt processing service to stop the target interrupt processing, store the target interrupt source in a disabling list, and update the first state change information of other components to the second state change information, wherein the other components are components associated with the simulated solid-state hard disk, the first state change information is information corresponding to the target interrupt processing of the target interrupt source, and the second state change information is information corresponding to other interrupt processing of other interrupt sources; a first recovery module, which is used to restore the target interrupt source and update the second state change information of the other components to the first state change information when it is determined that the interrupt processing service has completed the interrupt processing mechanism for the simulated solid-state hard disk, so as to restore the target interrupt processing performed on the target interrupt source.

[0099] In an exemplary embodiment, the above-mentioned device also includes: a first recording module, which is used to restore the target interrupt source and update the second state change information of the other components to the first state change information after determining that the interrupt processing service completes the interrupt processing mechanism of the simulated solid-state hard disk, and then record the operation process of performing the disabling operation on the target interrupt source to obtain first process information; a second recording module, which is used to record the processing process of restoring the target interrupt processing on the target interrupt source to obtain second process information; a first generation module, which is used to generate an interrupt test report of the interrupt processing service using the first process information and the second process information; and a first evaluation module, which is used to evaluate the interrupt simulation performance of the interrupt processing service based on the interrupt test report.

[0100] In an exemplary embodiment, the above-mentioned device also includes: a second determination module, which is used to determine the target interrupt processing function after obtaining interrupt processing information during the process of the interrupt processing service responding to the target interrupt request to execute the target interrupt processing, and determining from the interrupt processing information that the target interrupt processing executed by the interrupt processing service is normal; a first execution module, which is used to continue to execute the target interrupt processing using the target interrupt processing function.

[0101] It should be noted that the above modules can be implemented by software or hardware. For the latter, it can be implemented in the following ways, but not limited to: the above modules are all located in the same processor; or the above modules are located in different processors in any combination.

[0102] An embodiment of the present application further provides a computer-readable storage medium, in which a computer program is stored, wherein the computer program is configured to execute the steps of any of the above method embodiments when running.

[0103] In an exemplary embodiment, the computer-readable storage medium may include, but is not limited to, various media that can store computer programs, such as a USB flash drive, a read-only memory (ROM), a random access memory (RAM), a mobile hard disk, a magnetic disk or an optical disk.

[0104] An embodiment of the present application further provides an electronic device, including a memory and a processor, wherein a computer program is stored in the memory, and the processor is configured to run the computer program to execute the steps in any one of the above method embodiments.

[0105] In an exemplary embodiment, the electronic device may further include a transmission device and an input / output device, wherein the transmission device is connected to the processor, and the input / output device is connected to the processor.

[0106] An embodiment of the present application further provides a computer program product, which includes a computer program. When the computer program is executed by a processor, the steps in any one of the above method embodiments are implemented.

[0107] An embodiment of the present application further provides another computer program product, including a non-volatile computer-readable storage medium, wherein the non-volatile computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps in any of the above method embodiments are implemented.

[0108] The embodiments of the present application also provide a computer program, which includes computer instructions, which are stored in a computer-readable storage medium; a processor of a computer device reads the computer instructions from the computer-readable storage medium, and the processor executes the computer instructions, so that the computer device performs the steps of any one of the above method embodiments.

[0109] For specific examples in this embodiment, reference may be made to the examples described in the above embodiments and exemplary implementation modes, and this embodiment will not be described in detail herein.

[0110] Obviously, those skilled in the art should understand that the above modules or steps of the present application can be implemented by a general computing device, they can be concentrated on a single computing device, or distributed on a network composed of multiple computing devices, they can be implemented by a program code executable by a computing device, so that they can be stored in a storage device and executed by the computing device, and in some cases, the steps shown or described can be executed in a different order from that herein, or they can be made into individual integrated circuit modules, or multiple modules or steps therein can be made into a single integrated circuit module for implementation. Thus, the present application is not limited to any specific combination of hardware and software.

[0111] The above description is only the preferred embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various modifications and variations. Any modification, equivalent replacement, improvement, etc. made within the principles of the present application shall be included in the protection scope of the present application.

Claims

1. A method for processing an interrupt source, It is characterized in that Applied to an interruption test device, the interruption test device is deployed in a simulation platform and connected to an interruption processing service in the simulation platform, the interruption processing service is used to simulate the interruption processing mechanism of the solid-state drive under abnormal conditions, the simulation platform is used to simulate the operation of a computer system, and the method includes: Acquiring interrupt processing information during the process in which the interrupt processing service performs target interrupt processing in response to a target interrupt request, wherein the target interrupt request is a request pre-transmitted to the interrupt processing service; In the case where it is determined from the interrupt processing information that the target interrupt processing executed by the interrupt processing service is abnormal, determining a target interrupt source, wherein the target interrupt source is an event or signal sent by the emulated solid state drive that can trigger the interrupt request; A disabling operation is performed on the target interrupt source to instruct the interrupt processing service to stop the target interrupt processing.

2. The method according to claim 1, It is characterized in that In the process of the interrupt processing service responding to the interrupt request and executing the target interrupt processing, obtaining the interrupt processing information includes at least one of the following: In the process of the interrupt processing service executing the target interrupt processing, obtaining the interrupt processing function executing the target interrupt processing in the interrupt processing service, so as to obtain the interrupt processing information from the interrupt processing function, wherein the interrupt processing information includes function information of the interrupt processing function; Acquire processing behavior information at a monitoring breakpoint set in the target interrupt processing to obtain the interrupt processing information; The interrupt processing information is obtained by obtaining the number of times the interrupt request is triggered and executed by setting a counter in the interrupt processing service; Acquire system resources of the computer system, and extract the interrupt processing information from the system resources, wherein the system resources include at least one of the following: processor resources, memory resources, interrupt resources, and disk storage resources; Obtaining log information generated during the execution of the target interrupt processing by the interrupt processing service, and extracting the interrupt processing information from the log information; Extracting the interrupt processing information from the trigger information generated by the trigger set in the interrupt processing service; The connection information of the simulated solid state drive is detected to obtain the interrupt processing information from the connection information.

3. The method according to claim 1, It is characterized in that In the case where it is determined from the interrupt processing information that the target interrupt processing executed by the interrupt processing service is abnormal, determining a target interrupt source includes: In the case where it is determined from the interrupt processing information that the target interrupt processing executed by the interrupt processing service is abnormal, extracting target interrupt information from the target interrupt request, wherein the target interrupt information includes at least one of the following: interrupt vector, interrupt type, interrupt level, device identification, interrupt data pointer, interrupt mask, interrupt priority; The target interrupt source is searched from an interrupt vector table according to the target interrupt information, wherein the interrupt vector table is a vector table pre-stored in the computer system, and the interrupt vector table includes interrupt information of multiple interrupt requests.

4. The method according to claim 1, It is characterized in that Performing a disabling operation on the target interrupt source to instruct the interrupt processing service to stop the target interrupt processing includes at least one of the following: Obtaining target hard disk information of the simulated solid state hard disk, and disabling the target interrupt source according to an interrupt disabling mode corresponding to the target hard disk information; Adjusting an interrupt parameter value of an interrupt mask register in the computer system to disable the target interrupt source; The target interrupt source is disabled by setting a target disabling function or a disabling instruction to disable the target interrupt source.

5. The method according to claim 1, It is characterized in that After performing a disabling operation on the target interrupt source to instruct the interrupt processing service to stop the target interrupt processing, the method further includes: The target interrupt source is stored in a disabled list, and the first state change information of other components is updated to the second state change information, wherein the other components are components associated with the emulated solid-state hard disk, the first state change information is information corresponding to the target interrupt processing of the target interrupt source, and the second state change information is information corresponding to other interrupt processing of other interrupt sources; When it is determined that the interrupt processing service completes the interrupt processing mechanism for the simulated solid state drive, the target interrupt source is restored and the second state change information of the other components is updated to the first state change information to restore the target interrupt processing performed on the target interrupt source.

6. The method according to claim 5, It is characterized in that In the case of determining that the interrupt processing service completes the interrupt processing mechanism for the simulated solid state drive, after restoring the target interrupt source and updating the second state change information of the other components to the first state change information, the method further includes: Recording an operation process of performing the disabling operation on the target interrupt source to obtain first process information; Record and resume the process of executing the target interrupt processing on the target interrupt source to obtain second process information; generating an interruption test report of the interruption handling service by using the first process information and the second process information; The interruption simulation performance of the interruption handling service is evaluated based on the interruption test report.

7. The method according to claim 1, It is characterized in that In the process of the interrupt processing service responding to the target interrupt request and executing the target interrupt processing, after obtaining the interrupt processing information, the method further includes: In the case where it is determined from the interrupt processing information that the target interrupt processing executed by the interrupt processing service is normal, determining a target interrupt processing function; The target interrupt processing is continued using the target interrupt processing function.

8. A device for processing an interrupt source, It is characterized in that Applied to an interruption test device, the interruption test device is deployed in a simulation platform and connected to an interruption processing service in the simulation platform, the interruption processing service is used to simulate the interruption processing mechanism of the solid-state drive under abnormal conditions, the simulation platform is used to simulate the operation of a computer system, and the device includes: A first acquisition module, configured to acquire interrupt processing information during a process in which the interrupt processing service performs a target interrupt processing in response to a target interrupt request, wherein the target interrupt request is a request pre-transmitted to the interrupt processing service; A first determination module is used to determine a target interrupt source when it is determined from the interrupt processing information that the target interrupt processing executed by the interrupt processing service is abnormal, wherein the target interrupt source is an event or signal sent by the simulated solid-state drive that can trigger the interrupt request; The first operation module is used to perform a disabling operation on the target interrupt source to instruct the interrupt processing service to stop the target interrupt processing.

9. A computer-readable storage medium, It is characterized in that The computer-readable storage medium stores a computer program, wherein the computer program implements the steps of the method described in any one of claims 1 to 7 when executed by a processor.

10. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, It is characterized in that When the processor executes the computer program, the steps of the method described in any one of claims 1 to 7 are implemented.

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