Data processing method and device and computer readable storage medium
By constructing a feature portrait of the target data and actively screening data interactions, the performance degradation caused by frequent interaction between CPU and ASIC is solved, and the reasonable allocation of resources and performance improvement is achieved.
Patent Information
- Application Number
- CN202411170921.2
- Authority / Receiving Office
- CN · China
- Patent Type
- Applications(China)
- Current Assignee / Owner
- Filing Date
- 2024-08-23
- Publication Date
- 2024-12-17
- Estimated Expiration
- 2044-08-23
AI Technical Summary
In high-performance network firewalls, frequent interactions between CPU and ASIC lead to degradation of system performance, especially in application scenarios with frequent interactions and short life cycles, the overall cost-effectiveness of the SOC system is affected.
By constructing a feature image of the target data, determine whether to send data from the processor to the integrated circuit based on the feature image, reduce unnecessary interaction between the processor and the integrated circuit, realize active traffic forwarding, and reasonably allocate system resources.
It reduces the waste of CPU computing resources, reduces the processing pressure of integrated circuits, fully releases its performance advantages and memory resources, and improves the overall performance and cost-effectiveness of the system.
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Figure CN119149477A_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the field of network communication technology, and in particular to a data processing method, device and computer-readable storage medium. Background Art
[0002] At present, the main architecture of high-performance network firewalls usually adopts the SOC (System On Chip, also known as system on chip) system architecture, which includes CPU and ASIC (Application-Specific Integrated Circuit).
[0003] Among them, the CPU is generally a multi-core processor, and the ASIC is an integrated circuit customized for a specific application or function. Compared with the CPU, it has the advantages of higher performance, lower power consumption, and smaller size. Usually, a session is created by the CPU in the first path (a slow full path based on data flow data processing) message processing step by step, and the session is also installed in the ASIC at the end of the first path. Subsequent messages of the same data flow will match the session on the ASIC when the session is matched, so that the ASIC will perform fast processing and forwarding.
[0004] However, it should be noted that all of the above logical functions are implemented by the CPU through the transmission and synchronization of messages between the system bus and ASIC. In the case of multiple interactions and high traffic, a large number of frequent interactions between the CPU and ASIC, such as session installation, aging, deletion, re-creation, re-installation, re-aging, and re-deletion, will consume CPU computing resources and cause delays at each step, thereby causing a decrease in system performance. Especially in application scenarios with frequent interactions and short life cycles, the fluctuation of system performance is particularly obvious. In addition, one of the purposes of using the SOC system architecture is to utilize the high performance, solidified and predictable data processing and forwarding capabilities of ASIC. However, since the memory of ASIC is also limited, if the performance and system resource advantages of ASIC cannot be fully utilized, the overall cost performance of the SOC system will inevitably be affected.
[0005] To address the above-mentioned problems, no effective solution has been proposed yet. Summary of the invention
[0006] Embodiments of the present application provide a data processing method, device, and computer-readable storage medium.
[0007] In some embodiments, a data processing method is provided, including: obtaining target data to be sent by a processor to an integrated circuit; constructing a feature portrait related to the target data; and determining whether to send the target data from the processor to the integrated circuit based on the feature portrait.
[0008] In some embodiments, in the data processing method provided in the present application, obtaining target data to be sent by the processor to the integrated circuit includes: determining session data created by the processor as the target data to be sent to the integrated circuit.
[0009] In some embodiments, in the data processing method provided in the present application, the feature profile includes at least one of the following features: N data features, where N is an integer greater than or equal to 1, and the data features are used to characterize message feature information related to the target data; M processor features, where M is an integer greater than or equal to 1, and the processor features are used to characterize the performance feature information of the processor; K integrated circuit features, where K is an integer greater than or equal to 1, and the integrated circuit features are used to characterize the performance feature information of the integrated circuit.
[0010] In some embodiments, in the data processing method provided in the present application, determining whether to send the target data from the processor to the integrated circuit is performed based on the feature portrait, including: obtaining a preset threshold set for each feature in the feature portrait; and determining whether to send the target data from the processor to the integrated circuit based on a size relationship between the feature value of each feature and the preset threshold corresponding to each feature.
[0011] In some embodiments, in the data processing method provided in the present application, determining whether to send the target data from the processor to the integrated circuit is performed based on the feature portrait, including: obtaining the weight set for each feature in the feature portrait; performing weighted calculation on the feature value of each feature according to the weight corresponding to each feature to obtain a target feature value; comparing the target feature value with a decision threshold; and determining whether to send the target data from the processor to the integrated circuit based on the relationship between the target feature value and the decision threshold.
[0012] In some embodiments, the data processing method provided by the present application also includes: obtaining data concurrency information of the processor and / or data concurrency information of the integrated circuit; adjusting the preset threshold and / or weight corresponding to each feature in the feature portrait according to the data concurrency information of the processor and / or the data concurrency information of the integrated circuit.
[0013] In some embodiments, in the data processing method provided in the present application, the preset thresholds and / or weights corresponding to one or more features in the feature portrait are adjusted according to the data concurrency information of the processor and / or the data concurrency information of the integrated circuit, including: adjusting the preset thresholds and / or weights corresponding to one or more features in the feature portrait according to the data concurrency information of the processor or the integrated circuit in the i-th calculation cycle, wherein i is an integer greater than or equal to 1, and wherein each calculation cycle represents a time period for deciding whether to send target data from the processor to the integrated circuit.
[0014] In some embodiments, in the data processing method provided by the present application, after adjusting the preset thresholds and / or weights corresponding to one or more features in the feature portrait according to the data concurrency information of the processor in the i-th computing cycle and / or the data concurrency information of the integrated circuit in the i-th computing cycle, it is determined whether to send the target data to be sent by the processor to the integrated circuit from the processor to the integrated circuit during the i+1-th computing cycle according to the adjusted preset thresholds and / or weights and the feature portrait related to the target data constructed in the i+1-th computing cycle.
[0015] In some embodiments, the data processing method also includes: for session data that the processor has not sent to the integrated circuit in the nth computing cycle, if a data packet of a data stream matching the session data is received in the n+mth computing cycle, based on a feature portrait related to the session data constructed in the n+mth computing cycle, determining whether to send the session data from the processor to the integrated circuit, wherein n and m are both integers greater than or equal to 1.
[0016] In some embodiments, in the data processing method provided in the present application, the N data features include at least statistical information of the number of messages and / or the message length information in the target data; and / or, the M processor features include at least the core utilization of the processor; and / or, the K integrated circuit features include at least the memory resource utilization of the integrated circuit.
[0017] In some embodiments, a data processing device is also provided, which includes: an acquisition unit for acquiring target data to be sent by the processor to the integrated circuit; a construction unit for constructing a feature portrait related to the target data; and a determination unit for determining whether to send the target data from the processor to the integrated circuit based on the feature portrait.
[0018] In some embodiments, a computer-readable storage medium is further provided, wherein a computer program is stored in the computer-readable storage medium, wherein when the computer program runs, the device where the computer-readable storage medium is located executes any one of the above-mentioned data processing methods.
[0019] In the present application, after acquiring the target data to be sent by the processor to the integrated circuit, a feature profile related to the target data is first constructed, and then based on the feature profile, it is determined whether to send the target data from the processor to the integrated circuit.
[0020] As can be seen from the above content, unlike the prior art in which all target data to be sent by the processor to the integrated circuit are directly sent to the integrated circuit, according to the technical solution of the present application, a feature profile related to the target data is first constructed, and then it is determined whether to send the target data to the integrated circuit based on the feature profile, so that for some target data that do not have to be processed by the integrated circuit, they will no longer be sent to the integrated circuit, which can not only reduce some unnecessary interactions between the processor and the integrated circuit, such as session synchronization, but also omit the subsequent related processing steps of these sessions (such as session deletion, aging, etc.), thereby solving the problem of system performance degradation caused by wasting CPU computing resources and causing delays due to frequent interactions between the processor and the integrated circuit. Moreover, by adopting the technical solution of the present application, since it is determined whether to send the target data from the processor to the integrated circuit based on the feature profile related to the target data, unnecessary interactions between the processor and the integrated circuit are reduced, so that the amount of target data sent to the integrated circuit will also be reduced, thereby reducing the processing pressure of the integrated circuit and fully releasing the performance advantages and memory resources of the integrated circuit.
[0021] It can be seen that through the technical solution of the present application, the passive mechanism in the prior art that unconditionally sends all target data from the processor to the integrated circuit is improved into an active traffic forwarding mechanism, by actively constructing a feature profile of the target data, and then actively screening out the target data that needs to be sent to the integrated circuit based on the feature profile, while the target data that is unnecessary to be sent to the integrated circuit will not be sent, thereby achieving the technical effect of reasonably allocating system resources of the processor and the integrated circuit, and further solving the technical problem that when the SOC system in the prior art processes session data, all session data will be sent from the processor to the integrated circuit for processing, resulting in insufficient utilization of system resources of the integrated circuit and low cost performance of the overall SOC system. BRIEF DESCRIPTION OF THE DRAWINGS
[0022] The drawings described herein are used to provide a further understanding of the present application and constitute a part of the present application. The illustrative embodiments of the present application and their descriptions are used to explain the present application and do not constitute an improper limitation on the present application. In the drawings:
[0023] Figure 1 is a flow chart of a data processing method according to an embodiment of the present application;
[0024] Figure 2 is a schematic diagram of a SOC system architecture according to an embodiment of the present application;
[0025] Figure 3 is a data interaction flow chart according to an embodiment of the present application;
[0026] Figure 4 is a data transmission flow chart based on a feature portrait of target data according to an embodiment of the present application;
[0027] Figure 5 is a schematic diagram of a feature portrait generation process according to an embodiment of the present application;
[0028] Figure 6 is a flow chart of a self-updating process of a feature weight and a preset threshold according to an embodiment of the present application;
[0029] Figure 7 is a schematic diagram of a data processing device according to an embodiment of the present application. DETAILED DESCRIPTION
[0030] In order to enable those skilled in the art to better understand the solution of the present application, the technical solution in the embodiments of the present application will be clearly and completely described below in conjunction with the drawings in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work should fall within the scope of protection of the present application.
[0031] It should be noted that the terms "first", "second", etc. in the specification and claims of the present application and the above-mentioned drawings are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable where appropriate, so that the embodiments of the present application described herein can be implemented in an order other than those illustrated or described herein. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, a process, method, system, product or device comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or devices.
[0032] It should also be noted that the information (including but not limited to user device information, user personal information, etc.) and data (including but not limited to data used for analysis, stored data, displayed data, etc.) collected by this application are information and data authorized by the user or fully authorized by all parties, and the collection, storage, use, processing, transmission, provision, disclosure and application of relevant data are in compliance with the relevant laws, regulations and standards of the relevant regions, necessary confidentiality measures are taken, and public order and good customs are not violated, and corresponding operation portals are provided for users to choose to authorize or refuse. For example, an interface is set up between this system and relevant users or organizations. Before obtaining relevant information, it is necessary to send an acquisition request to the aforementioned user or organization through the interface, and obtain relevant information after receiving the consent information fed back by the aforementioned user or organization.
[0033] According to an embodiment of the present application, an embodiment of a data processing method is provided. It should be noted that the steps shown in the flowchart of the accompanying drawings can be executed in a computer system such as a set of computer executable instructions, and although a logical order is shown in the flowchart, in some cases, the steps shown or described can be executed in an order different from that shown here.
[0034] Figure 1 is a flow chart of a data processing method according to an embodiment of the present application, such as Figure 1 As shown, the method comprises the following steps:
[0035] Step S101, obtaining target data to be sent by the processor to the integrated circuit.
[0036] In some embodiments, the data processing method can be applied to a network device, which includes at least a SOC system or other system having a processor and an integrated circuit (such as an ASIC) chip. The processor is used to implement functions such as session establishment and message processing, and the integrated circuit is used to look up and forward messages. The processor and the integrated circuit chip are connected via a system bus to transmit data.
[0037] Exemplarily, the above network device can be a network security device such as a firewall device, or a device such as a router or a switch with network security functions. The network device can also include a memory, which is used to store the forwarding table and session table generated by the processor, and the integrated circuit chip contains its own storage space for storing the forwarding table and session table sent by the processor.
[0038] Exemplarily, the system bus may include a control bus and a data bus, the control bus is used to send session data, and the data bus is used to transmit data such as messages.
[0039] For example, in step S101, the processor may be a central processing unit (CPU) or other processors, the CPU may be, for example, a multi-core CPU, and the integrated circuit may be an ASIC or other logic chip.
[0040] For example, Figure 2 is a schematic diagram of a SOC system architecture according to an embodiment of the present application, such as Figure 2 As shown, the SOC system mainly includes a multi-core CPU and an ASIC, wherein the main functions of the multi-core CPU include but are not limited to: data processing of the entire SOC system management plane (such as data configuration, data statistics, data presentation, etc.), creation of session data, complex logic analysis, support for complex applications, etc. The main functions of the ASIC include but are not limited to: fast policy matching, basic service support, data message forwarding processing, etc.
[0041] In some embodiments, the SOC system may also include various types of interfaces, a backplane switch, a system bus, and a storage module.
[0042] In the field of network security, the SOC system that combines CPU and ASIC can be used to design and manufacture network security equipment (such as firewall equipment). At the same time, the SOC system also supports different deployment scenarios and application scenarios.
[0043] For example, Figure 3 This is a data interaction flow chart according to an embodiment of the present application. In order to more clearly illustrate the technical solution of the present application, the following is combined with Figure 3 The data interaction process between CPU and ASIC is briefly described.
[0044] In some embodiments, the target data to be sent by the processor to the integrated circuit may be session data to be sent by the processor to the integrated circuit, or may be a message data stream related to the session data, or may be other data that can be exchanged between the processor and the integrated circuit.
[0045] Exemplarily, a data flow refers to a stream of associated data packets with the same service characteristics and matching the same predefined conditions, such as SIP (Session Initiation Protocol, a signaling protocol used to establish, modify and terminate multimedia sessions), SPORT (Source Port, source port number, refers to the port number used by the sender of the data packet in network communication), DIP (Destination IP, destination IP address, refers to the IP address of the receiver of the data packet in network communication), DPORT (Destination Port, destination port number, refers to the port number used by the receiver of the data packet in network communication), PROTO (Protocol, refers to a set of standards for specifying data transmission and processing rules in network communication) and other service characteristics data structures, which are represented by a data structure called session.
[0046] For example, Figure 3 As shown, for a SOC system with a CPU and an ASIC, after receiving a data packet, the I / O (Input / Output) module or the ASIC starts to query for a session that can be matched. If no session that can be matched is found, the data packet will be sent to the CPU. The CPU gradually creates a new session in the process of running the first path (a slow full path in data processing based on data flow) message processing flow, and at the end of the first path, the newly created session in the CPU is synchronously installed in the ASIC through system communication. Subsequently, the ASIC forwards subsequent data packets that successfully match the session.
[0047] It should be noted that if Figure 3 As shown in the figure, when the interaction between the client and server corresponding to an application ends, or when the session itself ages, the session will be deleted from both the CPU and ASIC. Subsequent messages received will repeat the above process of session creation, installation, and deletion because they cannot match the session. Session aging refers to the existence of a session that has exceeded the preset maximum survival time.
[0048] From the above content, we can see that although the SOC system including CPU and ASIC has the advantages of high performance and flexibility, due to the ever-changing deployment environment and applications in actual operation, a specific system may not always be able to achieve its optimal performance in the face of changing applications after deployment. In the entire data processing process, an important aspect that affects the overall system performance is the creation, installation, aging, and deletion of sessions. As mentioned earlier, a session is created step by step by the multi-core CPU in the first path message processing, and the session created by the CPU will also be installed in the ASIC at the end of the first path, so that the subsequent messages of the same data flow can match the session on the ASIC during the session matching process, so that the ASIC forwards the subsequent data packets that successfully match the session.
[0049] However, it should be noted that all of the above logical functions are implemented by the CPU through the transmission and synchronization of messages between the system bus and ASIC. In the case of multiple interactions and high traffic, there are a large number of frequent interactions between the CPU and ASIC, such as session installation, aging, deletion, re-creation, re-installation, re-aging, and re-deletion. Each step will consume CPU computing resources and cause delays, thereby causing a decrease in system performance. Especially in application scenarios with frequent interactions and short life cycles, the fluctuation of system performance is particularly obvious. In addition, one of the purposes of using the SOC system architecture is to utilize the high performance, solidified and predictable data processing and forwarding capabilities of ASIC. However, since the memory of ASIC is also limited, if the performance and system resource advantages of ASIC cannot be fully utilized, the overall cost performance of the SOC system will inevitably be affected.
[0050] In order to solve the above problem, the present application further proposes step S102 after step S101.
[0051] Step S102, constructing a feature portrait related to the target data.
[0052] Exemplarily, in step S102, after obtaining the target data to be sent by the processor to the integrated circuit, the present application will not immediately send the target data to the integrated circuit for processing, but will first construct a feature profile related to the target data, wherein the feature profile can be used to describe one or more features of the target data, such as message features of the target data, time features of the target data, size features of the target data, processor-related features when processing the target data, and / or integrated circuit-related features when processing the target data, etc.
[0053] Step S103, determining whether to send the target data from the processor to the integrated circuit according to the feature profile.
[0054] Exemplarily, whether to send the target data to the integrated circuit is determined according to the feature value of at least one feature in the feature profile. For example, whether to send the target data from the processor to the integrated circuit is determined according to the feature values of one or more features in the feature profile and the preset thresholds and / or weights corresponding to the one or more features in the feature profile.
[0055] For example, if the feature profile indicates that the feature value of the i-th feature of the target data is lower than a preset threshold corresponding to the i-th feature, the target data will not be sent from the processor to the integrated circuit, where i is an integer greater than or equal to 1.
[0056] It should be noted that the target data in the present application is not limited to session data and data streams using a session mechanism, but may also be other data. Those skilled in the art can understand that any data that can interact between a processor and an integrated circuit can be used as target data and is applicable to the technical solution of the present application.
[0057] Exemplarily, if it is determined based on a feature profile related to the target data that the target data is to be sent from the processor to the integrated circuit, the target data is subsequently processed by the integrated circuit. For example, if the target data is a session to be sent by the processor to the ASIC, then after the processor sends the session to the ASIC, the ASIC installs the session, and then the ASIC forwards subsequent data packets that are successfully matched to the session.
[0058] Exemplarily, if it is determined not to send the target data from the processor to the integrated circuit based on a feature profile related to the target data, the processor may use the target data to process a message or directly process the target data. For example, the target data is a session to be sent from the processor to the ASIC. Since the session is not sent from the processor to the ASIC, the processor may use the session to perform corresponding processing on subsequent data packet streams or messages related to the session.
[0059] In some embodiments, the method may further include: for session data that the processor has not sent to the integrated circuit in the nth computing cycle, if a data packet of a data stream matching the session data is received in the n+mth computing cycle, based on a feature portrait related to the session data constructed in the n+mth computing cycle, determining whether to send the session data from the processor to the integrated circuit, wherein n and m are both integers greater than or equal to 1.
[0060] In this way, it is possible to avoid repeatedly creating session data related to the same data stream in different computing cycles, thereby further saving CPU computing resources. At the same time, based on the feature portrait related to the session data constructed in the n+mth computing cycle, it is determined in the n+mth computing cycle whether to send the session data from the processor to the integrated circuit. In this way, the feature portrait related to the session data can reflect the latest system operation status, thereby further improving the system's high-performance data processing and forwarding effects.
[0061] Based on the contents of the above steps S101 to S103, it can be known that in the present application, after obtaining the target data to be sent by the processor to the integrated circuit, a feature portrait related to the target data is first constructed, and then based on the feature portrait, it is determined whether to send the target data from the processor to the integrated circuit.
[0062] As can be seen from the above content, unlike the prior art in which all target data to be sent by the processor to the integrated circuit are directly sent to the integrated circuit, according to the technical solution of the present application, a feature profile related to the target data is first constructed, and then it is determined whether to send the target data to the integrated circuit based on the feature profile, so that for some target data that do not have to be processed by the integrated circuit, they will no longer be sent to the integrated circuit, which can not only reduce some unnecessary interactions between the processor and the integrated circuit, such as session synchronization, but also omit the subsequent related processing steps of these sessions (such as session deletion, aging, etc.), thereby solving the problem of system performance degradation caused by wasting CPU computing resources and causing delays due to frequent interactions between the processor and the integrated circuit. Moreover, by adopting the technical solution of the present application, since it is determined whether to send the target data from the processor to the integrated circuit based on the feature profile related to the target data, unnecessary interactions between the processor and the integrated circuit are reduced, so that the amount of target data sent to the integrated circuit will also be reduced, thereby reducing the processing pressure of the integrated circuit and fully releasing the performance advantages and memory resources of the integrated circuit.
[0063] It can be seen that through the technical solution of the present application, the passive mechanism in the prior art that unconditionally sends all target data from the processor to the integrated circuit is improved into an active traffic forwarding mechanism, by actively constructing a feature profile of the target data, and then actively screening out the target data that needs to be sent to the integrated circuit based on the feature profile, while the target data that is unnecessary to be sent to the integrated circuit will not be sent, thereby achieving the technical effect of reasonably allocating system resources of the processor and the integrated circuit.
[0064] In some embodiments, in the process of acquiring target data to be sent by the processor to the integrated circuit, session data created by the processor may be determined as the target data to be sent to the integrated circuit.
[0065] Exemplarily, the target data is, for example, session data to be sent by the CPU to the ASIC. The session may be a new session directly created by the CPU based on the first packet of the received first data stream (i.e., the session is created by running the first path (a slow full path in data processing based on the data stream)). Alternatively, upon receiving the first packet of the data stream, the CPU first searches the memory for a second session associated with the first session to be created, and then creates a first session based on the found second session. The first session is used to process or forward data packets of the first data stream.
[0066] In some embodiments, session data to be sent by the processor to the integrated circuit is session data of a first session, and the process of the processor creating the first session may include: the processor receives a first data packet; if a preset condition is met, determines whether there is a second session, wherein the second session refers to a session that matches a target data stream, and the target data stream has the same target data feature as the data stream to which the first data packet belongs; if a second session exists, creates a first session based on the second session, wherein the first session matches the data stream to which the first data packet belongs.
[0067] Here, the preset condition may include one of the following: the received first data packet is the first packet of the data stream; and it is determined that there is no first session matching the data stream to which the first data packet belongs.
[0068] In this embodiment, when a preset condition is met, it is determined whether the second session exists, so that when there is no session corresponding to the first data packet, a session corresponding to a data flow that is associated with the data flow to which the first data packet belongs is searched. Since when there are partially identical data features between two data flows, that is, when there is a certain association, there will also be partially identical information between the sessions corresponding to the two data flows. Therefore, when the second session exists in the session table, the first session is generated according to the second session, so that the first session is generated based on the existing associated session. Compared with the prior art in which the first session is created according to a slow full path in data flow data processing, the computing resources of the processor can be greatly saved, and the system processing performance is further improved.
[0069] In some embodiments, when the processor determines that the second session does not exist, a first session is created based on the first data packet. In this case, the processor runs the first path (a slow full path in flow-based data processing) to create the first session.
[0070] Here, the target data characteristics between the above-mentioned target data stream and the data stream to which the first data packet belongs may include at least one of the following: destination IP address, source IP address, destination port number, transport layer protocol, and the first session and the second session satisfy at least one of the following conditions: the first condition, having the same input interface or having the same security area; the second condition, having the same policy pointer.
[0071] In some embodiments, determining whether a second session exists includes: obtaining a target index value of a first data packet; determining whether a target record corresponding to the target index value exists in a session index table, and obtaining a determination result, wherein each record in the session index table includes an index value and a session pointer of the session; and determining whether the second session exists based on the determination result.
[0072] Exemplarily, obtaining the target index value of the first data packet may include: determining a policy pointer corresponding to the source port number based on the source port number in the first data packet, wherein the policy pointer is used to point to the security policy; determining interface information of the input interface used by the network device to receive the first data packet; and calculating a target index value based on the policy pointer, the interface information, and target data characteristics of the first data packet, wherein the target data characteristics include at least one of the following: destination IP address, source IP address, destination port number, and transport layer protocol.
[0073] In some embodiments, determining whether a second session exists includes: extracting a target data feature of the first data packet from the first data packet; determining a security policy and interface information corresponding to the first data packet; if there is a session that matches the target data feature, security policy, and interface information, determining the session that matches the target data feature, security policy, and interface information as the second session; if there is no session that matches the target data feature, security policy, and interface information, determining that the second session does not exist.
[0074] In some embodiments, generating the first session according to the second session may include: cloning the second session; and modifying the session obtained by the clone process according to multiple data features of the first data packet to obtain the first session. For example, modifying or updating the content of the session obtained by the clone process accordingly, such as NAT (Network Address Translation).
[0075] For example, Figure 4 is a data transmission flow chart based on a feature portrait of target data according to an embodiment of the present application, such as Figure 4As shown, for a SOC system including a CPU and an ASIC, after receiving a message, it starts to query the session and match the session. When the session is queried but the match is not completed, a new session is gradually created in the process of the CPU running the first path message processing flow, and when the first path ends, the newly created session in the CPU is attempted to be installed into the ASIC subsystem through system communication (corresponding to the above-mentioned acquisition of session data that the processor is going to create in the integrated circuit, at this time, the newly created session of the CPU has not been actually synchronously installed into the ASIC).
[0076] like Figure 4 As shown, according to the technical solution of the present application, the newly created session in the CPU can be used as the target data to be sent by the CPU to the integrated circuit. The feature profile of the target data is constructed by applying the learning module, and the ASIC session installation decision is determined according to the feature profile of the target data, wherein the ASIC session installation decision is used to decide whether to install the newly created session of the CPU in the ASIC. If the ASIC session installation decision indicates that the newly created session of the CPU is installed in the ASIC, after the session is installed in the ASIC, the ASIC forwards the subsequent data packets that are successfully matched to the session. Of course, the ASIC session installation decision may also indicate that the newly created session of the CPU is not installed in the ASIC.
[0077] Likewise, if Figure 4 As shown in the figure, when the interaction between the client and server corresponding to an application ends, or when the session itself ages, the session will be deleted from both the CPU and the ASIC. Subsequent messages received will repeat the above steps of session creation and deciding whether to install on the ASIC because they cannot match the session.
[0078] From the above content, it can be seen that this application improves the passive mechanism in the prior art that unconditionally sends all sessions from the processor to the integrated circuit into an active traffic sending mechanism by designing a mechanism for ASIC session installation decision-making. By actively constructing a feature profile of the session, and then actively selecting which target data needs to be sent to the integrated circuit and which sessions do not need to be sent to the integrated circuit based on the feature profile, the technical effect of reasonably allocating system resources of the processor and the integrated circuit is achieved.
[0079] In one embodiment, the feature profile includes at least one of the following features:
[0080] N data features, where N is an integer greater than or equal to 1, and the data features are used to characterize the message feature information related to the target data; M processor features, where M is an integer greater than or equal to 1, and the processor features are used to characterize the performance feature information of the processor; K integrated circuit features, where K is an integer greater than or equal to 1, and the integrated circuit features are used to characterize the performance feature information of the integrated circuit.
[0081] For example, Figure 5 is a schematic diagram of a feature portrait generation process according to an embodiment of the present application, such as Figure 5 As shown, feature profiles can be generated through the feature engineering module, which can achieve the following functions:
[0082] The function of initialization logic is used to pre-configure relevant parameters, for example, at least one of feature parameters, weights corresponding to features, preset thresholds corresponding to features, application-aware definition rules, and execution actions.
[0083] The flow collection function is used to collect flow according to pre-configured flow collection conditions, for example, according to pre-configured flow collection time, flow collection application object, and flow collection frequency.
[0084] The application identification function is used to clean the collected traffic and identify the application, for example, to delete the abnormal values in the traffic (such as the packet flow related to the session) and determine the source application and destination application of the traffic. This step can also be omitted in actual applications.
[0085] The feature engineering function is used to perform feature engineering mining on the traffic that has completed data cleaning and application identification. The feature engineering mining first extracts relevant features of the target data from the traffic that has completed data cleaning and application identification, such as determining whether the target data is complete session data, detecting the number of messages in the target data, detecting the data packet length of the target data, etc. In addition, feature engineering mining can also extract feature data related to the operating status of other systems, such as the core utilization of the CPU and the memory resource utilization of the ASIC.
[0086] In addition, the application learning module can construct a feature profile of the target data based on the features extracted in the feature engineering module, and then determine whether to send the target data based on the feature profile.
[0087] It should be noted that the feature profile is not static. The update cycle of the feature profile can be set in the SOC system, and the feature profile can be updated in a timely manner according to the update cycle. The update cycle can be customized or dynamically set according to the actual operating status of the CPU and / or ASIC. For example, if the actual operating status of the ASIC indicates that the load of the ASIC at the current moment is greater than a preset value, the update of the feature profile can be started immediately.
[0088] From the above content, it can be seen that through the above feature portrait generation method, not only the data features of the data stream related to the target data can be collected, but also the processor features and integrated circuit features can be collected, thereby obtaining a multi-dimensional and information-rich feature portrait, and then a sufficiently accurate ASIC session installation decision can be determined based on the feature portrait.
[0089] In one embodiment, a method for determining whether to send target data from a processor to an integrated circuit for processing based on a feature portrait is: obtaining a preset threshold set for each feature in the feature portrait; and determining whether to send the target data from the processor to the integrated circuit based on a size relationship between a feature value of each feature and the preset threshold corresponding to each feature.
[0090] Exemplarily, assuming that the feature portrait includes multiple features, a corresponding preset threshold is set for each feature. For different features, the way of judging whether the actual feature value of the feature meets the preset condition according to the preset threshold may also be different. For example, for feature 1, when the actual feature value of feature 1 is greater than the preset threshold corresponding to feature 1, it is determined that the actual feature value of feature 1 meets the preset condition; for feature 2, when the actual feature value of feature 2 is less than the preset threshold corresponding to feature 2, it is determined that the actual feature value of feature 2 meets the preset condition; for feature 3, only when the actual feature value of feature 3 is equal to the preset threshold corresponding to feature 3, can it be determined that the actual feature value of feature 3 meets the preset condition.
[0091] Exemplarily, according to the scheme of the present application, it can be set according to actual conditions that the target data is allowed to be sent from the processor to the integrated circuit only when the actual feature value of each feature meets the preset conditions, or it can be set that the target data is allowed to be sent from the processor to the integrated circuit only when the actual feature values of a preset number of features meet the preset conditions.
[0092] In summary, the present application supports determining whether to send target data from the processor to the integrated circuit based on the relationship between the feature value of each feature and the preset threshold value corresponding to each feature. The specific setting strategy can be set according to the actual situation, and the present application does not specifically limit this.
[0093] From the above content, it can be seen that determining whether to send the target data from the processor to the integrated circuit is based on the relationship between the characteristic value of each feature and the preset threshold value corresponding to each feature. In fact, the influencing factor of the ASIC session installation decision is implemented on the characteristic value of each feature, thereby achieving the purpose of making refined decisions based on each feature and improving the accuracy of the ASIC session installation decision.
[0094] In one embodiment, another method can be used to determine whether to send the target data from the processor to the integrated circuit based on the feature portrait, including: obtaining the weight set for each feature in the feature portrait; performing weighted calculation on the feature value of each feature according to the weight corresponding to each feature to obtain the target feature value; comparing the size relationship between the target feature value and the decision threshold; and determining whether to send the target data from the processor to the integrated circuit based on the size relationship between the target feature value and the decision threshold.
[0095] Exemplarily, the present application may also set a corresponding weight for each feature in the feature portrait, and then perform weighted calculation on the feature value of each feature according to the weight corresponding to each feature, compare the calculation result with the decision threshold, and determine whether to send the target data from the processor to the integrated circuit based on the size relationship obtained by the comparison.
[0096] It should be noted that, through the above method, a larger weight can be set for important features and a smaller weight can be set for secondary features, thereby highlighting the influence of important features in the final ASIC session installation decision and weakening the influence of secondary features to a certain extent.
[0097] In some embodiments, in the process of determining whether to send the target data from the processor to the integrated circuit based on the feature portrait, the data concurrency information of the processor and / or the data concurrency information of the integrated circuit can also be obtained, and then the preset threshold and / or weight corresponding to each feature in the feature portrait can be adjusted according to the data concurrency information of the processor and / or the data concurrency information of the integrated circuit.
[0098] Exemplarily, the data concurrency information includes but is not limited to at least one of the following: data concurrency volume, data concurrency success rate, data concurrency delay and other information.
[0099] In addition, data concurrency refers to the ability to process data simultaneously, that is, the amount of data that the system can process in the same time period. The data concurrency success rate refers to the ratio of the amount of data successfully processed by the system to the total amount of data processed when processing data. Data concurrency delay refers to the time it takes for the system to process data from receiving data to completing processing. Generally speaking, the larger the data concurrency, the higher the data concurrency success rate, and the shorter the data concurrency delay, the stronger the system's processing capability.
[0100] For example, if it is detected that the data concurrency of the processor exceeds a set threshold, the preset threshold and / or weight corresponding to each feature in the feature portrait can be adjusted (for example, the preset threshold and / or weight of one or more features is lowered or increased so that more target data can be sent from the processor to the integrated circuit). Alternatively, assuming that it is detected that the data concurrency success rate of the processor is lower than the set success rate threshold, the preset threshold and / or weight corresponding to each feature in the feature portrait can also be adjusted (for example, the preset threshold and / or weight of one or more features is lowered or increased so that more target data can be sent from the processor to the integrated circuit).
[0101] Similar processing logic can also be used for integrated circuits to adjust the preset threshold and / or weight corresponding to each feature in the feature portrait according to the data concurrency information of the integrated circuit. For example, if it is detected that the data concurrency of the integrated circuit exceeds the set threshold, the preset threshold and / or weight corresponding to each feature in the feature portrait can be adjusted (for example, lowering or raising the preset threshold and / or weight of one or more features so that more target data can be sent from the processor to the integrated circuit). Alternatively, if it is detected that the data concurrency success rate of the integrated circuit is lower than the set success rate threshold, the preset threshold and / or weight corresponding to each feature in the feature portrait can also be adjusted (for example, lowering or raising the preset threshold and / or weight of one or more features so that more target data can be sent from the processor to the integrated circuit). It should be noted that in addition to adjusting the preset threshold and / or weight corresponding to each feature in the feature portrait according to the above-mentioned data concurrency information, the preset threshold and / or weight corresponding to each feature in the feature portrait can also be adjusted according to other performance information of the processor or integrated circuit (for example, response timeliness, data processing speed, memory occupancy, etc.).
[0102] It should also be noted that in the process of adjusting the preset threshold and / or weight corresponding to each feature in the feature portrait, the data concurrency information of the processor and the data concurrency information of the integrated circuit can be comprehensively considered. For example, by comparing the data concurrency information of the processor and the data concurrency information of the integrated circuit in the previous computing cycle, and then using the comparison result to lower or increase the preset threshold and / or weight of one or more features, so that more target data can be sent from the processor to the integrated circuit in the next computing cycle, or less target data can be sent from the processor to the integrated circuit.
[0103] In one embodiment, the preset threshold and / or weight corresponding to each feature in the feature portrait is adjusted according to the data concurrency information, including: according to the data concurrency information of the processor or the integrated circuit in the i-th calculation cycle, the preset threshold and / or weight corresponding to each feature in the feature portrait is adjusted, where i is an integer greater than or equal to 1.
[0104] Each calculation cycle represents a time period for deciding whether to send target data from the processor to the integrated circuit.
[0105] In one embodiment, after adjusting the preset thresholds and / or weights corresponding to one or more features in the feature portrait based on the data concurrency information of the processor in the i-th computing cycle and / or the data concurrency information of the integrated circuit in the i-th computing cycle, it can be determined whether to send target data to be sent from the processor to the integrated circuit during the i+1-th computing cycle based on the adjusted preset thresholds and / or weights and the feature portrait related to the target data constructed in the i+1-th computing cycle.
[0106] For example, Figure 6 is a flowchart of a self-updating process of a feature weight and a preset threshold according to an embodiment of the present application, such as Figure 6 As shown, within a computing cycle (e.g., the i-th computing cycle, where the computing cycle represents a time period for deciding whether to send the target data from the processor to the integrated circuit), a feature profile of the target data can be generated, and then an ASIC session installation decision can be determined based on the feature profile, and then a decision can be made based on the ASIC session installation decision whether to send the target data from the processor to the integrated circuit.
[0107] In addition, after deciding whether to send the target data from the processor to the integrated circuit based on the ASIC session installation decision, the data concurrency information of the processor or the integrated circuit (for example, the data concurrency amount, the data concurrency success rate, the data concurrency delay) can be obtained within a subsequent preset time period, and then the SOC system adjusts the preset threshold and / or weight corresponding to each feature in the feature portrait according to the data concurrency information, and enters a new calculation cycle after the adjustment is completed (that is, according to the adjusted preset threshold and / or weight and the feature portrait related to the target data constructed in the i+1th calculation cycle, determine whether to send the target data to be sent by the processor to the integrated circuit from the processor to the integrated circuit during the i+1th calculation cycle).
[0108] From the above content, it can be seen that by adjusting the preset threshold and / or weight corresponding to each feature in the feature portrait according to the data concurrency information, the ASIC session installation decision can be corrected in a timely manner, thereby adaptively adjusting the system resources that the processor and the integrated circuit need to allocate to each other when interacting with data.
[0109] In one embodiment, the N data features include at least statistical information of the number of messages and / or message length information in the target data; and / or, the M processor features include at least the core utilization of the processor; and / or, the K integrated circuit features include at least the memory resource utilization of the integrated circuit.
[0110] Exemplarily, Pn may be used to represent the number of packets in the target data; Ln may be used to represent the packet length information (including but not limited to the total packet length and / or the average packet length) in the target data; Ma may be used to represent the memory resource utilization of the ASIC; and Cu may be used to represent the core utilization of the CPU.
[0111] Exemplarily, the ASIC session installation decision determined according to the above four characteristics can be represented by the function F(t)=f(Pn, Ln, Ma, Cu).
[0112] It should be noted that the above function is only an example, and the specific calculation of the features can be selected and designed by those skilled in the art according to the actual scenario.
[0113] According to another aspect of the present application, a data processing device is also provided, wherein: Figure 7 is a schematic diagram of a data processing device according to an embodiment of the present application, such as Figure 7 As shown, the data processing device includes: an acquisition unit 701, a construction unit 702 and a determination unit 703.
[0114] Exemplarily, the acquisition unit 701 is used to acquire target data to be sent by the processor to the integrated circuit; the construction unit 702 is used to construct a feature portrait related to the target data; and the determination unit 703 is used to determine whether to send the target data from the processor to the integrated circuit based on the feature portrait.
[0115] In some embodiments, the acquiring unit 701 is configured to determine the session data created by the processor as the target data to be sent to the integrated circuit.
[0116] In some embodiments, the feature portrait includes at least one of the following features: N data features, where N is an integer greater than or equal to 1, and the data features are used to characterize message feature information related to the target data; M processor features, where M is an integer greater than or equal to 1, and the processor features are used to characterize performance feature information of the processor; K integrated circuit features, where K is an integer greater than or equal to 1, and the integrated circuit features are used to characterize performance feature information of the integrated circuit.
[0117] In some embodiments, the determination unit 703 includes: a first processing subunit and a second processing subunit. The first processing subunit is used to obtain a preset threshold set for each feature in the feature portrait; the second processing subunit is used to determine whether to send the target data from the processor to the integrated circuit according to the size relationship between the feature value of each feature and the preset threshold corresponding to each feature.
[0118] In some embodiments, the determination unit 703 includes: a third processing subunit, a first calculation subunit, a fourth processing subunit, and a fifth processing subunit. The third processing subunit is used to obtain the weight set for each feature in the feature portrait; the first calculation subunit is used to perform weighted calculation on the feature value of each feature according to the weight corresponding to each feature to obtain the target feature value; the fourth processing subunit is used to compare the size relationship between the target feature value and the decision threshold; the fifth processing subunit is used to determine whether to send the target data from the processor to the integrated circuit according to the size relationship between the target feature value and the decision threshold.
[0119] In some embodiments, the data processing device further includes: an adjustment unit, wherein the adjustment unit is used to obtain the data concurrency information of the processor and / or the data concurrency information of the integrated circuit; and the adjustment subunit is used to adjust the preset threshold and / or weight corresponding to each feature in the feature portrait according to the data concurrency information of the processor and / or the data concurrency information of the integrated circuit.
[0120] In some embodiments, an adjustment unit is used to adjust a preset threshold and / or weight corresponding to each feature in the feature portrait according to data concurrency information of the processor in the i-th computing cycle and / or data concurrency information of the integrated circuit in the i-th computing cycle, wherein i is an integer greater than or equal to 1, and wherein each computing cycle represents a time period for deciding whether to send target data from the processor to the integrated circuit.
[0121] In some embodiments, the determination unit 703 is used to determine whether to send the target data to be sent by the processor to the integrated circuit from the processor to the integrated circuit during the i+1th computing cycle based on the adjusted preset threshold and / or weight and the feature portrait related to the target data constructed in the i+1th computing cycle.
[0122] In some embodiments, the determination unit 703 is used to determine whether to send the session data from the processor to the integrated circuit based on a feature portrait related to the session data constructed in the n+mth computing cycle, for session data that the processor has not sent to the integrated circuit in the nth computing cycle, if a data packet of a data stream matching the session data is received in the n+mth computing cycle, wherein n and m are both integers greater than or equal to 1.
[0123] In some embodiments, the N data features include at least statistical information of the number of messages and / or message length information in the target data; and / or, the M processor features include at least the core utilization of the processor; and / or, the K integrated circuit features include at least the memory resource utilization of the integrated circuit.
[0124] In some embodiments, the session data to be sent by the processor to the integrated circuit is session data of the first session; the apparatus further includes: a creation unit, the creation unit including:
[0125] A receiving subunit, configured to receive a first data packet by a processor;
[0126] a determination subunit, configured to determine whether a second session exists when a preset condition is met, wherein the second session refers to a session matching a target data stream, and the target data stream has the same target data feature as the data stream to which the first data packet belongs;
[0127] The creating subunit is used to create a first session according to the second session when the second session exists, wherein the first session matches the data flow to which the first data packet belongs.
[0128] Regarding the data processing device in the above embodiment, the specific manner in which each module performs operations and the beneficial effects thereof have been described in detail in the aforementioned embodiment of the data processing method, and will not be elaborated on in detail here.
[0129] According to another aspect of the present application, a computer-readable storage medium is provided, wherein a computer program is stored in the computer-readable storage medium, wherein when the computer program is executed, the device where the computer-readable storage medium is located executes any one of the above-mentioned data processing methods.
[0130] According to another aspect of the present application, an electronic device is also provided, wherein the electronic device includes one or more processors; a storage device for storing one or more programs, when the one or more programs are executed by one or more processors, the one or more processors are implemented to run the programs, wherein the program is configured to execute any one of the above-mentioned data processing methods when running.
[0131] The above-mentioned embodiments or examples disclosed in the present application are not exhaustive, but are only illustrative of some embodiments or examples, and are not intended to be specific limitations on the scope of protection disclosed in the present application. In the absence of contradiction, each step in a certain embodiment or example in the present application can be implemented as an independent example, and the steps can be combined arbitrarily. For example, the scheme after removing some steps in a certain embodiment or example can also be implemented as an independent example, and the order of the steps in a certain embodiment or example can be arbitrarily exchanged. In addition, the optional methods or optional examples in a certain embodiment or example can be combined arbitrarily; in addition, the various embodiments or examples can be combined arbitrarily, for example, some or all steps of different embodiments or examples can be combined arbitrarily, and a certain embodiment or example can be combined arbitrarily with the optional methods or optional examples of other embodiments or examples.
[0132] The serial numbers of the above-mentioned embodiments of the present application are for description only and do not represent the advantages or disadvantages of the embodiments.
[0133] In the above embodiments of the present application, the description of each embodiment has its own emphasis. For parts that are not described in detail in a certain embodiment, please refer to the relevant description of other embodiments.
[0134] In the several embodiments provided in this application, it should be understood that the disclosed technical content can be implemented in other ways. Among them, the device embodiments described above are only schematic. For example, the division of the units can be a logical function division. There may be other division methods in actual implementation. For example, multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of units or modules, which can be electrical or other forms.
[0135] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple units. Some or all of the units may be selected according to actual needs to achieve the purpose of the present embodiment.
[0136] In addition, each functional unit in each embodiment of the present application may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit. The above-mentioned integrated unit may be implemented in the form of hardware or in the form of software functional units.
[0137] If the integrated unit is implemented in the form of a software functional unit and sold or used as an independent product, it can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present application, in essence, or the part that contributes to the prior art or all or part of the technical solution can be embodied in the form of a software product, and the computer software product is stored in a storage medium, including a number of instructions to enable a computer device (which can be a personal computer, a server or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present application. The aforementioned storage medium includes: U disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), mobile hard disk, disk or optical disk and other media that can store program codes.
[0138] The above is only a preferred implementation of the present application. It should be pointed out that for ordinary technicians in this technical field, several improvements and modifications can be made without departing from the principles of the present application. These improvements and modifications should also be regarded as the scope of protection of the present application.
Claims
1. A data processing method, characterized in that: include: Acquire target data to be sent by the processor to the integrated circuit; Constructing a feature profile related to the target data; Based on the feature profile, it is determined whether to send the target data from the processor to the integrated circuit.
2. The data processing method according to claim 1, characterized in that: Acquiring target data to be sent by the processor to the integrated circuit, comprising: The session data created by the processor is determined as the target data to be sent to the integrated circuit.
3. The data processing method according to claim 1 or 2, characterized in that: The feature profile includes at least one of the following features: N data features, where N is an integer greater than or equal to 1, and the data features are used to characterize message feature information related to the target data; M processor features, where M is an integer greater than or equal to 1, and the processor features are used to characterize performance feature information of the processor; K integrated circuit features, where K is an integer greater than or equal to 1, and the integrated circuit features are used to characterize performance characteristic information of the integrated circuit.
4. The data processing method according to claim 1, characterized in that: Determining whether to send the target data from the processor to the integrated circuit according to the feature profile includes: Obtaining a preset threshold set for each feature in the feature portrait; Whether to send the target data from the processor to the integrated circuit is determined according to a magnitude relationship between a feature value of each feature and a preset threshold value corresponding to each feature.
5. The data processing method according to claim 1, characterized in that: Determining whether to send the target data from the processor to the integrated circuit according to the feature profile includes: Obtaining a weight set for each feature in the feature profile; Performing weighted calculation on the feature value of each feature according to the weight corresponding to each feature to obtain a target feature value; Comparing the magnitude relationship between the target feature value and the decision threshold; Whether to send the target data from the processor to the integrated circuit is determined according to the magnitude relationship between the target feature value and the decision threshold.
6. The data processing method according to claim 1, 4 or 5, characterized in that: The data processing method further includes: Acquiring data concurrency information of the processor and / or data concurrency information of the integrated circuit; According to the data concurrency information of the processor and / or the data concurrency information of the integrated circuit, the preset threshold and / or weight corresponding to one or more features in the feature portrait is adjusted.
7. The data processing method according to claim 6, characterized in that: The adjusting, according to the data concurrency information of the processor and / or the data concurrency information of the integrated circuit, a preset threshold and / or weight corresponding to one or more features in the feature portrait comprises: Adjusting preset thresholds and / or weights corresponding to one or more features in the feature profile according to data concurrency information of the processor in the i-th computing cycle and / or data concurrency information of the integrated circuit in the i-th computing cycle, wherein i is an integer greater than or equal to 1, and wherein each computing cycle represents a time period for deciding whether to send target data from the processor to the integrated circuit; Determining whether to send the target data from the processor to the integrated circuit according to the feature profile includes: Based on the adjusted preset threshold and / or weight and the feature portrait related to the target data constructed in the i+1th computing cycle, determine whether to send the target data to be sent by the processor to the integrated circuit from the processor to the integrated circuit during the i+1th computing cycle.
8. The data processing method according to claim 2, characterized in that: The data processing method further includes: For session data that the processor has not sent to the integrated circuit in the nth computing cycle, if a data packet of a data stream matching the session data is received in the n+mth computing cycle, based on a feature profile related to the session data constructed in the n+mth computing cycle, determine whether to send the session data from the processor to the integrated circuit, wherein n and m are both integers greater than or equal to 1.
9. The data processing method according to claim 3, characterized in that: The N data features include at least statistical information of the number of messages and / or message length information in the target data; and / or, The M processor characteristics include at least a core utilization of the processor; and / or, The K integrated circuit characteristics include at least memory resource utilization of the integrated circuit.
10. A data processing device, characterized in that: include: An acquisition unit, used for acquiring target data to be sent by the processor to the integrated circuit; A construction unit, used to construct a feature profile related to the target data; A determination unit is used to determine whether to send the target data from the processor to the integrated circuit according to the feature portrait.
11. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, wherein when the computer program is executed, the device where the computer-readable storage medium is located executes the data processing method according to any one of claims 1 to 9.
Citation Information
Patent Citations
Message analysis method and device based on conversation
CN103391219A
Data processing method and device, electronic equipment and storage medium
CN116483824A
Load balancing over a plurality of packet forwarding components
US11140083B1
Network Device, Data Processing Method, Apparatus, and System, and Readable Storage Medium
US20220407783A1
