Electronic package and fabrication method thereof

Abstract

An electronic package and a method of fabricating the same are mainly provided with an electronic component on a carrier structure, a thermally conductive layer is disposed on the electronic component, and a heat sink having a recess is disposed on the thermally conductive layer to cover the electronic component so as to buffer the flow of the thermally conductive layer through the configuration of the recess. And a eutectic structure with enough thickness can be formed between the heat dissipation piece and the electronic element, so that the heat dissipation effect of the electronic element meets the expectation.

Description

Technical Field

[0001] The present invention relates to a packaging structure, in particular to an electronic packaging component with a heat dissipation component and a manufacturing method thereof. Background Art

[0002] As the demand for electronic products in terms of functions and processing speed increases, semiconductor chips, as the core components of electronic products, need to have higher density electronic components and electronic circuits. Therefore, semiconductor chips will generate more heat energy during operation. In addition, since the conventional packaging colloid that covers the semiconductor chip has a thermal conductivity of only 0.8 (unit: Wm -1 .k -1 ) has poor heat transfer materials (i.e., poor heat dissipation efficiency). Therefore, if the heat generated by the semiconductor chip cannot be effectively dissipated, it will cause damage to the semiconductor chip and product reliability problems.

[0003] Therefore, in order to quickly dissipate the heat to the outside, the industry usually configures a heat sink or heat spreader in the semiconductor package. The heat sink is usually bonded to the back of the semiconductor chip through a heat dissipation adhesive, such as a thermal interface material (TIM), and the top surface of the heat sink is usually exposed to the packaging adhesive or directly exposed to the atmosphere, so that the heat generated by the semiconductor chip can be dissipated by the heat dissipation adhesive and the heat sink.

[0004] like Figure 1 As shown, the manufacturing method of the conventional semiconductor package 1 is to first place a semiconductor chip 11 on a package substrate 10 with its active surface 11a by flip chip bonding (i.e., through conductive bumps 110 and bottom glue 111), and then place a heat sink 13 on the inactive surface 11b of the semiconductor chip 11 with its top sheet 130 through a TIM layer 12, and the support legs 131 of the heat sink 13 are mounted on the package substrate 10 through an adhesive layer 14. Next, a package molding operation is performed to allow a packaging gel (not shown) to cover the semiconductor chip 11 and the heat sink 13, and to expose the top sheet 130 of the heat sink 13 to the outside of the packaging gel.

[0005] During operation, heat energy generated by the semiconductor chip 11 is conducted to the top plate 130 of the heat sink 13 through the inactive surface 11 b and the TIM layer 12 to be dissipated to the outside of the semiconductor package 1 .

[0006] Furthermore, in the manufacturing process of the conventional semiconductor package 1, the adhesive layer 14 is usually heated and glued onto the package substrate 10, and then the support legs 131 of the heat sink 13 are directly attached. After the adhesive layer 14 is cooled, an adhesive force is generated, so that the package substrate 10 and the heat sink 13 are bonded to each other.

[0007] However, in the conventional semiconductor package 1, the TIM layer 12 is made of liquid metal of a high thermal conductivity heat dissipation material (86W / mK). Since the liquid metal is solid at room temperature but becomes fluid after being melted at high temperature during the reflow operation, the TIM layer 12 will quickly spread on the top plate 130 of the heat dissipation element 13, making it difficult to form a co-metal structure of sufficient thickness between the heat dissipation element 13 and the semiconductor chip 11, resulting in poor thermal conductivity of the TIM layer 12, causing the heat dissipation effect of the semiconductor chip 11 to be unsatisfactory.

[0008] Furthermore, since the TIM layer 12 will quickly spread on the top plate 130 of the heat sink 13, the TIM layer 12 cannot contact every part of the non-active surface 11b of the semiconductor chip 11, so that the connection area between the TIM layer 12 and the semiconductor chip 11 is reduced, and the eutectic structure is prone to fracture, resulting in poor heat dissipation performance and product reliability. The TIM layer 12 may even overflow onto the active surface 11a of the package substrate 10 or the semiconductor chip 11, causing an electrical short circuit.

[0009] Therefore, how to overcome the above-mentioned problems of the prior art has become a difficult problem that needs to be overcome urgently in the industry. Summary of the invention

[0010] In view of the above-mentioned defects of the prior art, the present invention provides an electronic package and a method for manufacturing the same, which can at least partially solve the problems of the prior art.

[0011] The electronic package of the present invention comprises: a supporting structure; an electronic component, which is arranged on the supporting structure; a heat-conducting layer, which is arranged on the electronic component; and a heat sink having a recess, which is arranged on the heat-conducting layer to cover the electronic component, wherein the opening of the recess faces the electronic component, the heat sink is combined with the heat-conducting layer through a heat-dissipating layer, and the heat-dissipating layer extends to the wall surface of the recess.

[0012] The present invention also provides a method for manufacturing an electronic package, comprising: placing an electronic component on a supporting structure; forming a heat-conducting layer on the electronic component; and disposing a heat sink having a recess on the heat-conducting layer so that the heat sink covers the electronic component, wherein the opening of the recess faces the electronic component, the heat sink is combined with the heat-conducting layer via a heat-dissipating layer, and the heat-dissipating layer extends to the wall of the recess.

[0013] In the aforementioned electronic package and its manufacturing method, the recess is annular and surrounds the heat-conducting layer. For example, the recess is continuous or discontinuous. Further, the recess comprises a groove with a rectangular profile, four stripe grooves or two oppositely arranged L-shaped grooves.

[0014] In the aforementioned electronic package and its manufacturing method, the vertical projection area of ​​the electronic component relative to the supporting structure is located within the ring of the recess.

[0015] In the aforementioned electronic package and its manufacturing method, the vertical projection area of ​​the electronic component relative to the supporting structure is equal to the area of ​​the layout contour of the recess on the heat sink.

[0016] In the aforementioned electronic package and its manufacturing method, the vertical projection area of ​​the electronic element relative to the supporting structure is smaller than the area of ​​the layout contour of the recess on the heat sink.

[0017] In the aforementioned electronic packaging component and its manufacturing method, the heat conducting layer is liquid metal.

[0018] In the aforementioned electronic packaging component and its manufacturing method, the heat dissipation layer is a gold layer.

[0019] As can be seen from the above, the electronic package and the manufacturing method of the present invention mainly buffer the flow of the heat-conducting layer by configuring the recess. Therefore, compared with the prior art, when the heat-conducting layer has fluidity after being melted at high temperature during the reflow operation, the heat-conducting layer is limited by the recess and can slowly diffuse on the heat sink, so as to form a co-metal structure of sufficient thickness between the heat sink and the electronic component, thereby effectively improving the thermal conductivity of the heat-conducting layer and making the heat dissipation effect of the electronic component meet expectations.

[0020] Furthermore, since the thermally conductive layer slowly diffuses on the heat sink, the thermally conductive layer can contact the expected location of the electronic component to increase the connection area between the thermally conductive layer and the electronic component. As a result, the eutectic structure will not break, thereby improving the heat dissipation performance and product reliability of the electronic package, and even avoiding the problem of electrical short circuit caused by the thermally conductive layer overflowing to other locations of the supporting structure or the electronic component. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 It is a cross-sectional schematic diagram of a conventional semiconductor package.

[0022] FIG. 2A to FIG. 2D It is a cross-sectional schematic diagram of a method for manufacturing an electronic package of the present invention.

[0023] Figure 3A for Figure 2D A partial top view schematic diagram of .

[0024] Figure 3B and Figure 3C for Figure 2D A partial top view of other embodiments of the present invention is provided.

[0025] Figure 4A for Figure 2D A cross-sectional schematic diagram of another embodiment of the present invention.

[0026] Figure 4B for Figure 4A Schematic cross-sectional view of other embodiments.

[0027] Main component symbols

[0028] 1 Semiconductor Package

[0029] 10 Package substrate

[0030] 11. Semiconductor Chip

[0031] 11a,21a Action surface

[0032] 11b, 21b Non-active surface

[0033] 110,210 Conductive bumps

[0034] 111,211 Primer

[0035] 12 TIM layer

[0036] 13,23,43 heat sink

[0037] 130 Top sheet

[0038] 131,231 Support feet

[0039] 14,24 Adhesive layer

[0040] 2,4a,4b Electronic packaging

[0041] 20 Load-bearing structure

[0042] 20a First side

[0043] 20b Second side

[0044] 21 Electronic components

[0045] 22. Thermal Conductive Layer

[0046] 23a,33a,33b groove

[0047] 230 Radiator

[0048] 25 Heat dissipation layer

[0049] 28 Passive components

[0050] 29 Conductive element

[0051] S recess

[0052] D vertical projection area

[0053] P1,P2 area. DETAILED DESCRIPTION

[0054] The following describes the implementation of the present invention through specific embodiments. Those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification.

[0055] It should be noted that the structures, proportions, sizes, etc. illustrated in the drawings of this specification are only used to match the contents disclosed in the specification for the understanding and reading of those skilled in the art, and are not used to limit the limiting conditions under which the present invention can be implemented, so they have no substantial technical significance. Any structural modification, change in proportional relationship, or adjustment in size should still fall within the scope of the technical contents disclosed by the present invention without affecting the effects and purposes that can be achieved by the present invention. At the same time, the terms such as "on", "first", "second", and "one" quoted in this specification are only for the convenience of description, and are not used to limit the scope of the implementation of the present invention. Changes or adjustments in their relative relationships should also be regarded as the scope of the implementation of the present invention without substantially changing the technical contents.

[0056] FIG. 2A to FIG. 2D It is a cross-sectional schematic diagram of a method for manufacturing an electronic package 2 of the present invention.

[0057] like Figure 2A As shown, a supporting structure 20 is provided, which has a first side 20 a and a second side 20 b opposite to each other, and at least one electronic component 21 is disposed on the first side 20 a of the supporting structure 20 .

[0058] The supporting structure 20 may be a package substrate having a core layer and a circuit portion or a coreless circuit structure.

[0059] In this embodiment, the carrier structure 20 includes at least one dielectric layer and a circuit layer combined with the dielectric layer, such as a fan-out redistribution layer (RDL) specification. For example, the first side 20a of the carrier structure 20 is used as a die placement side for carrying the electronic component 21, and the second side 20b of the carrier structure 20 is used as a ball implantation side.

[0060] It should be understood that the supporting structure 20 may also be other supporting units for supporting chips, such as a leadframe, a wafer, a silicon interposer, or other boards with metal routing, etc., and is not limited to the above.

[0061] The electronic component 21 is an active component, a passive component or a combination of the two. The active component is, for example, a semiconductor chip, and the passive component is, for example, a resistor, a capacitor and an inductor.

[0062] In this embodiment, the electronic component 21 is a semiconductor chip having an active surface 21a and an inactive surface 21b opposite to each other, and the active surface 21a has a plurality of electrode pads, so that the electrode pads are combined and electrically connected to the circuit layer of the supporting structure 20 in a flip-chip manner through a plurality of conductive bumps 210 such as solder materials, and then a coating layer such as a primer 211 is filled and formed between the first side 20a of the supporting structure 20 and the active surface 21a of the electronic component 21 to cover the conductive bumps 210.

[0063] In other embodiments, the electronic component 21 may also be electrically connected to the circuit layer of the supporting structure 20 by bonding multiple welding wires (not shown); or, the electronic component 21 may directly contact the circuit layer of the supporting structure 20 .

[0064] It should be understood that there are many ways to electrically connect the electronic components 21 to the supporting structure 20 , and the required types and quantities of electronic components 21 can be placed on the supporting structure 20 , which are not limited to the above.

[0065] like Figure 2B As shown, at least one passive component 28 is disposed on the supporting structure 20 so that the passive component 28 is electrically connected to the circuit layer.

[0066] like Figure 2C As shown, a heat conducting layer 22 is formed on the inactive surface 21 b of the electronic component 21 .

[0067] In this embodiment, the heat-conducting layer 22 is used as a thermal interface material (TIM). For example, the heat-conducting layer 22 can be a liquid metal such as solder material, which has a high thermal conductivity.

[0068] like Figure 2DAs shown, a heat sink 23 having a recess S is disposed on the first side 20a of the support structure 20 and the heat conductive layer 22 to cover the electronic component 21, and the opening of the recess S faces the electronic component 21. Afterwards, a plurality of conductive elements 29 such as metal pillars such as copper pillars, metal bumps coated with insulating blocks, solder balls, solder balls with core copper balls, or other conductive structures can be disposed on the second side 20b of the support structure 20 to obtain the electronic package 2 of the present invention, and an electronic device such as a circuit board (not shown) can be subsequently connected through these conductive elements 29.

[0069] In this embodiment, the heat sink 23 has a heat sink 230 that contacts and combines with the heat conductive layer 22 and a plurality of support legs 231 that extend downward from the edge of the heat sink 230 to combine with the supporting structure 20. For example, the heat sink 230 is in a sheet-like form, and the heat conductive layer 22 (i.e., liquid metal) can be pressed by the heat dissipation layer 25 so that the heat conductive layer 22 (i.e., liquid metal) is located between the heat sink 230 and the electronic component 21. Further, the heat dissipation layer 25 is a metal layer, such as a gold material, which is coated on the heat sink 230 and extends to the wall surface of the recess S.

[0070] Furthermore, the support leg 231 is combined with the support structure 20 through the adhesive layer 24. For example, the adhesive layer 24 is first formed on the first side 20a of the support structure 20 by dispensing, so that the adhesive layer 24 is located at the periphery of the passive component 28, and then the support leg 231 is bonded to the adhesive layer 24 to fix the heat sink 23 on the support structure 20.

[0071] Furthermore, the recess S is a continuous ring, such as Figure 3A The rectangular groove 23a shown in the figure surrounds the heat-conducting layer 22, so that the vertical projection area D of the inactive surface 21b of the electronic component 21 relative to the first side 20a of the supporting structure 20 is located within the ring of the recess S. In other embodiments, the recess S is a discontinuous ring, such as Figure 3B The four grooves 33a shown or Figure 3C Two oppositely disposed L-shaped grooves 33b are shown.

[0072] In addition, if Figure 4A In another embodiment, the heat sink 43 may be a sheet without the support legs 231, and the vertical projection area D of the inactive surface 21b of the electronic component 21 relative to the first side 20a of the supporting structure 20 may be equal to the area P1 of the layout contour of the recess S on the heat sink 43. Figure 4BIn the electronic package 4 b shown, the vertical projection area D of the inactive surface 21 b of the electronic component 21 relative to the first side 20 a of the supporting structure 20 may also be smaller than the area P2 of the layout contour of the recess S on the heat sink 43 .

[0073] Therefore, the electronic package 2, 4a, 4b of the present invention is mainly configured through the recess S, so that when the temperature rises, the volume of the heat-conducting layer 22 (liquid metal) will expand and flow into the recess S, thereby buffering the flow of the heat-conducting layer 22 (liquid metal). Therefore, compared with the prior art, when the heat-conducting layer 22 is reflowed and melted at high temperature to have fluidity, the heat-conducting layer 22 is limited by the recess S and can slowly diffuse on the heat sink 23, 43, so as to facilitate the formation of a co-metal structure of sufficient thickness between the heat sink 23, 43 and the electronic component 21, thereby effectively improving the thermal conductivity of the heat-conducting layer 22, so that the heat dissipation effect of the electronic component 21 meets expectations.

[0074] Furthermore, since the thermal conductive layer 22 (liquid metal) slowly diffuses on the heat sink 23, 43, the thermal conductive layer 22 (liquid metal) can contact every part of the non-active surface 21b of the electronic component 21 to increase the connection area between the thermal conductive layer 22 and the electronic component 21, so that the cometallic structure will not break, thereby improving the heat dissipation performance and product reliability of the electronic package 2, 4a, 4b, and even avoiding the problem of electrical short circuit caused by the thermal conductive layer 22 (liquid metal) overflowing to the supporting structure 20 or the active surface 21a of the electronic component 21.

[0075] In addition, the design of the heat dissipation layer 25 can help accelerate the heat dissipation rate, so that the electronic package 2, 4a, 4b meets the requirements of high heat dissipation.

[0076] The present invention further provides an electronic package 2, 4a, 4b, comprising: a supporting structure 20, at least one electronic component 21 disposed on the supporting structure 20, a heat conducting layer 22 disposed on the electronic component 21, and a heat dissipation member 23, 43 disposed on the heat conducting layer 22 to cover the electronic component 21.

[0077] The heat sink 23 , 43 has a concave portion S, and the heat sink 23 , 43 is combined with the heat conductive layer 22 via a heat sink layer 25 , and the heat sink layer 25 extends to the wall surface of the concave portion S.

[0078] In one embodiment, the recess S is annular and surrounds the heat conducting layer 22. For example, the recess S is a continuous ring or a discontinuous ring. Further, the recess S is, for example, a rectangular groove 23a, four stripe grooves 33a, or two oppositely disposed L-shaped grooves 33b.

[0079] In one embodiment, a vertical projection area D of the electronic component 21 relative to the supporting structure 20 is located within the ring of the recess S.

[0080] In one embodiment, a vertical projection area D of the electronic component 21 relative to the supporting structure 20 is equal to a region area P1 of a layout contour of the recess S on the heat sink 43 .

[0081] In one embodiment, a vertical projection area D of the electronic component 21 relative to the supporting structure 20 is smaller than an area P2 of a layout contour of the recess S on the heat sink 43 .

[0082] In one embodiment, the heat conductive layer 22 is liquid metal.

[0083] In one embodiment, the heat dissipation layer 25 is a gold layer.

[0084] In summary, the electronic package and the manufacturing method thereof of the present invention form a recessed configuration on the heat sink to buffer the flow of the thermally conductive layer. Therefore, when the thermally conductive layer generates fluidity, the thermally conductive layer can slowly diffuse on the heat sink, so as to facilitate the formation of a co-metal structure of sufficient thickness between the heat sink and the electronic component, thereby effectively improving the thermal conductivity of the thermally conductive layer and making the heat dissipation effect of the electronic component meet expectations.

[0085] Furthermore, since the thermally conductive layer slowly diffuses on the heat sink, the thermally conductive layer can contact every part of the non-active surface of the electronic component to increase the connection area between the thermally conductive layer and the electronic component. As a result, the eutectic structure will not break, thereby improving the heat dissipation performance and product reliability of the electronic package, and even avoiding the problem of electrical short circuit caused by the thermally conductive layer overflowing onto the active surface of the supporting structure 20 or the electronic component 21.

[0086] The above embodiments are only used to illustrate the principles and effects of the present invention, and are not used to limit the present invention. Any person skilled in the art may modify the above embodiments without violating the spirit and scope of the present invention. Therefore, the scope of protection of the present invention should be as listed in the claims.

Claims

1. An electronic package, comprising: load-bearing structure; an electronic component disposed on the supporting structure; A heat-conducting layer disposed on the electronic component; as well as The heat sink with a concave portion is arranged on the heat-conducting layer to cover the electronic component, wherein the opening of the concave portion faces the electronic component, the heat sink is combined with the heat-conducting layer through a heat dissipation layer, and the heat dissipation layer extends to the wall surface of the concave portion.

2. The electronic package according to claim 1, wherein: The recess is annular and surrounds the heat conducting layer.

3. The electronic package of claim 2, wherein: The recessed portion is in a continuous ring shape.

4. The electronic package of claim 2, wherein: The recess is in a discontinuous ring shape.

5. The electronic package of claim 2, wherein: The recessed portion includes a groove with a rectangular outline, four stripe-shaped grooves, or two oppositely disposed L-shaped grooves.

6. The electronic package of claim 2, wherein: The vertical projection area of ​​the electronic component relative to the supporting structure is located in the ring of the recess.

7. The electronic package of claim 2, wherein: The vertical projection area of ​​the electronic component relative to the supporting structure is equal to the area of ​​the layout contour of the recess on the heat sink.

8. The electronic package of claim 2, wherein: The vertical projection area of ​​the electronic component relative to the supporting structure is smaller than the area of ​​the layout contour of the recess on the heat sink.

9. The electronic package of claim 1, wherein: The heat conducting layer is liquid metal.

10. The electronic package of claim 1, wherein: The heat dissipation layer is a gold layer.

11. A method for manufacturing an electronic package, comprising: Placing the electronic components on a supporting structure; forming a heat-conducting layer on the electronic component; as well as A heat sink with a recess is disposed on the heat conducting layer so that the heat sink covers the electronic component, wherein the opening of the recess faces the electronic component, the heat sink is combined with the heat conducting layer through the heat dissipation layer, and the heat dissipation layer extends to the wall surface of the recess.

12. The method for manufacturing an electronic package according to claim 11, wherein: The recess is annular and surrounds the heat conducting layer.

13. The method for manufacturing an electronic package according to claim 12, wherein: The recessed portion is in a continuous ring shape.

14. The method for manufacturing an electronic package according to claim 12, wherein: The recess is in a discontinuous ring shape.

15. The method for manufacturing an electronic package according to claim 12, wherein: The recessed portion includes a groove with a rectangular outline, four stripe-shaped grooves, or two oppositely disposed L-shaped grooves.

16. The method for manufacturing an electronic package according to claim 12, wherein: The vertical projection area of ​​the electronic component relative to the supporting structure is located in the ring of the recess.

17. The method for manufacturing an electronic package according to claim 12, wherein: The vertical projection area of ​​the electronic component relative to the supporting structure is equal to the area of ​​the layout contour of the recess on the heat sink.

18. The method for manufacturing an electronic package according to claim 12, wherein: The vertical projection area of ​​the electronic component relative to the supporting structure is smaller than the area of ​​the layout contour of the recess on the heat sink.

19. The method for manufacturing an electronic package according to claim 11, wherein: The heat conducting layer is liquid metal.

20. The method for manufacturing an electronic package according to claim 11, wherein: The heat dissipation layer is a gold layer.

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