A nitride spin field effect memristor based on ScAlN and a method for preparing the same

Abstract

The present invention discloses a nitride spin field effect memristor based on ScAlN and a preparation method thereof, belonging to the field of semiconductor technology. The nitride spin field effect memristor comprises a substrate and a ScAlN / GaN heterostructure thereon, the gate is located above the channel region, and the two ends of the channel region are source-drain spin injection tunneling junctions; the source-drain spin injection tunneling junction is composed of an electron tunneling layer and a spin injection metal layer, the thickness of the ScAlN layer below the spin injection tunneling junction is 2-7 nm, and the Curie temperature of the ferromagnetic metal material constituting the spin injection metal layer is higher than room temperature. The nitride spin field effect memristor of the present invention not only has the advantages of being able to work at room temperature, low power consumption, high integration, and compatibility with existing semiconductor processes, but also overcomes the disadvantages of low gate control efficiency of nitride spin field effect transistors, and also has storage and computing integrated characteristics, and is expected to realize a high-speed, low-power new device with high integration, non-volatility, and high stability, further promoting the development of information technology.

Description

Technical Field

[0001] The invention belongs to the technical field of semiconductors, and in particular relates to a structural design and a preparation method of a nitride spin field effect memristor prototype device based on ScAlN. Background Art

[0002] In recent years, with the rapid development of information technology, the demand for high-performance, low-energy storage devices has been growing. Spintronics, as an emerging technology, uses the spin state of electrons rather than charge to store and process information, showing great potential. Semiconductor spintronic devices are expected to achieve low manufacturing costs and high integration due to their high compatibility with the existing semiconductor industry. The theory of nitride spintronic devices predicts that there will be diluted magnetic semiconductors with Curie temperatures higher than room temperature, and materials such as wurtzite gallium nitride (GaN) and aluminum nitride (AlN) have strong polarization effects, which can bring about greater spin-orbit coupling, which is conducive to the realization of room temperature operation and high-integration spin field effect transistor (Spin-FET) devices.

[0003] It is worth noting that although the wide bandgap characteristics of the nitride system bring it the advantages of high temperature, high power, and stable operation in extreme environments, the Rashba spin-orbit coupling coefficient of the semiconductor heterostructure is inversely proportional to the band gap, which leads to the need for a large external gate voltage in narrow-channel nitride spin field-effect transistors to achieve effective control of the spin signal, which is not conducive to realizing its potential advantages of low power consumption and high integration.

[0004] Scandium aluminum nitride (ScAlN), as a new wide bandgap semiconductor material, has become a research hotspot due to its excellent physical and chemical properties. ScAlN has high thermal stability, excellent electrical properties and a wide bandgap (usually greater than 3.4 eV), making it very suitable for high temperature and high power applications. More importantly, the spin-orbit coupling of GaN-based heterostructures is believed to have of the form, where α R SIA originating from the heterojunction interface, namely Rashba spin-orbit coupling, is proportional to the built-in electric field of the interface , F is the interface electric field; α e It comes from the symmetry of GaN wurtzite structure and is called BIA Rashba term; Dresselhaus term from bulk GaN , in the case of heterojunction quantum confinement, it can be Replace with ,in γ , bis the Dresselhaus term intensity correlation coefficient, represents the square mean of the electron z-direction wave vector, n s The ScAlN material exhibits ferroelectric properties. By utilizing its reversible polarization, it can directly and significantly change the Rashba spin-orbit coupling in semiconductor heterostructures, thereby overcoming the disadvantage of low gate control efficiency of spin-orbit coupling in wide bandgap materials.

[0005] This property of ScAlN material can also be used to realize spin devices with memristor functions. Memristors, as a non-volatile storage element, have attracted much attention due to their simple structure, high integration and versatility. Memristors have the characteristics of in-memory computing, which is expected to break the "von Neumann bottleneck". They can simulate the functions of neuronal synapses and are suitable for building neuromorphic computing systems. Combining the advantages of high speed and low energy consumption of spin electronics devices with the advantages of high integration and versatility of memristors, new high-speed and low-power devices with high integration, non-volatility and high stability can be realized, further promoting the development of information technology. Summary of the invention

[0006] The purpose of the present invention is to make full use of the ferroelectric properties of ScAlN materials and the low power consumption and high integration potential of nitride spintronics devices, and to provide a prototype device structure design and preparation method of a novel nitride spin field effect memristor based on ScAlN.

[0007] In order to realize the ScAlN spin field effect memristor, the ScAlN / GaN heterostructure can be grown on a substrate such as sapphire or silicon by MOCVD / MBE / PVD method. By controlling the thickness of the ScAlN layer, its ferroelectric properties and the existence of two-dimensional electron gas can be ensured. Photolithography is used to etch away part of the ScAlN in the source and drain regions using inductively coupled plasma (ICP), and the exposed ScAlN surface is pretreated using remote plasma preprocessing technology. A thin layer of Al2O3 is grown using plasma enhanced atomic layer deposition (PEALD) or MgO is grown using magnetron sputtering technology as an electron tunneling layer. Ferromagnetic metal Co or CoFeB is grown using magnetron sputtering technology to provide spin polarized electrons; the gate pattern is written using photolithography, and the gate dielectric Al2O3 or SiN is prepared using plasma enhanced atomic layer deposition and electron beam evaporation (Electron Beam Evaporation) technology.x and gate metal, and finally complete the spin field effect transistor structure with a ferroelectric barrier layer, realizing the spin field effect memristor function.

[0008] Specifically, the technical solution of the present invention is as follows:

[0009] A nitride spin field effect memristor based on ScAlN comprises a substrate and a ScAlN / GaN heterostructure on the substrate, wherein the ScAlN / GaN heterostructure comprises a channel region, a gate is located on the channel region, and two ends of the channel region are respectively a source spin injection tunneling junction and a drain spin injection tunneling junction; wherein the gate comprises a gate dielectric layer and a gate metal layer, and the gate dielectric layer is located between the ScAlN layer and the gate metal layer; the spin injection tunneling junction is composed of an electron tunneling layer and a spin injection metal layer thereon, the ScAlN layer located below the source-drain spin injection tunneling junction has a thickness of 2-7 nm, and the Curie temperature of the ferromagnetic metal material constituting the spin injection metal layer is higher than room temperature.

[0010] In order to realize the spin injection of the two-dimensional electron gas in the ScAlN / GaN heterostructure, it is necessary to partially etch and thin the ScAlN barrier layer in the source-drain spin injection tunneling junction area before the tunneling junction is grown, so that the thickness of the structure between the spin injection tunneling junction and the two-dimensional electron gas (2DEG) is 2~7 nm. The source-drain spin injection tunneling junction can use different combinations of ferromagnetic metals and electron tunneling layers according to performance requirements. To ensure the basic function of the spin field effect memristor, the Curie temperature of the ferromagnetic metal needs to be higher than room temperature.

[0011] Preferably, the substrate may be a Si(100) substrate, a Si(111) substrate or a sapphire substrate.

[0012] In the ScAlN / GaN heterostructure, the ScAlN layer is located on the GaN layer, the thickness of the ScAlN layer in the channel region is preferably 10-50 nm, and the Sc component in the ScAlN layer is between 0.14 and 0.32.

[0013] The gate dielectric layer of the gate may be made of silicon nitride (SiN x ), silicon oxide (SiO2) or other low dielectric constant materials, with a thickness of preferably 20~50 nm; the gate metal layer can be made of one or more materials selected from Ti, Ag, Au, V, Nb, Ru, W, Ta, Al, Mg, Zn, Pd, Cu, TaN, TiN, TiW, TiAlN, etc., and can also be a multi-layer structure, such as a Ti\Au composite metal layer.

[0014] In the spin injection tunneling junction, the electron tunneling layer usually uses metal oxides such as Al2O3, MgO and other insulating materials, and the thickness is preferably between 1 and 2 nm; the spin injection metal layer uses ferromagnetic metals such as Co, CoFeB, etc., and the thickness is preferably between 10 and 30 nm.

[0015] The nitride spin field effect memristor based on ScAlN proposed in the present invention is a further optimization based on the structure of the spin field effect transistor. The basic principle of the spin field effect transistor is to use the gate electric field to regulate the Rashba spin-orbit coupling in the two-dimensional electron gas of the semiconductor heterostructure, so that the spin-orbit coupling equivalent magnetic field felt by the spin-polarized electrons injected into the two-dimensional electron gas from the source during the transport to the drain changes, thereby regulating the spin polarization of the spin-polarized electrons detected at the drain. Since the band gap of the nitride wide bandgap semiconductor is large, the gate's regulation efficiency on spin-orbit coupling is low. The present invention uses the ferroelectric properties of ScAlN to regulate the polarization electric field reversal in the heterostructure, thereby greatly changing the part related to the polarization electric field in the Rashba spin-orbit coupling, and efficiently regulating the Rashba spin-orbit coupling; in addition, since ScAlN has ferroelectric properties, the ferroelectric polarization field regulated by the gate is still maintained after the gate voltage is removed, and has the ability of storage and computing integration.

[0016] The present invention also provides a method for preparing the above-mentioned ScAlN-based nitride spin field effect memristor, comprising the following steps:

[0017] Step 1, growing a high-quality ScAlN / GaN heterostructure on a substrate;

[0018] Step 2, using photolithography technology to define the source and drain region patterns, etching away part of the ScAlN in the source and drain regions, so that the thickness of the ScAlN layer in the source and drain regions is 2-7 nm;

[0019] Step 3, pre-treating the exposed ScAlN surface using remote plasma pre-treatment technology;

[0020] Step 4, sequentially growing an electron tunneling layer and a spin injection metal layer in the source and drain regions;

[0021] Step 5: define the gate pattern using photolithography technology, and prepare the gate dielectric layer and the gate metal layer in sequence.

[0022] The substrate used in the above step 1 includes but is not limited to a Si (100) substrate, a Si (111) substrate, and a sapphire substrate, and the size of the substrate is not limited.

[0023] Specifically, in step 1, the GaN layer and the ScAlN layer may be grown by MOCVD, MBE and / or PVD, and the Sc composition in the ScAlN layer is between 0.14 and 0.32.

[0024] In the above step 2, the photolithography method may adopt i-line, DUV, EUV or electron beam lithography according to the requirements of the source and drain size.

[0025] Preferably, inductively coupled plasma (ICP) is used to etch ScAlN, the ICP etching power is 50-300 W, the bias power is 15-200 W, the atmosphere is oxygen, and other gases such as nitrogen and argon can also be introduced at the same time as an auxiliary.

[0026] Preferably, the remote plasma pretreatment in the above step 3 is performed in situ in a PEALD chamber or a magnetron sputtering chamber, the atmosphere is ammonia and nitrogen, or argon, the RF power is 50-300 W, and the time is 3-10 min.

[0027] Preferably, in the above step 4, the electron tunneling layer is grown by PEALD or magnetron sputtering technology, and the spin injection metal layer is grown by magnetron sputtering technology. In some embodiments, a material such as Al2O3 or MgO of 1-2 nm is first grown as the electron tunneling layer, and then a ferromagnetic metal such as Co, CoFeB of 10-30 nm is grown as the spin injection metal layer, and finally the photoresist is removed by NMP, DMSO or other adhesive removers suitable for photoresist.

[0028] Specifically, in the above step 4, post-growth annealing may be performed, the annealing atmosphere is nitrogen, and the annealing temperature is between 300° C. and 500° C.

[0029] In the above step 5, preferably, the gate dielectric layer and the gate metal layer are prepared by atomic layer deposition and electron beam evaporation technology respectively. The width of the gate structure is at least less than 500 nm, and the gate pattern can be defined by EUV lithography or electron beam lithography technology. The gate dielectric layer can be SiN with a thickness of 20-50 nm. x Or SiO2, the gate metal layer can be metal such as Ti\Au.

[0030] Beneficial effects of the present invention:

[0031] The present invention provides a novel nitride spin field effect memristor prototype device structure design and preparation method based on ScAlN, firstly, high-quality ScAlN / GaN heterostructure is grown by MOCVD / MBE / PVD method, then high-efficiency spin injection tunneling junction is formed by ICP etching and plasma enhanced atomic layer deposition, magnetron sputtering and other technologies, and finally a gate structure is prepared, and the spin-orbit coupling of the device is regulated by the gate structure electric field and the ScAlN ferroelectric polarization field to realize the function of the spin field effect memristor. Compared with the existing semiconductor spin electronics devices, the novel nitride spin field effect memristor based on ScAlN not only has the advantages of being able to work at room temperature, low power consumption, high integration, and compatibility with existing semiconductor processes, but also overcomes the disadvantages of low gate control efficiency of nitride spin field effect transistors, and also has the characteristics of storage and computing integration, and is expected to realize a high-speed, low-power new device with high integration, non-volatility and high stability, further promoting the development of information technology. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] Figure 1 It is a structural schematic diagram of a nitride spin field effect memristor prototype device based on ScAlN provided in an embodiment of the present invention.

[0033] Figure 2 It is a schematic structural diagram of a ScAlN-based nitride spin field effect memristor prototype device with higher spin injection efficiency provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0034] The present invention will be further described in detail below through specific embodiments in conjunction with the accompanying drawings, but the embodiments of the present invention are not limited thereto.

[0035] Embodiment 1

[0036] See also Figure 1 , Figure 1 Schematic diagram of the structure of a prototype device of a nitride spin field effect memristor based on ScAlN provided in this embodiment, and its preparation method includes five steps, wherein:

[0037] Step 1: growing a high-quality ScAlN / GaN heterostructure on a substrate using an MBE / MOCVD method.

[0038] Specifically, the substrate used is a two-inch sapphire substrate.

[0039] Specifically, high-quality GaN was grown on a sapphire substrate using MOCVD, and then sent into an MBE chamber using a vacuum interconnect system, and then 15 nm thick ScAlN was grown with an Sc composition of 0.32.

[0040] Step 2: Use photolithography technology to etch away part of ScAlN in the source and drain regions using ICP.

[0041] Specifically, the photoresist used is AZ-6130, the thickness of the photoresist is 2 microns, and the hardening temperature is 120° C. for 2 minutes.

[0042] Specifically, the ICP etching power is 50 W, the bias power is 15 W, the atmosphere is oxygen and nitrogen, and the etched ScAlN thickness is 13 nm.

[0043] Step 3: pretreat the exposed ScAlN surface using remote plasma pretreatment technology.

[0044] Specifically, the remote plasma pretreatment was carried out in situ in the PEALD chamber with an atmosphere of ammonia and nitrogen, a radio frequency power of 200 W, and a time of 5 min.

[0045] Step 4: first use PEALD to grow a thin layer of Al2O3 as an electron tunneling layer, then use magnetron sputtering technology to grow ferromagnetic metal Co to provide spin-polarized electrons, and finally use a debonding agent to remove the photoresist.

[0046] Specifically, the thickness of Al2O3 is 1.2 nm, the thickness of Co is 10 nm, the debonding agent is N-methylpyrrolidone (NMP), the temperature is 70°C, the time is 10 minutes, and ultrasonic cleaning can be applied at a power of 100 W.

[0047] Specifically, annealing is performed after growth, the annealing atmosphere is nitrogen, and the annealing temperature is 400°C.

[0048] Step 5, write the gate pattern using photolithography technology, and prepare the gate dielectric and gate metal using atomic layer deposition and electron beam evaporation technology.

[0049] Specifically, the gate width of the gate structure is 200 nm, and electron beam lithography is used, AR6200.18 electron beam photoresist is used, the acceleration voltage is 30 kV, and the exposure dose is 100 μC / cm 2 , the developing temperature is 25℃, and the developing time is 30 s.

[0050] Specifically, the gate dielectric is SiN x , thickness is 20~50 nm, and the gate metal is Ti / Au 20 nm / 80 nm.

[0051] Embodiment 2

[0052] See also Figure 2 , Figure 2Schematic diagram of a nitride spin field effect memristor prototype device based on ScAlN with higher spin injection efficiency provided by an embodiment of the present invention, wherein the preparation method thereof comprises five steps, wherein:

[0053] Step 1: growing a high-quality ScAlN / GaN heterostructure on a substrate using an MBE / MOCVD method.

[0054] Specifically, the substrate used is a two-inch sapphire substrate.

[0055] Specifically, high-quality GaN was grown on a sapphire substrate using MOCVD, and then sent into an MBE chamber using a vacuum interconnect system, and then 14 nm thick ScAlN was grown with an Sc composition of 0.32.

[0056] Step 2: Use photolithography technology to etch away part of ScAlN in the source and drain regions using ICP.

[0057] Specifically, the photoresist used is AZ-6130, the thickness of the photoresist is 2 microns, and the hardening temperature is 120° C. for 2 minutes.

[0058] Specifically, the ICP etching power is 50 W, the bias power is 15 W, the atmosphere is oxygen and nitrogen, and the etched ScAlN thickness is 12 nm.

[0059] Step 3: pre-treating the exposed ScAlN surface using remote plasma.

[0060] Specifically, remote plasma pretreatment was performed in situ in a magnetron sputtering chamber with an argon atmosphere, a radio frequency power of 50 W, and a time of 10 min.

[0061] Step 4: first, use magnetron sputtering to grow MgO as an electron tunneling layer, then grow ferromagnetic metal CoFeB to provide spin-polarized electrons, and use a debonding agent to remove the photoresist.

[0062] Specifically, the thickness of MgO is 1.6 nm, the thickness of CoFeB is 10 nm, the debonding agent is N-methylpyrrolidone (NMP), the temperature is 70° C., the time is 10 minutes, and ultrasonic cleaning can be applied at a power of 100 W.

[0063] Specifically, annealing is performed after growth, the annealing atmosphere is nitrogen, and the annealing temperature is 350°C.

[0064] Step 5, write the gate pattern using photolithography technology, and prepare the gate dielectric and gate metal using atomic layer deposition and electron beam evaporation technology.

[0065] Specifically, the gate width of the gate structure is 200 nm, and electron beam lithography is used, AR6200.18 electron beam photoresist is used, the acceleration voltage is 30 kV, and the exposure dose is 100 μC / cm 2 , the developing temperature is 25℃, and the developing time is 30 s.

[0066] Specifically, the gate dielectric is SiN x , thickness is 20~50 nm, and the gate metal is Ti / Au 20 nm / 80 nm.

[0067] The above contents are further detailed descriptions of the present invention in combination with specific preferred embodiments, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions or substitutions can be made without departing from the concept of the present invention, which should be regarded as falling within the protection scope of the present invention.

Claims

1. A nitride spin field effect memristor based on ScAlN, comprising a substrate, characterized in that: A ScAlN / GaN heterostructure is formed by stacking a GaN layer and a ScAlN layer on a substrate, wherein the ScAlN / GaN heterostructure includes a channel region, a gate is located above the channel region, and two ends of the channel region are respectively a source spin injection tunneling junction and a drain spin injection tunneling junction; wherein the gate includes a gate dielectric layer and a gate metal layer, and the gate dielectric layer is located between the ScAlN layer and the gate metal layer; the spin injection tunneling junction is composed of an electron tunneling layer and a spin injection metal layer thereon, the electron tunneling layer is Al2O3 or MgO, and the spin injection metal layer is Co or CoFeB; the ScAlN layer located below the source-drain spin injection tunneling junction has a thickness of 2-7 nm, and the Curie temperature of the ferromagnetic metal material constituting the spin injection metal layer is higher than room temperature.

2. The ScAlN-based nitride spin field effect memristor according to claim 1, characterized in that: The substrate is a silicon substrate or a sapphire substrate.

3. The ScAlN-based nitride spin field effect memristor according to claim 1, characterized in that: The Sc content in the ScAlN layer is between 0.14 and 0.32, and the thickness of the ScAlN layer in the channel region is 10-50 nm.

4. The ScAlN-based nitride spin field effect memristor according to claim 1, characterized in that: The gate dielectric layer is silicon nitride or silicon oxide with a thickness of 20 to 50 nm; the gate metal layer is made of one or more materials selected from the group consisting of Ti, Ag, Au, V, Nb, Ru, W, Ta, Al, Mg, Zn, Pd, Cu, TaN, TiN, TiW, and TiAlN.

5. The ScAlN-based nitride spin field effect memristor according to claim 1, characterized in that: The thickness of the electron tunneling layer is 1-2 nm; the thickness of the spin injection metal layer is 10-30 nm.

6. A method for preparing a nitride spin field effect memristor based on ScAlN according to any one of claims 1 to 5, comprising: 1) Growing ScAlN / GaN heterostructure on substrate; 2) Use photolithography technology to define the source and drain region patterns, and etch away part of the ScAlN in the source and drain regions, so that the thickness of the ScAlN layer in the source and drain regions is 2~7 nm; 3) Pretreatment of the exposed ScAlN surface using remote plasma pretreatment technology; 4) Sequentially grow an electron tunneling layer and a spin injection metal layer in the source and drain regions; 5) Use photolithography technology to define the gate pattern and prepare the gate dielectric layer and gate metal layer in sequence.

7. The preparation method according to claim 6, characterized in that: In step 1), a GaN layer and a ScAlN layer are grown in sequence by MOCVD, MBE and / or PVD; and in step 2), ScAlN is etched by ICP.

8. The preparation method according to claim 6, characterized in that: The remote plasma pretreatment in step 3) is performed in situ in a PEALD chamber or a magnetron sputtering chamber. In step 4), an electron tunneling layer is grown using PEALD or magnetron sputtering technology, and a spin injection metal layer is grown using magnetron sputtering technology, and annealing is performed after growth.

9. The preparation method according to claim 6, characterized in that: Step 5) Define the gate pattern width to be less than 500 nm, prepare the gate dielectric layer using atomic layer deposition, and prepare the gate metal layer using electron beam evaporation technology.

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