Method for manufacturing wiring substrate, wiring substrate, photomask, and exposure drawing data structure

Abstract

A method for manufacturing a wiring board includes: a step for forming a resist layer on a support; a step for exposing the resist layer to light; a step for developing the exposed resist layer to form an opening in the resist layer; a step for forming a metal wiring in the opening; and a step for removing the resist layer after forming the metal wiring. In the step of exposing the resist layer, a wiring exposure pattern corresponding to the metal wiring and a dummy exposure pattern not corresponding to the metal wiring are exposed to the resist layer. At least a portion of the dummy exposure pattern is located in a region within 200 [mu] m from an end portion of the wiring exposure pattern.

Description

Technical Field

[0001] The present invention relates to a method for manufacturing a wiring substrate, a wiring substrate, a photomask, and an exposure drawing data structure. Background Art

[0002] In order to meet the requirements of miniaturization, lightness and high speed of electronic equipment, the wiring substrate constituting the electronic equipment needs to have wiring with a small width. As a method for forming wiring with a small width, the semi-additive (SAP) method and the modified semi-additive (MSAP) method (for example, refer to Patent Document 1) are widely used. These methods generally include a process of forming a copper plating layer on a metal layer by electroplating. In the SAP method, an electroless copper plating layer is used as the metal layer, and in the MSAP method, a copper foil is used as the metal layer.

[0003] Previous technical literature

[0004] Patent Literature

[0005] Patent Document 1: Japanese Patent Application Publication No. 2004-6773 Summary of the invention

[0006] Technical issues to be solved by the invention

[0007] In recent years, with the high density of semiconductor packages, miniaturization of wiring, reduction in diameter of terminal electrodes such as bumps and through-holes, etc. have been developed. In the horizontal direction of the package, miniaturization and miniaturization of wiring, etc. have been developed by the above-mentioned SAP method, etc. On the other hand, from the perspective of resistance, in order to keep the cross-sectional area of ​​the wiring, etc. above a certain value, the height of the wiring, etc. in the vertical direction is maintained relatively high. Therefore, there is a tendency for the aspect ratio of the metal wiring to increase, and the metal wiring may fall in the manufacturing process of the wiring substrate, which sometimes reduces the yield. On the other hand, it is known that a part of the dry film resist 130 widely used in forming metal wiring is Fig.11 In the resist stripping step after the metal wiring 121 is formed on the opening 135 by plating as shown in FIG. Fig.11 As shown in (c) and (d) of FIG. 1 , the metal wiring 121 swells and peels off. The swelling during the peeling exerts stress on the metal wiring 121 having a high vertical and horizontal length as described above, further promoting the collapse of the metal wiring.

[0008] An object of the present invention is to provide a method for manufacturing a wiring board, a wiring board, a photomask (reticle), and an exposure drawing data structure capable of suppressing a decrease in yield due to the collapse of metal wiring.

[0009] Means for solving technical problems

[0010] [1] One aspect of the present invention relates to a method for manufacturing a wiring substrate. The method for manufacturing a wiring substrate includes: a step of forming a resist layer on a support; a step of exposing the resist layer; a step of developing the exposed resist layer to form an opening on the resist layer; a step of forming metal wiring in the opening; and a step of removing the resist layer after forming the metal wiring. In the step of exposing the resist layer, a wiring exposure pattern corresponding to the metal wiring and a dummy exposure pattern not corresponding to the metal wiring are exposed to the resist layer. At least a portion of the dummy exposure pattern is located in an area within 200 μm from an end of the wiring exposure pattern.

[0011] In the manufacturing method of the wiring substrate, at least a portion of the dummy exposure pattern that does not constitute the wiring in the wiring substrate is located in an area within 200 μm from the end of the wiring exposure pattern corresponding to the metal wiring that constitutes the wiring in the wiring substrate. At this time, by setting a dummy metal structure in the area exposed by the dummy exposure pattern, or by setting a dummy exposure pattern to slice the resist layer in the area, the stress of the resist on the metal wiring set in the area exposed by the wiring exposure pattern can be reduced. Thus, by adjacent dummy exposure patterns, it is possible to prevent the metal wiring from tipping over due to the stress of the resist in the manufacturing process of the wiring substrate. Therefore, according to the manufacturing method of the wiring substrate, the reduction of the yield can be suppressed. In addition, the metal wiring described herein includes, for example, a wiring electrode formed for horizontal electrical connection on a chip or substrate, or a terminal electrode or a protruding electrode formed for vertical electrical connection.

[0012] [2] In the method for manufacturing a wiring substrate of [1], preferably, the portion of the resist layer exposed by the dummy exposure pattern is separated and removed in the step of removing the resist layer. In this case, by separating the resist layer, it is possible to reduce the stress of the resist on the metal wiring provided in the area exposed by the wiring exposure pattern, and more reliably suppress the metal wiring such as the wiring electrode from falling due to the peeling of the resist, thereby suppressing the reduction of the yield.

[0013] [3] In the method for manufacturing a wiring board of [1] or [2] above, the dummy exposure pattern may include a grid shape in which a plurality of lines are arranged in a grid shape. In this case, by more reliably singulating the portion of the resist layer exposed by the dummy exposure pattern, it is possible to more reliably suppress the metal wiring such as wiring electrodes from falling due to resist peeling, thereby suppressing a decrease in yield.

[0014] [4] In the method for manufacturing a wiring board according to any one of [1] to [3] above, the dummy exposure pattern may include a dot shape in which a plurality of dots are arranged. In this case, by more reliably singulating the portion of the resist layer exposed by the dummy exposure pattern, it is possible to more reliably suppress the metal wiring such as wiring electrodes from falling down due to resist peeling, thereby suppressing a decrease in yield.

[0015] [5] In the manufacturing method of the wiring substrate described in any one of [1] to [4] above, the dummy exposure pattern has a linear portion or a dot, and the width of the linear portion or the dot can be less than the resolution of the resist constituting the resist layer. At this time, although the dummy metal structure is not formed according to the dummy exposure pattern, since the exposed resist layer is divided and fragmented, it is possible to suppress the metal wiring from falling down when the resist is peeled off. Therefore, according to this manufacturing method, it is possible to suppress the reduction of the yield. In addition, in this manufacturing method, it is difficult to form a dummy metal structure according to the dummy exposure pattern, so that no unnecessary part of the structure is left in the manufactured wiring substrate.

[0016] [6] In the method for manufacturing a wiring substrate described in any one of [1] to [5] above, preferably, in the step of forming a resist layer, a resist layer is formed on a metal layer provided on a support, in the step of forming an opening, the metal layer is exposed from the opening, and in the step of forming metal wiring, electroplating is deposited on the metal layer exposed in the opening to form metal wiring. In this case, by forming metal wiring by a SAP method or an MSAP method, etc., it is possible to easily form finer wiring electrodes, etc. Therefore, according to the method for manufacturing a wiring substrate, it is possible to achieve miniaturization or reduction in diameter of wiring electrodes, etc. Furthermore, in the manufacturing method, preferably, in the portion of the resist layer exposed by the dummy exposure pattern, an opening that exposes the metal layer during development is not formed. In this case, since an opening that exposes the metal layer is not formed, a dummy metal structure is not formed according to the dummy exposure pattern, and no unnecessary part of the structure is left in the manufactured wiring substrate.

[0017] [7] In the method for manufacturing a wiring substrate described in any one of [1] to [6] above, the dummy exposure pattern may be a pattern that can expose the resist layer in such a way that the length of the long side of the single-piece stripped resist sheet is 100 μm or less. In this case, by fracturing the resist layer, it is possible to reduce the stress of the resist on the metal wiring disposed in the area exposed by the wiring exposure pattern. Thus, by adjacent dummy exposure patterns, it is possible to prevent the metal wiring from collapsing due to the stress of the resist during the manufacturing process of the wiring substrate. Therefore, according to the method for manufacturing a wiring substrate, it is possible to suppress a reduction in the yield rate.

[0018] [8] In the method for manufacturing a wiring substrate according to any one of [1] to [7] above, the dummy exposure pattern may surround at least a portion of the wiring exposure pattern. Furthermore, the dummy exposure pattern may surround the entire wiring exposure pattern. The outer side of the metal wiring formed by arranging a plurality of wiring electrodes tends to fall due to resist peeling, but by configuring the dummy exposure pattern in this way, the falling of the metal wiring can be more reliably suppressed, thereby suppressing the reduction in yield.

[0019] [9] In the method for manufacturing a wiring board according to any one of [1] to [8] above, the resist layer may be formed of a negative resist, and the swelling rate of the resist after being immersed in a 10-fold diluted stripping solution at 22°C for 1 minute may be 30 wt% or less. The swelling rate of the resist after being immersed in a 10-fold diluted stripping solution at 22°C for 1 minute may be 5 wt% or more, or 10 wt% or more and 20 wt% or less. The stripping solution may be a general-purpose stripping solution.

[0020]

[10] In the method for manufacturing a wiring substrate described in any one of [1] to [9] above, in the step of exposing the resist layer, the resist layer can be exposed using a photomask including an exposure pattern for wiring and a dummy exposure pattern.

[0021]

[11] In the method for manufacturing a wiring substrate described in any one of [1] to

[10] above, in the step of exposing the resist layer, the resist layer can be exposed by drawing according to exposure drawing data including an exposure pattern for wiring and a dummy exposure pattern. In this case, since components such as a photomask are not required, the corresponding manufacturing cost can be reduced. In addition, by making or correcting the exposure drawing data, it is easy to make or correct the exposure pattern. In addition, when exposure is performed using the exposure drawing data, exposure can be performed using, for example, a beam of a laser or electron gun.

[0022]

[12] Another aspect of the present invention relates to a wiring substrate. The wiring substrate comprises: a support body; a plurality of metal wirings arranged on the support body; and at least one dummy metal structure surrounding at least a portion of the plurality of metal wirings. The width or diameter of the metal wiring in the short side direction is 20 μm or less, and at least a portion of the dummy metal structure is located in a region within 200 μm from the metal wiring closest to the dummy metal structure among the plurality of metal wirings. The dummy metal structure includes at least one of the following: a dummy metal structure in a grid shape in which a plurality of wires are arranged in a grid shape, an inner dummy metal structure located between the plurality of metal wirings, and a dummy metal structure in which a plurality of point-shaped electrodes are arranged in a manner surrounding at least a portion of the plurality of metal wirings. The planar shape of the point-shaped electrode can be, for example, a geometric pattern such as a circle, a triangle, a quadrilateral, a cross mark, or a combination thereof. At this time, the adjacent dummy metal structures can prevent the metal wiring from collapsing due to stress caused by expansion of the resist during the manufacturing process of the wiring board. Therefore, according to the wiring board, the collapsing of the metal wiring can be suppressed.

[0023]

[13] Another aspect of the present invention provides a photomask for exposing a resist. The photomask includes: an exposure pattern for wiring; and a dummy exposure pattern at least a portion of which is located within 200 μm relative to the end of the exposure pattern for wiring. The dummy exposure pattern includes at least one of a grid shape in which a plurality of lines are arranged in a grid shape and a dot shape in which a plurality of dots are arranged. By using such a photomask for exposure, at least a portion of the dummy exposure pattern that does not constitute wiring in a wiring substrate can be located within 200 μm from the end of the wiring exposure pattern corresponding to the metal wiring that constitutes the wiring in the wiring substrate, and the stripped resist can be monolithic. Thus, by adjacent dummy exposure patterns (dummy metal structures), it is possible to prevent the metal wiring from tipping over due to stress caused by the expansion of the resist during the manufacturing process of the wiring substrate, thereby suppressing the reduction in the yield of the wiring substrate.

[0024]

[14] In the photomask of

[13] , the dummy exposure pattern may be formed in a manner surrounding at least a portion or all of the wiring exposure pattern. In this case, by configuring the dummy exposure pattern in this manner, it is possible to more reliably suppress the collapse of the metal wiring, thereby suppressing a reduction in the yield of the wiring substrate.

[0025]

[15] Another aspect of the present invention provides an exposure drawing data structure for an exposure device for exposing a resist layer. The exposure drawing data structure is composed of the following exposure data: wiring exposure data, which causes the exposure device to draw a wiring exposure pattern; and dummy exposure data, which causes the exposure device to draw a dummy exposure pattern, and at least a portion of the dummy exposure pattern is located within 200 μm from the end of the wiring exposure pattern. The dummy exposure pattern includes at least one of a grid shape in which a plurality of lines are arranged in a grid shape and a dot shape in which a plurality of dots are arranged. By using this exposure drawing data structure for exposure, at least a portion of the dummy exposure pattern that does not constitute a wiring electrode in a wiring substrate can be located in a region within 200 μm from the end of the wiring exposure pattern corresponding to the metal wiring that constitutes the wiring in the wiring substrate. Thus, by adjacent dummy exposure patterns, it is possible to prevent the metal wiring from falling over during the manufacturing process of the wiring substrate, thereby suppressing the reduction in the yield of the wiring substrate.

[0026] Effects of the Invention

[0027] According to the present invention, it is possible to suppress a reduction in yield due to the collapse of metal wirings such as wiring electrodes. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 It is a cross-sectional view showing an example of a method for manufacturing a wiring board according to an embodiment of the present invention.

[0029] Figure 2 It means in Figure 1 FIG. 1 is a plan view showing an example of a pattern exposed in an exposure step in a method for manufacturing a wiring board shown in FIG.

[0030] Figure 3 It is enlarged to show Figure 2 An enlarged top view of a corner S of the exposure pattern is shown.

[0031] Figure 4 It is a cross-sectional view showing an example of exposure and development of a region corresponding to a dummy exposure pattern, and shows an example in which the line width of the dummy exposure pattern is equal to or larger than the resolution of the resist.

[0032] Figure 5 It is a cross-sectional view showing an example of exposure and development of a region corresponding to a dummy exposure pattern, and shows an example in which the line width of the dummy exposure pattern is smaller than the resolution of the resist.

[0033] exist Figure 6 middle, Figure 6 (a) and (b) are diagrams showing examples of exposure patterns in which the dummy exposure patterns are different.

[0034] exist Figure 7 middle, Figure 7 (a) and (b) are diagrams showing examples of exposure patterns in which the dummy exposure pattern is further different.

[0035] Figure 8 It is a figure which shows the exposure pattern involved in Example 1.

[0036] Fig. 9 It is a figure which shows the exposure pattern concerning comparative example 1.

[0037] Fig.10 This is a photograph showing wiring electrodes of a wiring board according to Comparative Example 1.

[0038] Fig.11 This is a cross-sectional view showing a state in which a wiring electrode is tilted due to expansion of a resist in a method of manufacturing a wiring substrate. DETAILED DESCRIPTION

[0039] Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. In the following description, the same or equivalent parts are marked with the same symbols, and repeated descriptions are omitted. In addition, unless otherwise specified, the positional relationships such as up, down, left, and right are based on the positional relationships shown in the accompanying drawings. Furthermore, the dimensional ratios of the accompanying drawings are not limited to the ratios shown in the drawings.

[0040] In this specification, the term "layer" includes not only a structure of a shape formed on the entire surface but also a structure of a shape formed on a portion when viewed from above. In this specification, the term "process" includes not only an independent process but also a process that cannot be clearly distinguished from another process as long as the desired effect of the process is achieved.

[0041] In this specification, the numerical range represented by "~" indicates a range including the numerical values ​​recorded before and after "~" as the minimum value and the maximum value, respectively. In the numerical range recorded in stages in this specification, the upper limit or lower limit of the numerical range of a certain stage can be replaced by the upper limit or lower limit of the numerical range of another stage. In the numerical range recorded in this specification, the upper limit or lower limit of the numerical range can be replaced by the value shown in the embodiment.

[0042] In the present specification, "(meth)acrylic acid" means at least one of "acrylic acid" and its corresponding "methacrylic acid", and the same also applies to other similar expressions such as (meth)acrylate.

[0043] Figure 1 It is a diagram showing an example of a method for manufacturing a wiring board according to an embodiment of the present invention. Figure 2 It means in Figure 1FIG. 1 is a plan view showing an example of a pattern exposed in an exposure step in a method for manufacturing a wiring board shown in FIG. Figure 1 The manufacturing method of the wiring substrate shown includes: step A, forming a metal layer on a support; step B, forming a resist layer on the metal layer on the support; step C, exposing the resist layer; step D, developing the exposed resist layer to form an opening in the resist layer; step E, forming metal wiring in the opening; step F, removing the resist layer after forming the metal wiring; and step G, removing the metal layer except for the metal wiring.

[0044] [Process A]

[0045] In process A, if Figure 1 As shown in (a), a metal layer 20 is formed on the main surface 10a of a plate-like support body 10. The outermost layer of the support body 10 on the side where the metal layer 20 is provided is, for example, an insulating layer. The insulating layer provided as the outermost layer of the support body 10 may be, for example, an insulating resin layer such as a buildup layer. The support body 10 may include a wiring electrode 2 (reference Figure 1 (f))Connection wiring.

[0046] The metal layer 20 is a layer that functions as a seed layer for electroplating. The metal layer 20 may be, for example, a metal-plated layer formed by electroless plating, a metal foil such as copper foil, a layer formed by evaporation such as sputtering, or a metal sintered layer. The metal sintered layer is a layer formed by heating a coating film containing metal particles to sinter the metal particles. The metal layer 20 may, for example, contain at least one metal selected from the group consisting of copper, gold, silver, tungsten, molybdenum, tin, cobalt, chromium, iron, titanium, and zinc. The metal layer 20 may be a single layer or may be composed of two or more layers. The thickness of the metal layer 20 may, for example, be 0.1 to 10.0 μm.

[0047] [Process B]

[0048] In process B, if Figure 1 As shown in (b), a resist layer 30 is formed on the metal layer 20 on the support 10. The resist layer 30 can be formed of a photosensitive resist material generally used to form wiring. The resist material constituting the resist layer 30 can be a negative resist material, for example, a material containing an acrylic polymer containing carboxylic acid. In addition, the thickness of the resist layer 30 can be, for example, 5 to 200 μm.

[0049] The resist material for forming the resist layer 30 may be, for example, a photosensitive resin composition containing a binder polymer, a photopolymerizable compound having an ethylenically unsaturated bond, and a photopolymerization initiator.

[0050] The binder polymer may be, for example, a copolymer containing benzyl (meth)acrylate or a derivative thereof, styrene or a styrene derivative, an alkyl (meth)acrylate, and (meth)acrylic acid as monomer units.

[0051] Specific examples of the benzyl (meth)acrylate derivative constituting the binder polymer include 4-methylbenzyl (meth)acrylate, 4-ethylbenzyl (meth)acrylate, 4-tert-butylbenzyl (meth)acrylate, 4-methoxybenzyl (meth)acrylate, 4-ethoxybenzyl (meth)acrylate, 4-hydroxybenzyl (meth)acrylate and 4-chlorobenzyl (meth)acrylate.

[0052] Specific examples of the styrene derivative constituting the binder polymer include vinyltoluene, p-methylstyrene, and p-chlorostyrene.

[0053] The (meth)acrylic acid alkyl ester constituting the binder polymer may be an ester compound formed from (meth)acrylic acid and a linear or branched aliphatic alcohol having 1 to 12 carbon atoms. The aliphatic alcohol may have 1 to 8 carbon atoms or 1 to 4 carbon atoms. Specific examples of the (meth)acrylic acid alkyl ester include methyl (meth)acrylate, ethyl (meth)acrylate, propyl (meth)acrylate, isopropyl (meth)acrylate, butyl (meth)acrylate, tert-butyl (meth)acrylate, pentyl (meth)acrylate, hexyl (meth)acrylate, heptyl (meth)acrylate, octyl (meth)acrylate, and 2-ethylhexyl (meth)acrylate.

[0054] The ratio of the monomer units derived from benzyl (meth)acrylate or its derivatives in the binder polymer may be 50 to 80 mass%, 50 to 75 mass%, 50 to 70 mass%, or 50 to 65 mass%, based on the mass of the binder polymer. The ratio of the monomer units derived from styrene or styrene derivatives in the binder polymer may be 5 to 40 mass%, or 5 to 35 mass%, based on the mass of the binder polymer. The ratio of the monomer units derived from alkyl (meth)acrylates in the binder polymer may be 1 to 20 mass%, 1 to 15 mass%, 1 to 10 mass%, or 1 to 5 mass%, based on the mass of the binder polymer. The ratio of the monomer units derived from (meth)acrylic acid in the binder polymer may be 5 to 30 mass%, 5 to 25 mass%, or 10 to 25 mass%, based on the mass of the binder polymer.

[0055] The weight average molecular weight (Mw) of the binder polymer may be 20000 to 150000, 30000 to 100000, 40000 to 80000, or 40000 to 60000. The weight average molecular weight referred to herein represents a standard polystyrene conversion value determined by gel permeation chromatography (GPC).

[0056] The acid value (mgKOH / g) of the binder polymer may be 13 to 78, 39 to 65, or 52 to 62. The acid value herein refers to the amount (mg) of potassium hydroxide required to neutralize 1 g of the binder polymer.

[0057] Specific examples of photopolymerizable compounds having ethylenically unsaturated bonds include bisphenol A (meth)acrylate compounds, hydrogenated bisphenol A (meth)acrylate compounds, polyalkylene glycol (meth)acrylates, polyurethane monomers, pentaerythritol (meth)acrylates, and trimethylolpropane (meth)acrylates. These can be used alone or in combination of two or more. The bisphenol A di(meth)acrylate compound can be, for example, a compound represented by the following general formula (1).

[0058]

[0059] In formula (1), R each independently represents a hydrogen atom or a methyl group. EO and PO each independently represent an oxyethylene group and an oxypropylene group. m1, m2, n1, and n2 each independently represent 0 to 40, m1+m2 is 1 to 40, and n1+n2 is 0 to 20. Either EO or PO may be located on the phenolic hydroxyl side. m1, m2, n1, and n2 each independently represent the number of EO or PO. A compound in which the average m1+m2 is 5 or less and a compound in which the average m1+m2 is 6 to 40 may be combined.

[0060] The polyalkylene glycol (meth)acrylate may be a compound represented by the following formula (2). As the photopolymerizable compound having an ethylenically unsaturated bond, a bisphenol A-based di(meth)acrylate compound and a compound represented by the following formula (2) may be used in combination.

[0061]

[0062] In formula (2), R 14 and R 15 Each independently represents a hydrogen atom or a methyl group, EO and PO have the same meanings as above, and s 1 Indicates 1 to 30, r 1 and r 2 Respectively represent 0~30, r 1 +r 2 is 1 to 30. Examples of commercially available products of the compound represented by formula (2) include: 14 and R 15 Methyl, r 1 +r 2 =4(average value),s 1= 12 (average value) of a vinyl compound (manufactured by ShowaDenko Materials Co., Ltd., product name: FA-023M).

[0063] Specific examples of the photopolymerization initiator include aromatic ketones such as benzophenone, N,N'-tetramethyl-4,4'-diaminobenzophenone (Michler's ketone), N,N'-tetraethyl-4,4'-diaminobenzophenone, 4-methoxy-4'-dimethylaminobenzophenone, 2-benzyl-2-dimethylamino-1-(4-morpholinophenyl)-butanone-1, and 2-methyl-1-[4-(methylthio)phenyl]-2-morpholino-propanone-1; 2-ethylanthraquinone, phenanthrenequinone, 2-tert-butylanthraquinone, octamethylanthraquinone, 1,2-benzanthraquinone, 2,3-benzanthraquinone, 2-phenylanthraquinone, 2,3-diphenylanthraquinone, 1-chloroanthraquinone, 2-methylanthraquinone, 1,4-naphthoquinone, 9,10-phenanthrenequinone, 2-methyl-1,4- Quinones such as naphthoquinone and 2,3-dimethylanthraquinone; benzoin ether compounds such as benzoin methyl ether, benzoin ethyl ether and benzoin phenyl ether; benzoin compounds such as benzoin, methyl benzoin and ethyl benzoin; benzyl derivatives such as benzyl dimethyl ketal; 2-(o-chlorophenyl)-4,5-diphenylimidazole dimer, 2-(o-chlorophenyl)-4,5-di(methoxyphenyl)imidazole dimer, 2-(o-fluorophenyl)-4,5-diphenylimidazole dimer, 2-(o-methoxyphenyl)-4,5-diphenylimidazole dimer, 2-(p-methoxyphenyl)-4,5-diphenylimidazole dimer and other 2,4,5-triarylimidazole dimers; acridine derivatives such as 9-phenylacridine and 1,7-bis(9,9'-acridinyl)heptane; N-phenylglycine, N-phenylglycine derivatives and coumarin compounds. These may be used alone or in combination of two or more. The photopolymerization initiator may contain a 2,4,5-triarylimidazole dimer, and in particular, may contain a 2-(o-chlorophenyl)-4,5-diphenylimidazole dimer.

[0064] The content of the binder polymer in the photosensitive resin composition may be 40 to 80 parts by mass, 45 to 75 parts by mass, or 50 to 70 parts by mass relative to 100 parts by mass of the total amount of the binder polymer and the photopolymerizable compound. The content of the photopolymerization initiator in the photosensitive resin composition may be 0.01 to 5 parts by mass, 0.1 to 4.5 parts by mass, or 1 to 4 parts by mass relative to 100 parts by mass of the total amount of the binder polymer and the photopolymerizable compound.

[0065] The photosensitive resin composition may contain other components as needed. As examples of other components, photopolymerizable compounds having cyclic ether groups capable of polymerizing cations, cationic polymerization initiators, sensitizers, dyes such as malachite green, photochromogenic agents such as tribromomethylphenyl sulfone, leuco crystal violet, thermal color development inhibitors, plasticizers such as p-toluenesulfonamide, pigments, fillers, defoamers, flame retardants, stabilizers, adhesion-imparting agents, leveling agents, peeling accelerators, antioxidants, fragrances, developers, and thermal crosslinking agents can be cited. The content of other components can be about 0.01 to 20 parts by mass relative to 100 parts by mass of the total amount of the binder polymer and the photopolymerizable compound.

[0066] The total content of the binder polymer, the photopolymerizable compound, and the photopolymerization initiator in the photosensitive resin composition may be 90 to 100% by mass or 95 to 100% by mass relative to the total mass of the components excluding the solvent in the photosensitive resin composition.

[0067] To form the resist layer 30 , a resist film containing a photosensitive resin composition may be laminated on the metal layer 20 , or a photosensitive resin composition containing a solvent may be applied on the metal layer 20 and the solvent may be removed from the coating film.

[0068] The resist material (dry resist) forming the resist layer 30 may swell when being stripped by a stripping solution. For example, the swelling rate of the resist material after being immersed in a stripping solution diluted 10 times at 22° C. for 1 minute may be 30% by weight or less. Furthermore, the swelling rate of the resist material after being immersed in a stripping solution diluted 10 times at 22° C. for 1 minute may be 5% by weight or more, or may be 10% by weight or more and 20% by weight or less. In addition, the stripping solution may be a general-purpose stripping solution.

[0069] The swelling rate of this resist material can be measured using the QCM (Quartz Crystal Microbalance) method. Specifically, for example, it can be measured using a QCM (IPN 603800Rww.K, manufactured by INFICON) with a natural frequency of 5 MHz. First, a resist material as a photosensitive film is laminated on the QCM under the same conditions as the actual wiring formation process. Thereafter, light irradiation is performed under the same conditions as the actual wiring formation process. The resist material (film thickness 25 μm) of the above sample after light irradiation is placed on a QCM sensor and immersed in a beaker to which the following stripping solution is added.

[0070] Stripping solution: a solution obtained by diluting a common general-purpose stripping solution (e.g., R-100S 15 vol% + R-101 8 vol% (Mitsubishi Gas Chemical Company, Inc.) by 10 times

[0071] Measurement temperature: 22°C

[0072] Since the frequency of the QCM crystal decreases due to the swelling of the resist, the frequency change Δf with respect to the immersion time can be obtained as measurement data. Then, the weight change (Δm) is calculated according to the following Sauebrey equation (1).

[0073] Δf=Cf×Δm…(1)

[0074] Cf is the sensitivity factor of the crystal used, in units of (Hz / ng / cm 2 ). When a 5 MHz crystal is used, Cf = 0.056. In this embodiment, the weight change rate Δm / m (initial resist weight) 1 minute after the start of the measurement is set as the swelling rate (%). In addition, for example, the above swelling rate of dry resist A (product name: RD1225, manufactured by Showa Denko Materials Co., Ltd.) is 20%, and the above swelling rate of dry resist B (product name: RY5125, manufactured by Showa Denko Materials Co., Ltd.) is 15%. It is also possible to appropriately provide a dry resist having the above swelling rate set to about 10%.

[0075] [Process C]

[0076] In step C, when the formation of the resist layer 30 is completed, the resist layer 30 is exposed. Figure 2 In the manner of exposure pattern 40 of the structure shown in FIG. 1 , a photomask (also called a photomask) is placed above resist layer 30 and a predetermined exposure is performed. By this exposure, Figure 2 As shown, the resist layer 30 is exposed to a wiring exposure pattern 41 (wiring exposure pattern) corresponding to the wiring electrode 2 (metal wiring) and a dummy exposure pattern 42 not corresponding to the wiring electrode. Figure 1 (b) shows the resist portion 31 exposed by the wiring exposure pattern 41 and the resist portion 32 exposed by the dummy exposure pattern 42 .

[0077] The wiring exposure pattern 41 is a portion having a plurality of shielding portions 41a corresponding to each of the plurality of wiring electrodes 2. The shielding portion 41a is a region for shielding the light irradiated when exposing with light of a specified wavelength so that the corresponding region in the resist layer 30 is not exposed. By exposing a portion of the resist layer 30 in this way, a resist layer 30 in which a part of the reaction has been carried out is formed. The exposure can be carried out by a common method known to those skilled in the art. In the case where the resist layer 30 is formed of a negative resist, the solubility of the exposed portion relative to the developer is reduced, and the exposed region remains by development. That is, the region shielded by the shielding portion 41a is dissolved by the developer.

[0078] The dummy exposure pattern 42 is an exposure pattern formed in a manner surrounding the entirety of the wiring exposure pattern 41, and is formed by a grid shape in which a plurality of lines are arranged in a grid shape. By arranging the dummy exposure pattern 42 of such a grid shape outside the wiring exposure pattern 41, the resist layer 30 outside the wiring exposure pattern 41 can be divided into small parts. As a result, the stripping piece in the stripping process of the resist described later can be made smaller (singularized), and the stripping of the resist can be accelerated. In addition, the dummy exposure pattern 42 is not limited to Figure 2 The structure shown can take various forms as described later.

[0079] In more detail, Figure 3 As shown, the dummy exposure pattern 42 is arranged close to the end 41b of the outer peripheral side of the wiring exposure pattern 41, and is formed in a manner that the distance D between the end 41b of the outer peripheral side of the wiring exposure pattern 41 and the dummy exposure pattern 42 (the innermost peripheral part) is within 200μm. In other words, at least a portion of the dummy exposure pattern 42 is located in a region within 200μm from the end 41b of the wiring exposure pattern 41. The distance D between the wiring exposure pattern 41 and the dummy exposure pattern 42 can be, for example, less than 150μm, less than 100μm, or less than 50μm. As an example, the distance D is 70 to 80μm.

[0080] The spacing distance A (the distance between the center lines of the two) between the linear portions 42a and 42a of the grid forming the virtual exposure pattern 42 can be, for example, greater than 1 μm and less than 100 μm, or greater than 1 μm and less than 75 μm, or greater than 1 μm and less than 50 μm. As an example, the spacing distance A is 50 μm. In addition, the line width W of each linear portion 42a can be greater than 1 μm and less than 20 μm, or greater than 1 μm and less than 10 μm, or greater than 1 μm and less than 5 μm. As an example, the line width W is 5 μm. Similar to the shielding portion 41a, the linear portion 42a is an area for shielding the light irradiated when exposing with light of a specified wavelength so that the corresponding area in the resist layer 30 is not exposed.

[0081] As described above, the exposure in this embodiment can be exposure using a photomask serving as a photomask, but the exposure pattern can also be drawn on the resist layer 30 by a light beam of a laser or electron gun of an exposure device based on exposure data (exposure drawing data structure) having wiring exposure data corresponding to the wiring exposure pattern 41 and dummy exposure data corresponding to the dummy exposure pattern 42.

[0082] [Process D]

[0083] In process D, if Figure 1 As shown in (c), the exposed resist layer 30 is developed to form a plurality of openings 35, 35a on the resist layer 30. The opening 35 is a portion corresponding to the wiring electrode 2 in the wiring substrate 1, and the opening 35a is a portion corresponding to the dummy metal structure 2a in the wiring substrate 1. In the development process, after exposure in process C, the resist layer 30 is placed for a predetermined time (for example, 30 minutes), and the protective film of the resist film is peeled off, and the development process is performed using a developer such as a 1.0% sodium carbonate aqueous solution. As a result, the unexposed portion is dissolved to form openings 35, 35a. When the openings 35, 35a are formed, the metal layer 20, which serves as a seed layer during the plating process, is exposed in the openings 35, 35a. The openings 35, 35a are, for example, recessed portions having a width of about 5 μm in the short side direction, and extending in a direction perpendicular to the paper surface. The opening 35 and the opening 35 a may be of the same size, or the width or diameter of the opening 35 a may be larger than that of the opening 35 , or the width or diameter of the opening 35 a may be smaller than that of the opening 35 .

[0084] By developing the exposed resist layer 30 as described above, the resist layer 30 including the openings 35 and 35a exposing the metal layer 20 is formed. The development can be performed by a common method known to those skilled in the art. The developer used for development can be an alkaline aqueous solution such as a sodium carbonate aqueous solution.

[0085] In addition, as described later, when the line width of the dummy exposure pattern 42 is below the resolution of the resist, the opening 35a formed by development is incomplete, and the metal layer 20 is not exposed in the opening 35a. At this time, although the dummy metal structure 2a is not formed at the position corresponding to 35a in the subsequent process, the solution penetrates from the linear portion of the unexposed dummy exposure pattern 42 during the stripping process, and the resist layer 30 is easily fragmented with the dummy portion as the boundary. That is, the portion corresponding to the opening 35a becomes the resist portion that is easily fragmented during the next stripping process. As a result, the resist is monolithic during stripping, and the stress applied to the wiring becomes smaller, so that even if the dummy metal structure is not formed, the yield rate can be improved. In addition, by having a dummy pattern, the penetration of the solution becomes faster, so the stripping process time can also be shortened.

[0086] [Process E]

[0087] In process E, if Figure 1 As shown in (d), the metal layer 20 exposed in the plurality of openings 35, 35a is used as a seed layer, and the metal layers 21, 21a are formed by electroplating, thereby forming the wiring electrodes 2 and the dummy metal structure 2a in the plurality of openings 35, 35a. In this process, the openings 35, 35a are filled by copper plating, for example. The metal layer 21 can be formed by electroplating, electroless plating, injection and sintering of a metal-containing paste, and a combination thereof.

[0088] The metal forming the metal layer 21 may include, for example, at least one metal selected from the group consisting of copper, gold, silver, nickel, tin, titanium, tungsten, molybdenum, cobalt, chromium, iron, and zinc. The metal layers 21 and 21a may be a single layer or may be composed of two or more layers. The thickness of the metal layers 21 and 21a may be, for example, 0.1 to 10.0 μm, or 1 to 150 μm.

[0089] The metal layers 21 and 21a may include linear portions, and the width thereof may be 1 to 20 μm. In other words, the width / spacing (L / S) of the wiring electrode 2 and the dummy metal structure 2a formed by the metal layers 21 and 21a may be 1 μm / 1 μm to 20 μm / 20 μm. According to the method involved in this embodiment, since the dummy exposure pattern 42 is included and the exposure pattern is used for exposure, even for such fine wiring, defects such as peeling and tilting of the wiring are hardly generated.

[0090] The metal layers 21 and 21a may include a circular portion, and the diameter may be 5 to 100 μm, or the diameter may be less than 20 μm. According to the method involved in this embodiment, since the dummy exposure pattern 42 is included and the exposure pattern is used for exposure, even for such fine wiring, defects such as peeling and tilting of the wiring are almost not generated. In addition, as described above, when the line width of the dummy exposure pattern 42 is less than the resolution of the resist and the opening 35a is not completely formed, the metal layer 21a and the dummy metal structure 2a are not formed.

[0091] [Process F]

[0092] In step F, when the formation of the metal layers 21, 21a in the openings 35, 35a is completed, Figure 1 As shown in (e), the resist layer 30 is peeled off from the metal layer 20. This peeling is performed using a commonly used stripping liquid. Examples of commonly used stripping liquids are as described above.

[0093] [Process G]

[0094] In process G, if Figure 1 As shown in (f), the metal layer 20 (i.e., the portion other than the region bonded to the metal layer 21, 21a) exposed by the peeling of the resist layer 30 is removed by etching or the like. Thus, the wiring electrode 2 consisting of the metal layer 20 and the metal layer 21 remaining on the support 10 is formed, and the dummy metal structure 2a consisting of the metal layer 20 and the metal layer 21a is formed. In addition, the dummy metal structure 2a is a component for preventing the wiring electrode 2 from falling due to the resist, and therefore, it is preferably electrically insulated from other electrodes (e.g., the wiring electrode 2 or the electrode in the support 10, etc.).

[0095] Through the above process, Figure 1 As shown in (f), a wiring substrate 1 having a support 10, a plurality of wiring electrodes 2 disposed on the support 10, and a plurality of dummy metal structures 2a can be obtained. Similar to the dummy exposure pattern 42, the dummy metal structure 2a is formed in a manner surrounding the plurality of wiring electrodes 2, and at least a portion of the dummy metal structure 2a is located in a region within 200 μm from the wiring electrode closest to the dummy metal structure 2a among the plurality of wiring electrodes 2. Furthermore, the wiring substrate 1 may be a structure in which the dummy metal structure 2a produced according to the dummy exposure pattern 42 is not formed. The following is an explanation.

[0096] refer to Figure 4 and Figure 5 The exposure step of step C to the electrode forming step of step E will be described in more detail. Figure 4It is a cross-sectional view showing an example of exposure and development of a region corresponding to a dummy exposure pattern, and shows an example in which the width of the dummy exposure pattern is equal to or larger than the resolution of the resist. Figure 4 The method is the same as above. Figure 5 4 is a cross-sectional view showing an example of exposure and development of a region corresponding to a dummy exposure pattern, and shows an example when the width of the dummy exposure pattern is smaller than the resolution of the resist. In addition, the following mainly describes the method for manufacturing the exposure portion based on the dummy exposure pattern 42, and the method for manufacturing the exposure portion based on the wiring exposure pattern 41 is the same as the above-mentioned manufacturing method, and the description thereof is omitted.

[0097] When the line width W of the dummy exposure pattern 42 (linear portion 42a) is equal to or greater than the resolution of the resist forming the resist layer 30, after step A and step B, first, Figure 4 As shown in (a), the resist layer 30 is exposed using a dummy exposure pattern 42 having a wide width (process C). Figure 4 As shown in (b) and (c) of FIG. 1 , a development step of step D and an electrode formation step of step E are performed to form a metal layer 21 a for the dummy metal structure 2 a.

[0098] Afterwards, if Figure 4 As shown in (d), in the resist stripping step of step F, the resist layer 30 located outside the metal layer 21a for the dummy metal structure 2a is stripped. During the stripping, the resist layer 30 becomes a tiny resist piece 30a and is singulated and stripped. At this time, the wiring electrode 2 close to the dummy metal structure 2a is protected by the dummy metal structure 2a to avoid being affected by the stress caused by the resist expansion of the resist layer 30, and tilting or falling can be suppressed. In addition, since the resist layer 30 itself becomes a small piece, the stress caused by the expansion of the resist is reduced, and in this regard, the tilting or falling of the wiring electrode 2 can also be suppressed.

[0099] On the other hand, when the width of the dummy exposure pattern 42 is smaller than the resolution of the resist forming the resist layer 30, after step A and step B, first, as shown in FIG. Figure 5 As shown in (a), the resist layer 30 is exposed using a dummy exposure pattern 42 having a narrow width (process C). Figure 5 As shown in (b), the development step of step D is performed. At this time, since the line width W of the linear portion 42a of the dummy exposure pattern 42 is smaller than the resolution of the resist, the opening 35a formed by the development based on the developer is incomplete, and the metal layer 20 is not exposed in the opening 35a. In addition, since the metal layer 20 is not exposed, Figure 5 As shown in (c), no dummy metal structure is formed in the electrode forming step in step E.

[0100] Afterwards, if Figure 5 As shown in (d), in the resist stripping step of process F, the resist layer 30 is stripped. During the stripping, the resist layer 30 becomes tiny resist sheets 30a and is singulated and stripped. The lengths of the short sides and long sides of the singulated stripped resist sheets are preferably greater than 1 μm and less than 100 μm, can be greater than 1 μm and less than 75 μm, or can be greater than 1 μm and less than 50 μm. That is, the dummy exposure pattern 42 used in the exposure pattern is a pattern that can expose the resist layer 30 in a manner that makes the lengths of the short sides and long sides of the singulated stripped resist sheets less than 100 μm, less than 75 μm, or less than 50 μm. In the case described above, the wiring electrode 2 near the dummy area 42a formed by the dummy exposure pattern 42 is reduced in stress caused by the expansion of the resist because the surrounding resist layer 30 is reduced in pieces, and the wiring electrode 2 can be suppressed from tilting or falling even if the dummy metal structure 2a is not provided. Even if the metal layer 20 is not exposed in the dummy area 42a, since the curing of the dummy area 42a is weaker than that of the exposed part, the stripping liquid can easily penetrate into this part, and the resist is reduced in pieces and peeled off, so that the stress relief effect during the above-mentioned peeling can be fully obtained. Furthermore, in the case where the metal layer 20 is not exposed in the dummy area 42a, plating will not be deposited in the dummy area 42a, and plating can be deposited only in the wiring part required by the wiring substrate to form the wiring electrode 2. That is, at this time, a structure without stress can be obtained. Figure 1 The wiring substrate of the dummy metal structure 2a shown in (f). Figure 4 The stripping resist sheets singulated as shown may also be Figure 5 The same length of the stripped resist sheet is shown, and Figure 4 The dummy exposure pattern 42 in FIG. 4 is also set to be such a peeling resist sheet.

[0101] As described above, in the manufacturing method of the wiring substrate involved in the present embodiment, at least a part of the dummy exposure pattern 42 that does not constitute the wiring electrode 2 is located in a region within 200 μm from the end 41 b of the wiring exposure pattern 41 corresponding to the wiring electrode 2 that constitutes the wiring in the wiring substrate 1. At this time, by providing a dummy metal structure 2a in the region exposed by the dummy exposure pattern 42, or by providing the dummy exposure pattern 42 to fragment the resist layer 30 in the region, the stress of the resist on the wiring electrode 2 can be reduced. Thus, by the adjacent dummy exposure pattern 42 (or dummy metal structure 2a), the wiring electrode 2 can be prevented from being tilted due to the stress of the resist in the manufacturing process of the wiring substrate 1. Therefore, according to the manufacturing method of the wiring substrate, the reduction of the yield can be suppressed.

[0102] Furthermore, in the method for manufacturing the wiring substrate according to the present embodiment, the portion of the resist layer 30 exposed by the dummy exposure pattern 42 is singulated and removed in the step of removing the resist layer 30. In this way, by singulating the resist layer 30, it is possible to reduce the stress of the resist on the wiring electrode 2 provided in the area exposed by the wiring exposure pattern 41, and more reliably suppress the wiring electrode 2 from falling due to the peeling of the resist, thereby suppressing the reduction in the yield rate.

[0103] Furthermore, in the method for manufacturing the wiring substrate according to the present embodiment, the dummy exposure pattern 42 may include a grid shape in which a plurality of lines are arranged in a grid shape. In this case, by more reliably singulating the portion of the resist layer 30 exposed by the dummy exposure pattern 42, it is possible to more reliably suppress the metal wiring such as the wiring electrode from falling due to the resist peeling, thereby suppressing the reduction in the yield rate.

[0104] Furthermore, in the manufacturing method of the wiring substrate involved in the present embodiment, the dummy exposure pattern 42 has a linear portion 42a, and the line width W of the linear portion 42a can be less than the resolution of the resist constituting the resist layer 30. At this time, although the dummy metal structure is not formed according to the dummy exposure pattern 42, since the exposed resist layer 30 is easily divided and fragmented, it is possible to suppress the wiring electrode 2 from falling down when the resist is peeled off. Therefore, according to this manufacturing method, it is possible to suppress the reduction of the yield. Moreover, in this manufacturing method, it is difficult to form a dummy metal structure according to the dummy exposure pattern 42, so the structure of the unnecessary part will not be left in the manufactured wiring substrate 1.

[0105] Furthermore, in the manufacturing method of the wiring substrate involved in the present embodiment, in the process of forming the resist layer 30, the resist layer 30 is formed on the metal layer 20 provided on the support 10, in the process of forming the opening, the metal layer 20 is exposed from the opening 35, and in the process of forming the wiring, the wiring electrode 2 is formed by electroplating on the metal layer 20 exposed in the opening 35. At this time, the metal wiring is formed by the SAP method or the MSAP method, and a finer wiring electrode 2 can be easily formed. Therefore, according to the manufacturing method of the wiring substrate, it is possible to achieve the miniaturization or reduction of the diameter of the metal wiring. Moreover, in the manufacturing method, the opening that exposes the metal layer during development may not be formed in the portion of the resist layer 30 exposed by the dummy exposure pattern 42. At this time, since the opening that exposes the metal layer is not formed, the dummy metal structure is not formed according to the dummy exposure pattern 42, and the structure of the unnecessary part is not left in the manufactured wiring substrate.

[0106] Furthermore, in the manufacturing method of the wiring substrate involved in the present embodiment, the dummy exposure pattern 42 may be a pattern that can expose the resist layer 30 in such a way that the length of the long side of the stripped resist sheet that is singulated becomes 100 μm or less. At this time, by making the resist layer 30 small, the stress of the resist on the metal wiring provided in the area exposed by the wiring exposure pattern 41 can be reduced. Thus, by the adjacent dummy exposure patterns 42, the metal wiring can be prevented from falling due to the stress of the resist in the manufacturing process of the wiring substrate. Therefore, according to the manufacturing method of the wiring substrate, the reduction of the yield rate can be suppressed.

[0107] Furthermore, in the method for manufacturing a wiring substrate according to the present embodiment, the dummy exposure pattern 42 surrounds the entire or a portion of the wiring exposure pattern 41. The outer portion of the wiring electrode 2 tends to easily fall down due to resist stripping, but by configuring the dummy exposure pattern 42 in this manner, the wiring electrode 2 can be more reliably prevented from falling down, thereby preventing a reduction in the yield rate.

[0108] Furthermore, in the method for manufacturing the wiring substrate according to the present embodiment, the width or diameter of the short side direction of the wiring electrode 2 can be 20 μm or less. In this case, the wiring electrode 2 can be made finer or smaller, and even when fine or small wiring electrodes are provided, the wiring electrode can be prevented from falling, thereby preventing a reduction in the yield rate.

[0109] Furthermore, in the method for manufacturing the wiring substrate according to the present embodiment, in the step of exposing the resist layer 30, the resist layer 30 is exposed using a photomask including the wiring exposure pattern 41 and the dummy exposure pattern 42. In this case, since the time of each exposure step can be reduced, the manufacturing efficiency of the wiring substrate 1 can be improved. Furthermore, since the variation between the exposure steps can be reduced, the manufacturing yield of the wiring substrate 1 can be improved.

[0110] Furthermore, in the manufacturing method of the wiring substrate involved in the present embodiment, in the step of exposing the resist layer 30, the resist layer 30 can be exposed by drawing according to the exposure drawing data including the wiring exposure pattern 41 and the dummy exposure pattern 42. In this case, since components such as a photomask are not required, the corresponding manufacturing cost can be reduced. Furthermore, by making or correcting the exposure drawing data, it is possible to easily make or correct the exposure pattern.

[0111] The embodiments of the present invention have been described above, but the present invention is not limited to the above embodiments and can be appropriately modified within the scope of the present invention. For example, the exposure pattern 40 can be Figure 6 and Figure 7 The exposure pattern of the structure shown. Figure 6 As shown in (a), as an exposure pattern, an exposure pattern 40A having a dummy exposure pattern 42A can be used, which surrounds a portion of the wiring exposure pattern 41A corresponding to the linear wiring electrode 2 (in three directions in the example of the figure). The dummy exposure pattern 42A can be in a grid shape. At this time, at least a portion of the dummy exposure pattern 42A is located in an area within 200 μm from the end of the wiring exposure pattern 41A corresponding to the wiring electrode 2, and the portion of the resist layer 30 exposed by the dummy exposure pattern 42A is removed by singulation in the process of removing the resist layer 30. Thereby, the wiring electrode 2 is suppressed from tipping over. The same is true in the following modified examples.

[0112] And, if Figure 6 As shown in (b), as an exposure pattern, an exposure pattern 40B having a dummy exposure pattern 42B can be used, and the dummy exposure pattern 42B surrounds a portion of the wiring exposure pattern 41A corresponding to the linear wiring electrode 2 (in three directions in the example of the figure). The dummy exposure pattern 42B is formed in a manner that a plurality of dot-shaped shading portions are provided to cover a portion of the wiring exposure pattern 41A. The dot-shaped shading portions can be geometric patterns such as circles, triangles, quadrilaterals, cross-shaped marks, and combinations thereof when viewed from above. In this way, as a dummy exposure pattern, various patterns can be used, as long as the structure can accelerate the stripping of the resist of the resist layer 30 or make the stripping sheet smaller, various patterns can be used. At this time, at least a portion of the dummy exposure pattern 42B is located in an area within 200 μm from the end of the wiring exposure pattern 41A corresponding to the wiring electrode 2, and the portion of the resist layer 30 exposed by the dummy exposure pattern 42B is singulated and removed in the process of removing the resist layer 30. In addition, similarly to the above, the wiring electrodes 2 mentioned here are wiring electrodes formed for horizontal electrical connection on a chip or a substrate, for example.

[0113] And, if Figure 7 As shown in (a), the exposure pattern 40C may be provided with a dummy exposure pattern 42C in a manner surrounding the entire terminal exposure pattern 41C (wiring exposure pattern) corresponding to the circular terminal electrode 3 (metal wiring). The dummy exposure pattern 42C is configured to double surround the terminal exposure pattern 41C. Figure 7As shown in (b), as an exposure pattern, in addition to the structure of the dummy exposure pattern 42C, an exposure pattern 40D having a structure in which an inner dummy exposure pattern 42D (corresponding to the inner dummy metal structure) is located between a plurality of terminal electrodes 3 can also be used. In this case, the spacing between the terminal electrodes 3 can be widened. In addition, the terminal electrode 3 described herein is, for example, a terminal electrode formed for electrical connection in a vertical direction. The terminal electrode 3 can be, for example, a protruding electrode formed for electrical connection in a vertical direction. In this modification, at least a portion of the dummy exposure pattern 42C or the inner dummy exposure pattern 42D is located in an area within 200 μm from the end of the terminal exposure pattern 41C corresponding to the wiring electrode 2, and the portion of the resist layer 30 exposed by the dummy exposure pattern 42C or the inner dummy exposure pattern 42D is singulated and removed in the process of removing the resist layer 30.

[0114] Example

[0115] Hereinafter, the present invention will be described in more detail with reference to Examples, but the present invention is not limited to these Examples.

[0116] [Mask preparation]

[0117] As Example 1, a photomask 40F having a Cr shielding portion was prepared (refer to Figure 8 ). As the design pattern of the photomask, a linear wiring structure (wiring exposure pattern 41F) with a width / spacing (L / S) of 5 μm / 5 μm is provided. In addition, a dummy wiring with a line width of 30 μm is provided outside the fine wiring (dummy exposure pattern 42F). The closest distance D between the dummy exposure pattern 42F and the wiring exposure pattern 41F (reference Figure 3 ) is 20μm.

[0118] [Formation of Wiring Layer]

[0119] [Formation of Resist Layer]

[0120] A negative resist film (Showa Denko Materials Co., Ltd., thickness 25 μm) was laminated on a 150 mm square, 0.81 mm thick copper-clad laminate (Showa Denko Materials Co., Ltd.) for a printed wiring board using a laminator (LAMI CORPORATION INC., GK-13DX). The lamination temperature was set to 110°C, the lamination speed was set to 1.4 m / min, and the lamination pressure was set to 0.5 MPa. After lamination, it was allowed to stand for 30 minutes, and an i-ray stepper (CERMAPRECISION, INC., S6Ck) and a negative photomask were used to expose the resist film. The illumination was set to 33 mW / cm2 , the exposure is set to 120mJ / cm 2 The negative photomask used was the negative photomask described above. The resist film used had a swelling rate of 15 wt % or less after being immersed in a 10-fold diluted stripping solution (described later) at 22° C. for 1 minute.

[0121] After exposure, it was placed for 60 minutes, the protective film of the resist film was peeled off, and a 1.0% sodium carbonate aqueous solution was used for development, thereby forming a linear pattern of width / spacing (L / S) = 5μm / 5μm exposing the seed layer and a resist layer having a virtual linear pattern of line width 30μm on the outside of the above-mentioned fine wiring. Regarding development, by using an ultra-high pressure rotary developing device (Blue Ocean Technology., Ltd. system), the developer was sprayed for 260 seconds, and then pure water was sprayed as a rinse solution for 100 seconds. The development temperature was 30°C, the rotation speed was 500rpm, the injection pressure was 0.18MPa, the moving distance of the spray nozzle head was 7.2cm, and the moving speed of the spray nozzle head was 10cm / s.

[0122] [Cleaning agent pretreatment]

[0123] The substrate formed with the seed layer and the resist layer was immersed in a 100 mL / L aqueous solution of an acidic cleaner (manufactured by JCU CORPORATION, PB-242D) at 45° C. for 5 minutes. Thereafter, the substrate formed with the seed layer and the resist layer was immersed in pure water at 50° C. for 1 minute, in pure water at 25° C. for 1 minute, and in a 10% sulfuric acid aqueous solution at 25° C. for 1 minute.

[0124] [Cu plating]

[0125] After that, the copper-clad laminate with the resist layer after pickling treatment was immersed in an electrolytic copper plating solution and electrolytic copper plating was performed at 25° C. for 10 minutes. As the electrolytic copper plating solution, a mixed solution of 120 g / L of copper sulfate pentahydrate, 7.3 L of an aqueous solution of 220 g / L of 96% sulfuric acid, 0.26 mL of hydrochloric acid, 92 mL of Top Lucina NSV-1 (product name, OKUNO CHEMICAL INDUSTRIES CO., LTD.), 11.5 mL of Top Lucina NSV-2 (product name, OKUNO CHEMICAL INDUSTRIES CO., LTD.), and 23 mL of Top Lucina NSV-3 (product name, OKUNO CHEMICAL INDUSTRIES CO., LTD.) was used.

[0126] [Resist stripping]

[0127] The resist layer present on the substrate after the electroplating treatment is stripped to form a substrate with copper wiring. Regarding stripping, the stripping liquid is sprayed for 300 seconds using a photolithography developing device AD-3000 (manufactured by TAKIZAWA SANGYO KK), and then pure water is sprayed as a rinse liquid for 30 seconds. The stripping temperature is 50°C, the rotation speed is 500rpm, the spray pressure is 0.18MPa, the moving distance of the spray nozzle head is 7.2cm, and the moving speed of the spray nozzle head is 10cm / s. As the stripping liquid, a mixed solution of 150mL / L of A-06A (product name, manufactured by Kao Corporation.) and 80mL / L of A-06B (product name, manufactured by Kao Corporation.) was used.

[0128] (Comparative Example 1)

[0129] [Mask preparation]

[0130] In Comparative Example 1, a photomask 140A having a Cr shielding portion was prepared. Fig. 9 As shown, a linear wiring structure (wiring exposure pattern 141F) having a width / spacing (L / S) of 5 μm / 5 μm is formed. Fig. 9 The photomask 140A is shown without forming a dummy pattern therein.

[0131] [Formation of Wiring Layer]

[0132] Formation of a resist layer, cleaning agent pretreatment, formation of Cu plating, and resist stripping were performed under the same conditions as in Example 1 except that the design of the photomask used was different.

[0133] [Evaluation of the observation of the dumping]

[0134] The formed copper wiring was observed using an optical microscope. The number of wiring lines that were observed to have collapsed and the ratio of the wiring lines that collapsed to the number of designed wiring lines are summarized in Table 1. Fig.10 A photograph of the wiring electrodes according to Comparative Example 1 is shown in FIG.

[0135] [Table 1]

[0136] Example 1 Comparative Example 1 Number of dumpings (items) 0 / 24 5 / 10 Dumping ratio (%) 0 50

[0137] As shown in Table 1, it was confirmed that by including a dummy exposure pattern adjacent to the wiring exposure pattern in the exposure design pattern, it was possible to suppress the collapse of the high vertical and horizontal plating pattern, thereby improving the yield.

[0138] Explanation of symbols

[0139] 1-wiring substrate, 2-wiring electrode, 2a-dummy metal structure, 3-terminal electrode, 10-support body, 20-metal layer, 30-resist layer, 35, 35a-opening, 40, 40A, 40B, 40C, 40D-exposure pattern, 40F-photomask, 41, 41A-wiring exposure pattern, 41C-terminal exposure pattern, 41b-end, 42, 42A, 42B, 42C, 42D-dummy exposure pattern.

Claims

1. A method for manufacturing a wiring substrate, the method comprising: forming a resist layer on a support; A step of exposing the resist layer to light; A process of developing the exposed resist layer to form an opening on the resist layer; forming a metal wiring in the opening; and a step of removing the resist layer after forming the metal wiring, In the step of exposing the resist layer, an exposure pattern for wiring corresponding to the metal wiring and a dummy exposure pattern not corresponding to the metal wiring are exposed on the resist layer. At least a portion of the dummy exposure pattern is located in a region within 200 μm from an end portion of the wiring exposure pattern.

2. The method for manufacturing a wiring board according to claim 1, wherein: The portions of the resist layer exposed by the dummy exposure pattern are separated and removed in the step of removing the resist layer.

3. The method for manufacturing a wiring board according to claim 1 or 2, wherein: The dummy exposure pattern includes a grid shape in which a plurality of lines are arranged in a lattice shape.

4. The method for manufacturing a wiring board according to any one of claims 1 to 3, wherein: The dummy exposure pattern includes a dot shape in which a plurality of dots are arranged.

5. The method for manufacturing a wiring board according to any one of claims 1 to 4, wherein: The dummy exposure pattern has linear portions or dots, The width of the linear portion or the dot is equal to or smaller than the resolution of the resist constituting the resist layer.

6. The method for manufacturing a wiring board according to claim 5, wherein: In the step of forming the resist layer, the resist layer is formed on the metal layer provided on the support. In the step of forming the opening, the metal layer is exposed from the opening. In the step of forming the metal wiring, the metal wiring is formed by electroplating on the metal layer exposed in the opening. In the portion of the resist layer exposed by the dummy exposure pattern, an opening through which the metal layer is exposed during development is not formed.

7. The method for manufacturing a wiring board according to any one of claims 1 to 6, wherein: The dummy exposure pattern is a pattern capable of exposing the resist layer so that the length of the long side of the separated peeling resist sheet becomes 100 μm or less.

8. The method for manufacturing a wiring board according to any one of claims 1 to 7, wherein: The dummy exposure pattern surrounds at least a portion or the entirety of the wiring exposure pattern.

9. The method for manufacturing a wiring board according to any one of claims 1 to 8, wherein: The resist layer is formed of a negative resist, The resist has a swelling rate of 30% by weight or less after being immersed in a 10-fold diluted stripping solution at 22° C. for 1 minute.

10. The method for manufacturing a wiring board according to any one of claims 1 to 9, wherein: In the step of exposing the resist layer, the resist layer is exposed using a photomask including the wiring exposure pattern and the dummy exposure pattern.

11. The method for manufacturing a wiring board according to any one of claims 1 to 9, wherein: In the step of exposing the resist layer, the resist layer is exposed by performing drawing according to exposure drawing data including the wiring exposure pattern and the dummy exposure pattern.

12. A wiring substrate comprising: a support; a plurality of metal wirings disposed on the support; and at least one dummy metal structure surrounding at least a portion of the plurality of metal wirings, The width of the metal wiring in the short side direction is 20 μm or less, At least a portion of the dummy metal structure is located within 200 μm from a wiring electrode closest to the dummy metal structure among the plurality of metal wirings. The dummy metal structure includes at least one of the following: a grid-shaped dummy metal structure in which a plurality of wires are arranged in a grid shape, an inner dummy metal structure located between the plurality of metal wirings, and a dummy metal structure in which a plurality of point-shaped electrodes are arranged in a manner surrounding at least a portion of the plurality of metal wirings.

13. A photomask for exposing a resist, The photomask comprises: an exposure pattern for wiring; and a dummy exposure pattern at least a portion of which is located within 200 μm relative to an end of the exposure pattern for wiring. The dummy exposure pattern includes at least one of a grid shape in which a plurality of lines are arranged in a lattice shape and a dot shape in which a plurality of dots are arranged.

14. The photomask according to claim 13, wherein: The dummy exposure pattern is formed so as to surround at least a portion or the entirety of the wiring exposure pattern.

15. An exposure data structure for use in an exposure device for exposing a resist layer, the exposure data structure comprising the following exposure data: Wiring exposure data, causing the exposure device to draw a wiring exposure pattern; and dummy exposure data, causing the exposure device to draw a dummy exposure pattern, wherein at least a portion of the dummy exposure pattern is located within 200 μm from an end of the wiring exposure pattern, in, The dummy exposure pattern includes at least one of a grid shape in which a plurality of lines are arranged in a lattice shape and a dot shape in which a plurality of dots are arranged.

Images