Printed circuit board simulation method, system and storage medium

Abstract

The present invention relates to the technical field of circuit board simulation, and in particular to a printed circuit board simulation method, system and storage medium. The method comprises the following steps: obtaining circuit board design data, and performing structural analysis to obtain a circuit board component topological structure model; performing working condition simulation according to the circuit board component topological structure model to obtain circuit board working condition simulation data; performing signal abnormal component structure division based on the circuit board working condition simulation data to obtain signal abnormal component structure data; performing layout optimization according to the signal abnormal component structure data to obtain an optimized circuit board component structure model, and performing simulation to obtain electromagnetic interference simulation data; performing simulation according to the electromagnetic interference simulation data to obtain a circuit board heat flow distribution diagram, and performing heat dissipation optimization to obtain an optimal circuit board component structure model; obtaining a circuit board printing parameter set, and performing printing strategy analysis to obtain a circuit board printing strategy. The present invention can improve the efficiency and reliability of circuit board design.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit board simulation, and in particular to a printed circuit board simulation method, system and storage medium. Background Art

[0002] With the rapid development of electronic products, the design and optimization of printed circuit boards (PCBs) as their core components are becoming increasingly complex. Traditional PCB design and simulation methods mainly rely on manual input of parameters and calculations, which is time-consuming, inaccurate, and difficult to meet the needs of high-frequency signal transmission. The PCB design process usually includes circuit schematic design, layout design, and subsequent simulation and verification, but the traditional design process often lacks systematicity and is prone to design defects. In addition, traditional simulation tools mostly focus on electrical characteristics analysis, such as DC characteristics and AC characteristics, but lack sufficient consideration for the behavior of complex circuits in high-frequency and high-speed environments. As the signal frequency increases, problems such as signal integrity, delay, and crosstalk in PCBs become more prominent. Existing technologies often cannot effectively handle signal integrity and electromagnetic interference (EMI) problems in multi-layer PCB design, resulting in signal distortion and performance degradation. This not only affects the overall circuit performance, but may also reduce the reliability and stability of the product. Summary of the invention

[0003] Based on this, it is necessary for the present invention to provide a printed circuit board simulation method, system and storage medium to solve at least one of the above technical problems.

[0004] To achieve the above object, a printed circuit board simulation method comprises the following steps:

[0005] Step S1: Acquire circuit board design data, and divide the circuit board design data into circuit board component hierarchies, thereby obtaining circuit board component hierarchical data; perform circuit board component topological structure analysis based on the circuit board component hierarchical data, thereby obtaining a circuit board component topological structure model;

[0006] Step S2: extracting circuit board structural material features from the circuit board design data to obtain circuit board structural material data, and performing circuit board operating condition simulation based on the circuit board component topological structure model and the circuit board structural material data to obtain circuit board operating condition simulation data;

[0007] Step S3: performing signal integrity evaluation based on the circuit board working condition simulation data to obtain circuit board signal integrity data, and performing signal abnormal component structure division on the circuit board component topology structure model according to the circuit board signal integrity data to obtain signal abnormal component structure data;

[0008] Step S4: Optimizing the multi-layer layout of the circuit board according to the signal abnormality component structure data, thereby obtaining an optimized circuit board component structure model, and performing electromagnetic interference statistical simulation on the optimized circuit board component structure model, thereby obtaining electromagnetic interference simulation data;

[0009] Step S5: performing a circuit board thermal management simulation according to the electromagnetic interference simulation data to obtain a circuit board heat flow distribution diagram, and performing multi-layer circuit board heat dissipation optimization on the optimized circuit board component structure model according to the circuit board heat flow distribution diagram to obtain an optimal circuit board component structure model;

[0010] Step S6: Obtain a circuit board printing parameter set, and perform circuit board printing strategy analysis on the optimal circuit board component structure model according to the circuit board printing parameter set, thereby obtaining a circuit board printing strategy.

[0011] The present invention divides the circuit board design data into components, which can effectively improve the systematicness of the design and make the subsequent simulation and analysis more orderly. Through the component topology structure analysis, the structural relationship of the circuit board can be intuitively displayed, which is convenient for identifying potential problems in the design. The hierarchical data provides a clearer framework, which is convenient for subsequent optimization, electromagnetic interference and signal integrity analysis. Extracting material characteristics can help designers fully understand the impact of circuit board (PCB) materials on performance and ensure that suitable materials are used for construction in the design. Working condition simulation can evaluate the performance of the circuit board under a specific working environment and identify possible failure points in advance. Through working condition simulation analysis, the design reliability of the PCB can be improved to ensure that it has good dynamic performance. Through signal integrity evaluation, accurate signal transmission data can be obtained, possible signal distortion problems can be discovered and solved in time, and PCB performance can be improved. The signal abnormal component structure division can prevent crosstalk, delay and other problems that occur in high-frequency signal transmission, thereby improving the stability of the overall circuit. Layout optimization based on signal abnormality data can effectively improve the space utilization of the PCB and reduce signal interference. Statistical simulation of electromagnetic interference can provide specific interference data for the design, help better deal with EMI problems, and improve the anti-interference ability of the circuit. Through the analysis of the heat flow distribution map, the high temperature area can be identified and corresponding heat dissipation measures can be taken to effectively prevent the performance degradation caused by overheating of components. The optimized multi-layer heat dissipation structure can maintain the working performance of the circuit board under high load and improve the reliability and service life of the overall product. Through the analysis of the printing strategy of the optimal structural model, it can provide guidance for the PCB manufacturing process and reduce manufacturing costs and time. The formation of a clear set of printing parameters will help standardize and repeat future projects and provide reliable guarantees for subsequent design and production. In summary, through the implementation of these steps, the systematicity, accuracy and high-frequency performance of PCB design can be significantly improved, and common problems and defects in the traditional design process can be reduced, ultimately achieving more efficient and reliable circuit board design and optimization. This will provide strong support for meeting the growing performance requirements of modern electronic products.

[0012] Optionally, step S1 specifically includes:

[0013] Step S11: acquiring circuit board design data, and extracting circuit board structural features from the circuit board design data, thereby obtaining circuit board structural data;

[0014] Step S12: classifying the circuit board structure data to obtain circuit board component structure data and circuit board assembly structure data;

[0015] Step S13: dividing the circuit board component structure data into a tree-like hierarchy according to the circuit board panel structure data, thereby obtaining circuit board component hierarchy data;

[0016] Step S14: performing component electrical characteristic analysis according to the circuit board component structure data to obtain component electrical characteristic data, and performing component electrical signal path connection according to the component electrical characteristic data to obtain component electrical signal path data;

[0017] Step S15: constructing a circuit board component topology structure according to the circuit board component hierarchy data and the component electrical signal path data, thereby obtaining a circuit board component topology structure model.

[0018] The present invention can deeply understand the physical layout, component position and wiring of the circuit board by acquiring circuit board design data and extracting structural features. The clarification of such structural features helps to identify potential problems in the design, such as signal interference or thermal management problems caused by dense wiring, and provides a basis for subsequent optimization. Classifying the circuit board structure data can effectively divide the circuit board into different parts, such as board structure and component structure. This classification process helps to simplify the complexity of the overall design, allowing engineers to analyze and optimize specific areas more centrally, thereby improving design efficiency. Through tree-shaped hierarchical division, the hierarchy and relationship between the components of the circuit board can be clarified, making the design ideas clearer. This hierarchical structure not only helps to understand the interaction between components, but also provides a clear framework for subsequent fault analysis and optimization design. By analyzing the electrical characteristics of the components and determining the connection path, the electrical performance data of the components and their signal flow direction can be obtained. This can reveal the electrical cross-linking relationship between components, identify potential bottlenecks in signal transmission, and assist engineers in making targeted improvements in circuit performance. Constructing a topological structure model based on the completed component hierarchy data and signal path data can form a more systematic understanding of circuit board design. This model not only helps with further simulation and verification, but also enables rapid evaluation of the impact of design changes on overall performance, thereby improving design reliability.

[0019] Optionally, step S13 is specifically:

[0020] Step S131: performing circuit board component hierarchical integration according to the circuit board component structure data, thereby obtaining circuit board component hierarchical structure data;

[0021] Step S132: extracting board wiring features from the board structure data of the circuit board, thereby obtaining board wiring data;

[0022] Step S133: extracting component connection structure features and component spatial distribution features according to the circuit board component structure data, thereby obtaining component connection structure data and component spatial distribution data;

[0023] Step S134: performing panel-component connection association on the component connection structure data and the panel wiring data according to the component spatial distribution data, thereby obtaining panel-component connection association data;

[0024] Step S135: Integrate the tree-like hierarchy of the circuit board according to the circuit board component hierarchy data and the board-component connection association data, so as to obtain the circuit board component hierarchy data.

[0025] The present invention can clearly define the hierarchical relationship of each board by hierarchically integrating the board structure data of the circuit board. This helps to understand the overall architecture of the circuit board, improves the visualization effect of the design, and facilitates subsequent design verification and modification. The board wiring feature extraction enables designers to identify and analyze the complexity and rationality of the wiring. This process can optimize the wiring path, reduce signal interference, and improve signal integrity, thereby improving the performance and reliability of the circuit board. By extracting the component connection structure and spatial distribution characteristics, the relationship between the components and their layout on the circuit board can be effectively identified. This is crucial for optimizing component layout, reducing mutual interference and improving heat dissipation efficiency, and helps to improve the overall design quality. According to the component spatial distribution data, the component connection structure data and the board wiring data are associated, and accurate mapping between components and boards can be achieved, which helps to quickly locate problems in the design stage, improves design efficiency, and reduces the cost of later modifications. By integrating the board hierarchical structure data of the circuit board and the board-component connection association data, a tree-shaped hierarchical structure of the circuit board is formed, which helps to fully grasp the overall design and functional distribution of the circuit board. This structured data management method can facilitate information flow and collaboration in the design, production and testing stages, and improve the synergy and efficiency of the entire project.

[0026] Optionally, step S14 is specifically:

[0027] Step S141: extracting component structure function description features and component electrical features from the circuit board component structure data, thereby obtaining component structure function description data and component electrical feature data;

[0028] Step S142: converting the component structure function description data into a function description text to obtain component structure function description text data, and clustering the component function descriptions according to the component structure function description text data to obtain component function clustering data;

[0029] Step S143: performing component electrical characteristic analysis on the component electrical characteristic data to obtain component electrical characteristic data, and performing component electrical characteristic clustering according to the component electrical characteristic data to obtain component electrical clustering data;

[0030] Step S144: performing a connected component intersection operation according to the component functional clustering data and the component electrical clustering data, thereby obtaining component connection data;

[0031] Step S145: extracting circuit board component wiring features from the circuit board component hierarchy data, thereby obtaining circuit board hierarchy component wiring data;

[0032] Step S146: Integrate the electrical signal path diagram according to the circuit board layer wiring data and the component connection data, so as to obtain the component electrical signal path data.

[0033] The present invention can systematically analyze the functions and performance of components by extracting the circuit board component structure and electrical characteristics, which not only enhances the understanding of the components, but also provides basic data for subsequent function optimization and troubleshooting. The component structure function description data and electrical characteristic data formed are conducive to establishing a standardized data set, laying the foundation for further analysis and training of machine learning models. Function description text conversion makes complex function descriptions more intuitive and easy to understand, which is convenient for engineers and engineers to discuss and modify during the design stage. Through cluster analysis, components with similar functions can be found, which helps to identify redundant or potential replacement components in the design, thereby reducing costs and design complexity. Electrical characteristic analysis enables designers to understand the working parameters of each component in detail, such as current, voltage, power consumption, etc., which is crucial to ensure the reliability of the circuit board under actual working conditions. Component electrical characteristic clustering helps engineers identify components with similar electrical performance, optimize selection and configuration, and thus improve the overall performance of the circuit board. The intersection operation of connected components can intuitively display the relationship between different functional components, help understand the system architecture and signal flow path, optimize layout design, help identify potential signal interference problems, solve connection problems in advance, and reduce the complexity of later debugging. The extraction of wiring features at the board level is crucial to the optimization of wiring. By analyzing the wiring relationship between boards, signal interference can be reduced and the efficiency of signal transmission can be improved. Effective wiring features can help engineers make more reasonable layout decisions when facing space constraints and ensure the efficient operation of the entire circuit board. The integration of electrical signal path diagrams provides a comprehensive view to help designers conduct system-level analysis to ensure that all electrical signals can be transmitted correctly and efficiently. This integration enables faster circuit optimization in subsequent design iterations, reducing the risk of omissions that may occur during the design test phase.

[0034] Optionally, step S2 specifically includes:

[0035] Step S21: extracting circuit board structure material features and circuit board design working condition features from the circuit board design data, thereby obtaining circuit board structure material data and circuit board design working condition data;

[0036] Step S22: performing circuit board structural material characteristic analysis based on the circuit board structural material data, thereby obtaining circuit board structural material characteristic data;

[0037] Step S23: setting simulation boundary conditions according to the circuit board structural material characteristic data and the circuit board design working condition data, thereby obtaining working condition simulation boundary condition data;

[0038] Step S24: filling the circuit board component topology model with structural material characteristics according to the circuit board structural material characteristic data, thereby obtaining a circuit board component simulation structural model;

[0039] Step S25: performing circuit board working condition finite element simulation on the circuit board component simulation structure model according to the working condition simulation boundary condition data, thereby obtaining circuit board working condition simulation data.

[0040] The present invention extracts the characteristics of circuit board structure materials, which can help engineers identify the types of materials used and their physical and chemical properties, such as electrical conductivity, thermal conductivity and mechanical strength. By extracting the design working condition characteristics, the electrical, thermal and mechanical loads borne by the circuit board in the working environment can be deeply understood, providing basic data for subsequent analysis. Relying on material property analysis, the performance of the circuit board under different working conditions can be evaluated, thereby providing empirical basis for material selection and design optimization. By understanding the material properties, engineers can predict potential problems in the design stage and reduce the risk of product failure caused by inappropriate materials. Scientifically setting the working condition simulation boundary conditions can ensure the accuracy and reliability of the simulation results, provide the premise for in-depth simulation analysis, make the obtained results closer to the actual situation, and facilitate subsequent decision-making. By filling in the material properties, a simulation structure model that is closer to the actual situation can be constructed, thereby improving the accuracy of the model in the simulation. Provide designers and analysts with more intuitive circuit board component information to help them understand the potential impact of design improvements. Through finite element analysis of circuit board components, the performance of the circuit board under specific working conditions, such as heat resistance and impact resistance, can be more comprehensively evaluated. The simulation results provide data support for product design and optimization, helping engineers make more scientific and reasonable decisions and reduce trial and error costs.

[0041] Optionally, step S3 specifically includes:

[0042] Step S31: extracting electromagnetic simulation data from the circuit board working condition simulation data, thereby obtaining the circuit board electromagnetic simulation data;

[0043] Step S32: performing component signal line simulation division on the circuit board electromagnetic simulation data to obtain a component signal line simulation data set, and performing signal line signal attenuation statistics on the component signal line simulation data set to obtain high attenuation signal line data and low attenuation signal line data;

[0044] Step S33: integrating signal fluctuation features according to the signal line simulation data set to obtain signal line simulation signal fluctuation data, and performing signal line crosstalk correlation identification according to the signal line simulation signal fluctuation data to obtain signal line signal fluctuation correlation data;

[0045] Step S34: performing signal line crosstalk frequency statistics according to the signal line signal fluctuation correlation data, thereby obtaining high-frequency crosstalk signal line data and low-frequency crosstalk signal line data;

[0046] Step S35: performing a signal line intersection operation on the high attenuation signal line data and the high frequency crosstalk signal line data, thereby obtaining low signal integrity signal line data; performing a signal line intersection operation on the low attenuation signal line data and the low frequency crosstalk signal line data, thereby obtaining high signal integrity signal line data;

[0047] Step S36: merging the low signal integrity signal line data and the high signal integrity signal line data to obtain circuit board signal integrity data, and associating the circuit board signal integrity data with signal lines according to the component signal line simulation data set to obtain circuit board component signal integrity data;

[0048] Step S37: dividing the circuit board assembly topology structure model into components associated with low signal integrity signal lines according to the circuit board assembly signal integrity data, thereby obtaining signal abnormality component structure data.

[0049] The present invention can obtain the electromagnetic performance data of the circuit board under the real environment by performing electromagnetic simulation on the working conditions of the circuit board. These data provide a basis for subsequent analysis, ensure the accuracy and reliability of the simulation results, and enable designers to identify potential electromagnetic interference sources and optimize them. The signal lines of each component in the circuit board are simulated and divided, which helps to analyze the performance of different signal lines more accurately. By statistically analyzing the signal attenuation, designers can find high-attenuation and low-attenuation signal lines, and then take targeted design measures to optimize signal transmission and improve the overall circuit performance. By integrating the signal line simulation data and identifying the signal fluctuation characteristics, the crosstalk between the lines can be identified and analyzed, which can help designers understand the mutual influence between different signals, provide data support for subsequent improved designs, and reduce problems caused by signal interference. By statistically analyzing the crosstalk frequency of the signal line, the signal line can be divided into high-frequency crosstalk and low-frequency crosstalk, which is a key step in evaluating the signal integrity at different frequencies. This helps to identify the lines that affect performance in high-speed signal transmission, so as to optimize the characteristics for high-frequency signals. Intersection operations are performed on high-attenuation signal line data and high-frequency crosstalk signal line data, which helps to identify and optimize lines with low signal integrity. Similarly, performing intersection operations on low-attenuation and low-frequency crosstalk lines can help find lines with higher signal integrity. Such operations enhance the predictability and reliability of line performance, facilitating subsequent design improvements. By merging the signal line data with low signal integrity and high signal integrity, comprehensive circuit board signal integrity data is formed. This data analysis combines the circuit performance in different states, providing a clear data basis for subsequent circuit optimization and debugging. At the same time, based on the association of signal line components, the signal quality in circuit board design can be further improved and the failure rate can be reduced. By dividing the topological structure of circuit board components, it is possible to effectively identify which components have signal anomalies. This provides an important basis for troubleshooting, optimizing design, and improving circuit board performance, allowing the design team to locate problems more quickly and make targeted improvements.

[0050] Optionally, step S4 is specifically:

[0051] Step S41: performing signal abnormal component density statistics on the signal abnormal component structure data through the circuit board component topology structure model, thereby obtaining high-density abnormal component area data and low-density abnormal component area data;

[0052] Step S42: extracting circuit board component wiring features from the circuit board component topology model, thereby obtaining component wiring data;

[0053] Step S43: reconstructing the abnormal component spacing layout of the high-density abnormal component area data according to the board wiring data, thereby obtaining component optimized layout data;

[0054] Step S44: reconstructing the abnormal component signal cross routing for the low-density abnormal component area data according to the board wiring data, thereby obtaining component optimized routing data;

[0055] Step S45: optimizing the layout and routing of the circuit board component simulation structure model according to the component optimization layout data and the component optimization routing data, thereby obtaining an optimized circuit board component structure model;

[0056] Step S46: Performing electromagnetic interference statistical simulation on the optimized circuit board component structure model to obtain electromagnetic interference simulation data.

[0057] The present invention can identify high-risk areas by counting the density of signal abnormal components, which may be affected by electromagnetic interference, signal crosstalk, etc. Early identification of these areas can provide direction for subsequent optimization, thereby reducing the failure rate and improving the stability of the circuit board. Extracting the wiring characteristics of the board can provide layout information of the circuit board, including the length of the routing, the density of the routing and the arrangement relationship of the adjacent components. This information is crucial for understanding the signal transmission characteristics and optimizing the design, and is helpful for subsequent routing optimization and layout adjustment. Reconstructing the layout of high-density abnormal components can optimize the spacing between components, thereby reducing signal interference and crosstalk. Optimizing the layout not only improves signal integrity, but also improves heat dissipation performance and reduces the probability of failure. Reconstructing the signal cross routing in low-density areas can optimize the signal transmission path and reduce cross interference between routings. Through an effective routing strategy, signal quality can be improved and delay can be reduced, ensuring the stability of the circuit board in high-frequency applications. By optimizing the layout data and routing data of the integrated components, the optimization of the overall circuit board structure can be achieved. This process helps to improve the overall performance of the circuit board, ensure high signal transmission efficiency and low transmission delay, and effectively control electromagnetic interference, thereby meeting the requirements of high-performance electronic devices. By performing statistical simulation of electromagnetic interference on the optimized circuit board structure, potential electromagnetic interference problems can be identified in advance. The simulation data provides a basis for subsequent design adjustments, allowing designers to make necessary optimizations before actual production to ensure the reliability and performance of the final product.

[0058] Optionally, step S5 specifically includes:

[0059] Step S51: performing circuit board thermal management simulation on the electromagnetic interference simulation data, thereby obtaining circuit board thermal management simulation data;

[0060] Step S52: drawing a heat flow distribution map of the circuit board according to the circuit board thermal management simulation data, thereby obtaining a heat flow distribution map of the circuit board;

[0061] Step S53: performing heat flux density statistics based on the heat flux distribution map of the circuit board, thereby obtaining data of the circuit board area with high heat flux density;

[0062] Step S54: extracting circuit board routing features according to the optimized circuit board component structure model, thereby obtaining optimized circuit board routing data;

[0063] Step S55: Optimizing the heat flux balance routing layout of the high heat flux density circuit board area data according to the optimized circuit board routing data, thereby obtaining heat dissipation optimized routing layout data;

[0064] Step S56: Optimize the heat dissipation of the multi-layer circuit board on the optimized circuit board component structure model according to the heat dissipation optimization routing layout data, so as to obtain the optimal circuit board component structure model.

[0065] The present invention improves the understanding of the thermal behavior of the circuit board in a real working environment through electromagnetic interference simulation data analysis, which can help identify potential temperature rise problems and help take measures in advance to reduce the risk of damage. By visualizing the heat flow distribution, the high temperature area and the location of the heat source can be quickly identified, which is helpful for subsequent optimization design and helps engineers evaluate the effectiveness of the thermal management design of the circuit board, so as to make necessary adjustments. By counting the data of the high heat flux density area, targeted heat dissipation measures can be taken, such as adding heat sinks or improving air circulation. With accurate data support, the blindness of the heat dissipation design is reduced and the design efficiency is improved. Optimizing the routing model can help reduce signal loss, improve thermal conductivity characteristics, effectively reduce heat accumulation, ensure signal integrity, and take into account thermal management requirements and enhance product stability. By optimizing the layout, the heat is more evenly distributed on the circuit board, avoiding local overheating, helping to extend the service life of the components, reducing the overall temperature of the system, and improving the performance of the equipment under load conditions. Multi-layer design optimization combined with routing layout further improves the heat dissipation efficiency, making the circuit board design more reasonable, and the optimal circuit board component structure model obtained not only improves the heat dissipation performance, but also may reduce production costs and improve reliability.

[0066] Optionally, the present specification also provides a printed circuit board simulation system for executing the printed circuit board simulation method as described above, the printed circuit board simulation system comprising:

[0067] A topology structure analysis module is used to obtain circuit board design data, and divide the circuit board design data into circuit board component hierarchies, thereby obtaining circuit board component hierarchical data; and perform circuit board component topology structure analysis based on the circuit board component hierarchical data, thereby obtaining a circuit board component topology structure model;

[0068] A circuit board working condition simulation module is used to extract circuit board structural material features from circuit board design data to obtain circuit board structural material data, and to perform circuit board working condition simulation based on the circuit board component topological structure model and circuit board structural material data to obtain circuit board working condition simulation data;

[0069] A signal integrity evaluation module is used to perform signal integrity evaluation based on circuit board working condition simulation data, thereby obtaining circuit board signal integrity data, and to divide the circuit board component topology structure model into signal abnormal component structures according to the circuit board signal integrity data, thereby obtaining signal abnormal component structure data;

[0070] The electromagnetic interference simulation module is used to optimize the multi-layer layout of the circuit board according to the signal abnormal component structure data, so as to obtain the optimized circuit board component structure model, and perform electromagnetic interference statistical simulation on the optimized circuit board component structure model, so as to obtain electromagnetic interference simulation data;

[0071] The circuit board heat dissipation optimization module is used to perform circuit board thermal management simulation according to the electromagnetic interference simulation data, so as to obtain the circuit board heat flow distribution map, and optimize the heat dissipation of the multi-layer circuit board on the optimized circuit board component structure model according to the circuit board heat flow distribution map, so as to obtain the optimal circuit board component structure model;

[0072] The circuit board printing strategy analysis module is used to obtain a circuit board printing parameter set, and perform circuit board printing strategy analysis on the optimal circuit board component structure model according to the circuit board printing parameter set, so as to obtain a circuit board printing strategy.

[0073] The printed circuit board simulation system of the present invention can implement any printed circuit board simulation method of the present invention, and is used to combine the operation and signal transmission medium between various modules to complete the printed circuit board simulation method. The internal modules of the system cooperate with each other, thereby improving the efficiency and reliability of circuit board design.

[0074] Optionally, the present specification also provides a storage medium storing a computer program, wherein the computer program implements the printed circuit board simulation method as described above when executed by a processor. BRIEF DESCRIPTION OF THE DRAWINGS

[0075] Other features, objects and advantages of the present invention will become more apparent from the detailed description of non-limiting embodiments thereof made with reference to the following drawings:

[0076] Figure 1 A schematic diagram of the steps of the printed circuit board simulation method of the present invention;

[0077] Figure 2 Detailed step flow diagram of step S1 in the present invention;

[0078] Figure 3 Detailed step flow diagram of step S2 in the present invention;

[0079] The purpose, features and advantages of the present invention will be further described with reference to the accompanying drawings in conjunction with the embodiments. DETAILED DESCRIPTION

[0080] The technical method of the present invention is described clearly and completely below in conjunction with the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by technicians in this field without creative work are within the scope of protection of the present invention.

[0081] In addition, the accompanying drawings are only schematic illustrations of the present invention and are not necessarily drawn to scale. The same reference numerals in the figures represent the same or similar parts, and their repeated description will be omitted. Some of the block diagrams shown in the accompanying drawings are functional entities and do not necessarily correspond to physically or logically independent entities. The functional entities can be implemented in software form, or implemented in one or more hardware modules or integrated circuits, or implemented in different networks and / or processor methods and / or microcontroller methods.

[0082] It should be understood that, although the terms "first", "second", etc. may be used herein to describe various units, these units should not be limited by these terms. These terms are used only to distinguish one unit from another unit. For example, without departing from the scope of the exemplary embodiments, the first unit may be referred to as the second unit, and similarly the second unit may be referred to as the first unit. The term "and / or" used herein includes any and all combinations of one or more of the listed associated items.

[0083] To achieve this, please refer to Figures 1 to 3 The present invention provides a printed circuit board simulation method, the method comprising the following steps:

[0084] Step S1: Acquire circuit board design data, and divide the circuit board design data into circuit board component hierarchies, thereby obtaining circuit board component hierarchical data; perform circuit board component topological structure analysis based on the circuit board component hierarchical data, thereby obtaining a circuit board component topological structure model;

[0085] In this embodiment, the design data of the circuit board is obtained through the circuit board manufacturing workshop, and the data source can be the schematic diagram output by the circuit design software (such as Altium Designer or Eagle) or the layout file of the circuit board manufacturing workshop. Then, these design data are hierarchically divided, and the circuit board is divided according to functional modules (such as power module, signal processing module, etc.), and the component list of each module is recorded. For example, the power module includes a power IC, an inductor, and a capacitor. By analyzing the interconnection relationship between these modules, a topological structure model of the circuit board is constructed, which can clearly show the electrical connection and functional relationship between the components.

[0086] Step S2: extracting circuit board structural material features from the circuit board design data to obtain circuit board structural material data, and performing circuit board operating condition simulation based on the circuit board component topological structure model and the circuit board structural material data to obtain circuit board operating condition simulation data;

[0087] In this embodiment, the material properties of the circuit board are extracted, mainly including the electrical properties (such as dielectric constant, loss tangent, etc.) and thermal properties (such as thermal conductivity) of the substrate material (such as FR-4, CEM-1, etc.). On this basis, simulation software (such as ANSYS or COMSOL) is used to simulate the working conditions of the circuit board under working conditions to simulate its response under different electromagnetic, current, temperature and frequency. In this way, the electrical parameters and heat flow distribution data of the circuit board under actual working conditions can be obtained, providing basic data for subsequent analysis.

[0088] Step S3: performing signal integrity evaluation based on the circuit board working condition simulation data to obtain circuit board signal integrity data, and performing signal abnormal component structure division on the circuit board component topology structure model according to the circuit board signal integrity data to obtain signal abnormal component structure data;

[0089] In this embodiment, based on the working condition simulation data, a signal integrity analysis tool (such as HyperLynx or SIwave) is used to evaluate the signal transmission of the circuit board. The specific method includes observing indicators such as delay, reflection coefficient, and crosstalk to evaluate the signal quality. After obtaining the signal integrity data, components with signal anomalies (such as inappropriate grounding or too short signal lines) are structurally divided according to poor transmission characteristics (such as high reflection or high noise), and signal abnormality component structure data is generated, so that the components that need to be optimized can be clearly identified.

[0090] Step S4: Optimizing the multi-layer layout of the circuit board according to the signal abnormality component structure data, thereby obtaining an optimized circuit board component structure model, and performing electromagnetic interference statistical simulation on the optimized circuit board component structure model, thereby obtaining electromagnetic interference simulation data;

[0091] In this embodiment, software tools (such as CADSTAR or PADS) are used to optimize the multi-layer layout of the circuit board, aiming to reduce signal paths, reduce electromagnetic interference and crosstalk, and ensure the rationality and manufacturability of the layout. After optimization, electromagnetic interference simulation tools (such as EMPro or HFSS) are used to analyze the electromagnetic interference suffered by the circuit board in the working state, so as to obtain electromagnetic interference simulation data, identify the areas that affect the stability of the system, and perform targeted optimization.

[0092] Step S5: performing a circuit board thermal management simulation according to the electromagnetic interference simulation data to obtain a circuit board heat flow distribution diagram, and performing multi-layer circuit board heat dissipation optimization on the optimized circuit board component structure model according to the circuit board heat flow distribution diagram to obtain an optimal circuit board component structure model;

[0093] In this embodiment, thermal management simulation of the circuit board is performed based on the signal integrity and electromagnetic interference simulation results. Thermal simulation software (such as Flotherm) is used to analyze the heat flow distribution of the optimal circuit board component structure model, find the area where heat is concentrated, and formulate a heat dissipation strategy (such as adding heat dissipation holes and using thermal conductive materials). By optimizing the heat dissipation path and adding necessary heat dissipation components (such as heat sinks and fans), the optimal circuit board component structure model is obtained, thereby effectively controlling the operating temperature of the circuit board and improving its stability and life.

[0094] Step S6: Obtain a circuit board printing parameter set, and perform circuit board printing strategy analysis on the optimal circuit board component structure model according to the circuit board printing parameter set, thereby obtaining a circuit board printing strategy.

[0095] In this embodiment, the printing parameter set of the circuit board, including the number of layers, line width, interlayer insulation, etc., is obtained from the circuit board manufacturing workshop, and the printing strategy analysis of the optimal circuit board assembly is performed based on these parameters. The manufacturability of the printing process is evaluated using printing process analysis software (such as CAM350 or Mentor Graphics), and possible manufacturing difficulties (such as printing errors caused by micro-line width) are discovered and resolved. Finally, the best circuit board printing strategy is determined to ensure the production efficiency and production yield of the optimized circuit board.

[0096] Optionally, step S1 specifically includes:

[0097] Step S11: acquiring circuit board design data, and extracting circuit board structural features from the circuit board design data, thereby obtaining circuit board structural data;

[0098] In this embodiment, the circuit board design data of the circuit board manufacturing workshop is first exported from the electronic design automation (EDA) tool. These data are stored in the Gerber file or design database format. The effective circuit board structural features are extracted, focusing on the component layout, wiring information and electrical connections. The extraction process can be analyzed using Python scripts combined with image processing libraries such as OpenCV. To ensure accuracy, the data needs to be verified to ensure that there is no lost or damaged design information.

[0099] Step S12: classifying the circuit board structure data to obtain circuit board component structure data and circuit board assembly structure data;

[0100] In this embodiment, the circuit board structure classification can be performed using machine learning technology. A certain amount of circuit board sample data that has been structurally classified can be collected, its features can be extracted and labeled, and then a classification algorithm (such as a support vector machine or a decision tree) can be used to classify the structural type of the circuit board. The classification model can be constructed using the TensorFlow or Scikit-Learn library, and the classification result will obtain the board and component structure data of the circuit board, such as the power module, signal module and their relationship on the circuit board.

[0101] Step S13: dividing the circuit board component structure data into a tree-like hierarchy according to the circuit board panel structure data, thereby obtaining circuit board component hierarchy data;

[0102] In this embodiment, the hierarchical relationship between components can be modeled based on the extracted structural data. Specifically, a graphical method is used to treat the components as nodes and organize them into a tree structure based on the connection relationship. The adjacency matrix algorithm in graph theory can be used to divide the components into levels, output the hierarchical data of each layer of components, and emphasize the relationship between different levels, such as the hierarchical relationship between the main control chip and the secondary control module.

[0103] Step S14: performing component electrical characteristic analysis according to the circuit board component structure data to obtain component electrical characteristic data, and performing component electrical signal path connection according to the component electrical characteristic data to obtain component electrical signal path data;

[0104] In this embodiment, the electrical characteristics analysis of the components can be achieved through simulation tools, such as using SPICE to simulate the electrical characteristics. First, the parameters of each component (such as impedance, capacitive reactance, capacitance, etc.) need to be imported into the simulation tool, and then the simulation is run to obtain the electrical characteristics data. At the same time, the signal path can be analyzed based on the electrical characteristics data to identify the direction and path of signal flow, such as the electrical signal connection from the sensor to the controller, to form comprehensive component electrical signal path data, providing a basis for subsequent design verification.

[0105] Step S15: constructing a circuit board component topology structure according to the circuit board component hierarchy data and the component electrical signal path data, thereby obtaining a circuit board component topology structure model.

[0106] In this embodiment, based on the component hierarchy data and the electrical signal path data, a graphical modeling tool (such as MATLAB or Gephi) can be used to build a topological structure model of the circuit board assembly. The entire circuit board needs to be regarded as a network, and a graph model is constructed based on the electrical characteristics and connection relationships. Using the concepts of vertices and edges in graph theory, each component is regarded as a vertex, and the electrical connection is regarded as an edge. The topological structure of the circuit board can be intuitively displayed, including which components are directly connected and the path through which the signal flows. The construction of this model is crucial for subsequent circuit optimization and fault analysis.

[0107] Optionally, step S13 is specifically:

[0108] Step S131: performing circuit board component hierarchical integration according to the circuit board component structure data, thereby obtaining circuit board component hierarchical structure data;

[0109] In this embodiment, a data processing tool is used to analyze the size, shape, material and electrical characteristics of each component included in the circuit board component structure data, and the various components are classified and integrated according to the hierarchical relationship (such as the parent-child relationship) through the algorithm. Take an actual circuit board as an example, assuming that it contains three components: a main board, an auxiliary board and a connector. Software tools (such as CAD applications) can be used to import the structural data of these components, and they can be hierarchically integrated through algorithms (such as tree structure algorithms), and finally a hierarchical data model containing parent-child relationships is generated to facilitate subsequent data processing and analysis. The output of this step is a tree structure that indicates the hierarchical relationship of each component, which helps to visualize the overall design of the circuit board.

[0110] Step S132: extracting board wiring features from the board structure data of the circuit board, thereby obtaining board wiring data;

[0111] In this embodiment, when extracting wiring features, it is necessary to examine the circuit board wiring diagram contained in the circuit board panel structure data, and extract key information based on the circuit board wiring pattern. For example, by analyzing the wiring diagram of the circuit board through software tools, the starting and ending points, line width, direction, and routing method (such as straight line, curve, etc.) of each line can be identified. Specifically, for the newly extracted motherboard wiring data, the use of image processing algorithms (such as edge detection) can accurately identify wiring features. The collected data will be presented in a tabular form, recording the various parameters of each wiring, which is convenient for engineers to evaluate and optimize the wiring quality in subsequent designs.

[0112] Step S133: extracting component connection structure features and component spatial distribution features according to the circuit board component structure data, thereby obtaining component connection structure data and component spatial distribution data;

[0113] In this embodiment, it is necessary to analyze the connection characteristics between components, including pin arrangement, connection method (such as welding or plug-in) and spatial distribution between each other. 3D modeling software can be used to visualize the spatial distribution and calculate the relative position and spacing between components to ensure that no interference occurs during the assembly process. In addition, for the connection method, the corresponding electrical connection characteristics and physical connection methods are extracted for subsequent analysis. By identifying the connection points between component pins and wiring, a node network of component connections can be constructed, and data mining tools can be used to automatically generate circuit connection diagrams and record components and their pin information, such as how the pins of an IC are connected to peripheral components such as resistors or capacitors.

[0114] Step S134: performing panel-component connection association on the component connection structure data and the panel wiring data according to the component spatial distribution data, thereby obtaining panel-component connection association data;

[0115] In this embodiment, the spatial distribution data of the components and the data of the connection structure are used to establish the association between the board and the components. The association matrix method in graph theory can be applied, and the board is regarded as a node and the components are regarded as a vertex. A connection table is established to indicate the relationship between each board and its corresponding component. For example, it is identified that a power rail of the power layer is connected to multiple components through a connector, and its data is recorded as an association relationship matrix to facilitate subsequent circuit analysis and optimization.

[0116] Step S135: Integrate the tree-like hierarchy of the circuit board according to the circuit board component hierarchy data and the board-component connection association data, so as to obtain the circuit board component hierarchy data.

[0117] In this embodiment, the overall hierarchical structure of the circuit board is integrated based on the obtained circuit board component hierarchical structure data and the component-component connection association data. The data of each level is integrated together using the hierarchical analysis method (AHP) to form a complete circuit board component hierarchical data. This ensures the global consistency and optimization of the design. For example, the extracted hierarchical structure data and connection relationship data are stored together using database software (such as MySQL), and a complete circuit diagram is constructed through query, which is convenient for further circuit analysis and troubleshooting. This integration will be saved in a tree structure, which is convenient for users to intuitively understand the components and connection methods of the circuit.

[0118] Optionally, step S14 is specifically:

[0119] Step S141: extracting component structure function description features and component electrical features from the circuit board component structure data, thereby obtaining component structure function description data and component electrical feature data;

[0120] In this embodiment, the component structure function description and electrical characteristics described in the design drawing included in the circuit board component structure data are extracted through feature engineering. Computer vision and pattern recognition technology can also be used to capture images of each component on the circuit board, and the shape and connection points of the component are analyzed through a deep learning model to extract its shape, size, material and its functional characteristics. At the same time, the electrical characteristics of the component, such as resistance, capacitance and inductance, are obtained through circuit testing equipment. This information is eventually integrated into structural function description data and electrical characteristic data for subsequent analysis.

[0121] Step S142: converting the component structure function description data into a function description text to obtain component structure function description text data, and clustering the component function descriptions according to the component structure function description text data to obtain component function clustering data;

[0122] In this embodiment, natural language processing technology is used to convert the obtained function description data into a standardized text format according to predefined grammatical rules, such as describing "resistance" as "a component that can limit the flow of current". Subsequently, a clustering algorithm (such as K-means or hierarchical clustering) is used to classify components with similar functions according to the similarity of the function description text data, such as clustering all "power management" related components together to form component function clustering data.

[0123] Step S143: performing component electrical characteristic analysis on the component electrical characteristic data to obtain component electrical characteristic data, and performing component electrical characteristic clustering according to the component electrical characteristic data to obtain component electrical clustering data;

[0124] In this embodiment, the electrical characteristic data of the components is deeply analyzed, and statistical methods such as mean and variance may be used to evaluate the characteristic distribution, and a feature selection algorithm is implemented to screen out the main influencing factors. Next, components with similar electrical characteristics are classified through cluster analysis (for example, density clustering using the DBSCAN algorithm), for example, resistors with the same resistance value range are placed in the same group, thereby obtaining component electrical clustering data.

[0125] Step S144: performing a connected component intersection operation according to the component functional clustering data and the component electrical clustering data, thereby obtaining component connection data;

[0126] In this embodiment, the obtained component function clustering data is associated with the obtained electrical clustering data through an intersection operation to obtain component connection data. For example, if the "power management" component and the "power switch" component have overlapping electrical characteristics, they are considered to be connected, and finally a connection data set containing interconnected component pairs is output.

[0127] Step S145: extracting circuit board component wiring features from the circuit board component hierarchy data, thereby obtaining circuit board hierarchy component wiring data;

[0128] In this embodiment, the wiring of the circuit board is deeply analyzed through the hierarchical data of the circuit board components, and the thickness, spacing, direction and connection nodes of the wiring of the circuit board are extracted. By establishing a wiring model or using CAD tools, hierarchical board wiring data is generated, laying the foundation for the subsequent integration of the electrical signal path diagram.

[0129] Step S146: Integrate the electrical signal path diagram according to the circuit board layer wiring data and the component connection data, so as to obtain the component electrical signal path data.

[0130] In this embodiment, the hierarchical board wiring data and the component connection data are combined to construct a component electrical signal path diagram. The pin information of the component is matched with the wiring data. The signal line corresponding to each pin is determined, and the pin connection data is used to identify which pins are connected to each other through which wiring. Starting from a specific pin of a component, the corresponding signal line is traced, and all nodes and connections along the way are recorded. For each pin, the above process is repeated until the pin of the destination component is reached. The traced electrical signal path is presented in the form of a graph, and a path diagram is usually generated using a graphical tool or programming language. Through circuit simulation tools (such as SPICE simulators), the flow of electrical signals in the integrated path is verified to ensure signal integrity and effective transmission. Finally, detailed component electrical signal path data is generated to facilitate subsequent circuit design optimization and troubleshooting.

[0131] Optionally, step S2 specifically includes:

[0132] Step S21: extracting circuit board structure material features and circuit board design working condition features from the circuit board design data, thereby obtaining circuit board structure material data and circuit board design working condition data;

[0133] In this embodiment, the material information and design data of the circuit board are extracted by using design CAD software (such as Altium Designer or Eagle). The structural material feature extraction will identify the substrate material used for the circuit board (such as FR-4, CEM-1, etc.) and extract the corresponding physical properties (such as thermal conductivity, electrical insulation, mechanical strength, etc.). At the same time, the design operating condition feature extraction will analyze the expected working environment of the circuit board, including temperature range, humidity, electronic signal frequency and power consumption. These data are saved in a structured format for subsequent analysis.

[0134] Step S22: performing circuit board structural material characteristic analysis based on the circuit board structural material data, thereby obtaining circuit board structural material characteristic data;

[0135] In this embodiment, based on the extracted structural material data, finite element analysis software (such as ANSYS or COMSOL Multiphysics) is used to analyze the structural material characteristics. For example, for FR-4 materials, thermal properties, electrical properties and mechanical properties can be simulated to obtain corresponding material property data. This includes the thermal expansion coefficient of the material at different temperatures, the dielectric constant under high-frequency signals, etc. These characteristic data will provide an important basis for the next simulation to ensure that the design of the circuit board can operate stably under the expected working conditions.

[0136] Step S23: setting simulation boundary conditions according to the circuit board structural material characteristic data and the circuit board design working condition data, thereby obtaining working condition simulation boundary condition data;

[0137] In this embodiment, the boundary conditions of the circuit board assembly are defined using the extracted circuit board structural material property data and operating condition characteristic data. Assume that the circuit board operates at a room temperature of 25°C and a frequency of 2.4GHz, and at the same time, the critical conditions of the circuit board's structural material to the set maximum operating temperature (such as 85°C) are determined. These conditions are concretized and input into the finite element analysis software, and the temperature, mechanical constraints, and voltage conditions are set. This ensures that the simulation results can truly reflect the performance of the circuit board in actual use, and can be flexibly simulated according to different operating conditions.

[0138] Step S24: filling the circuit board component topology model with structural material characteristics according to the circuit board structural material characteristic data, thereby obtaining a circuit board component simulation structural model;

[0139] In this embodiment, the structural material characteristics of the circuit board assembly topology model are filled according to the obtained structural material characteristic data. The obtained material characteristic data are filled into each structure of the circuit board assembly topology model layer by layer according to the spatial relationship of the structure. For example, in the model, different layers (such as pad layers, signal layers, and ground layers) can occupy corresponding spaces through different materials to simulate their real performance. This simulation structure model can be effectively used for subsequent working condition testing.

[0140] Step S25: performing circuit board working condition finite element simulation on the circuit board component simulation structure model according to the working condition simulation boundary condition data, thereby obtaining circuit board working condition simulation data.

[0141] In this embodiment, finite element analysis of the circuit board working condition is performed based on the set boundary conditions and the constructed simulation structure model. In this process, simulation software (such as ANSYS, ABAQUS) is used to perform static or dynamic analysis to obtain electromagnetic, stress, deformation, temperature distribution and other data of the circuit board under different working conditions. By comparing and analyzing the simulation data under different working conditions, potential failure modes and performance bottlenecks can be identified, providing a basis for optimizing the circuit board design.

[0142] Optionally, step S3 specifically includes:

[0143] Step S31: extracting electromagnetic simulation data from the circuit board working condition simulation data, thereby obtaining the circuit board electromagnetic simulation data;

[0144] In this embodiment, electromagnetic field simulation software (such as HFSS or CST) is used to simulate the circuit board. By setting a specific frequency range (for example, 1 GHz to 10 GHz), the electromagnetic field of the circuit board in the working state is calculated. After the simulation is completed, important electromagnetic parameter data such as return loss, transmission loss and standing wave ratio are extracted. The data finally obtained will contain specific electromagnetic response information for signal line analysis in subsequent steps. The electromagnetic parameter data such as return loss, transmission loss and standing wave ratio obtained by electromagnetic simulation contained in the circuit board working condition simulation data can also be extracted to obtain the circuit board electromagnetic simulation data.

[0145] Step S32: performing component signal line simulation division on the circuit board electromagnetic simulation data to obtain a component signal line simulation data set, and performing signal line signal attenuation statistics on the component signal line simulation data set to obtain high attenuation signal line data and low attenuation signal line data;

[0146] In this embodiment, based on the electromagnetic simulation data obtained, multiple signal lines of each component of the circuit board are divided from the electromagnetic simulation data. Then, each signal line is analyzed using a static signal attenuation model, compared with a standard signal attenuation threshold, and the signal attenuation is statistically analyzed. On this basis, the signal lines are divided into high attenuation (attenuation value greater than a certain threshold, such as -10 dB) and low attenuation (attenuation value less than the threshold) groups to form a complete component signal line simulation data set.

[0147] Step S33: integrating signal fluctuation features according to the signal line simulation data set to obtain signal line simulation signal fluctuation data, and performing signal line crosstalk correlation identification according to the signal line simulation signal fluctuation data to obtain signal line signal fluctuation correlation data;

[0148] In this embodiment, the signal line simulation data set is processed and the characteristics of the signal fluctuation are extracted using time domain and frequency domain analysis methods. For example, the frequency component and fluctuation amplitude of the signal are analyzed by fast Fourier transform (FFT). In addition, the phase and amplitude changes of the associated signal are obtained by waveform analysis, and finally the signal line simulation signal fluctuation data is formed. Furthermore, the correlation formula is used to identify the crosstalk between each signal line, and the signal line signal fluctuation correlation data set is formed to reveal the potential signal interference source.

[0149] Step S34: performing signal line crosstalk frequency statistics according to the signal line signal fluctuation correlation data, thereby obtaining high-frequency crosstalk signal line data and low-frequency crosstalk signal line data;

[0150] In this embodiment, the extracted signal line signal fluctuation correlation data is analyzed in detail to identify the crosstalk phenomenon in different frequency ranges. Specifically, high-frequency crosstalk (such as >1 GHz) and low-frequency crosstalk (such as <1 GHz) are defined, and based on the spectrum characteristics of the signal, the signal lines are grouped to form high-frequency crosstalk signal line data and low-frequency crosstalk signal line data. This classification can help identify the frequency components that have a greater impact on system performance.

[0151] Step S35: performing a signal line intersection operation on the high attenuation signal line data and the high frequency crosstalk signal line data, thereby obtaining low signal integrity signal line data; performing a signal line intersection operation on the low attenuation signal line data and the low frequency crosstalk signal line data, thereby obtaining high signal integrity signal line data;

[0152] In this embodiment, a set operation is used to determine the data intersection of high attenuation signal lines and high-frequency crosstalk signal lines, and the low signal integrity signal line data is recorded. For example, if a signal line is identified in both high attenuation and high-frequency crosstalk, it is classified as a low signal integrity part. Conversely, similar operations are performed for low attenuation and low-frequency crosstalk signal lines to generate high signal integrity signal line data. This step provides an important management basis for signal integrity.

[0153] Step S36: merging the low signal integrity signal line data and the high signal integrity signal line data to obtain circuit board signal integrity data, and associating the circuit board signal integrity data with signal lines according to the component signal line simulation data set to obtain circuit board component signal integrity data;

[0154] In this embodiment, the circuit board signal integrity data is obtained by merging the low signal integrity and high signal integrity signal line data. Next, based on the previous component signal line simulation data set, component signal integrity analysis is performed to associate the data between specific components and lines, thereby confirming the specific components and their performance status that affect the signal integrity.

[0155] Step S37: dividing the circuit board assembly topology structure model into components associated with low signal integrity signal lines according to the circuit board assembly signal integrity data, thereby obtaining signal abnormality component structure data.

[0156] In this embodiment, based on the signal integrity data of the circuit board components, graph theory or topological analysis technology is used to model the component topology of the circuit board, identify components related to low signal integrity and divide them. For example, if a component exhibits low signal integrity in multiple signal lines, it is identified as potential signal abnormal structure data. This data can be further used to optimize the circuit board design and improve signal quality.

[0157] Optionally, step S4 is specifically:

[0158] Step S41: performing signal abnormal component density statistics on the signal abnormal component structure data through the circuit board component topology structure model, thereby obtaining high-density abnormal component area data and low-density abnormal component area data;

[0159] In this embodiment, the components with abnormal signals are first identified by the topological structure model of the circuit board components. At this stage, a clustering algorithm (such as K-means) is used to analyze the spatial distribution of the signal abnormal components to calculate the signal abnormality density around each component. The signal abnormal components are divided into high-density areas (such as abnormal component density exceeds a certain threshold, such as more than 5 per square centimeter) and low-density areas (density is lower than the threshold) according to their density. For example, on an electronic circuit board, if a certain area contains 15 signal abnormal components, this area is marked as a high-density abnormal component area.

[0160] Step S42: extracting circuit board component wiring features from the circuit board component topology model, thereby obtaining component wiring data;

[0161] In this embodiment, the wiring feature extraction is performed on the circuit board component topology structure model, mainly analyzing the width, spacing and level of the signal routing. If the circuit board of the circuit board component topology structure model uses a multi-layer design, special attention should be paid to the signal interaction between each layer, and the wiring features of each layer should be extracted, such as the length, relative position and crossing of each layer of wiring, to obtain detailed board wiring data.

[0162] Step S43: reconstructing the abnormal component spacing layout of the high-density abnormal component area data according to the board wiring data, thereby obtaining component optimized layout data;

[0163] In this embodiment, for the identified high-density abnormal component area, an optimization algorithm (such as a genetic algorithm or a simulated annealing algorithm) is used to re-layout the abnormal components to reduce the interference between them. Specifically, based on the wiring data, the minimum safe distance between components (for example, 0.5 mm) is defined. On this basis, the component positions are reconstructed by optimizing the layout strategy to ensure signal integrity and reduce interference. For example, two closely adjacent signal abnormal components are rearranged so that their spacing meets the minimum requirement while keeping other components unaffected.

[0164] Step S44: reconstructing the abnormal component signal cross routing for the low-density abnormal component area data according to the board wiring data, thereby obtaining component optimized routing data;

[0165] In this embodiment, in the low-density abnormal component area, the focus is on the intersection of signal routing. By analyzing the routing data and using routing algorithms (such as A* or Dijkstra algorithm), the signal integrity and the reduction of routing intersections are given priority when reconstructing the routing. If a signal routing intersects with other signal routings, the routing path is replanned to ensure the minimum intersection and avoid signal interference. The optimized routing data will form a new routing path diagram.

[0166] Step S45: optimizing the layout and routing of the circuit board component simulation structure model according to the component optimization layout data and the component optimization routing data, thereby obtaining an optimized circuit board component structure model;

[0167] In this embodiment, the optimized component layout and routing data are combined, and a comprehensive optimization strategy is adopted to optimize the overall layout and routing of the circuit board. The component spacing and routing are optimized again through simulation software (such as Cadence or Altium), and finally a new circuit board component structure model is generated. The model should meet the requirements of signal integrity, power integrity and thermal management. In the example, a better layout configuration may be obtained through iterative simulation.

[0168] Step S46: Performing electromagnetic interference statistical simulation on the optimized circuit board component structure model to obtain electromagnetic interference simulation data.

[0169] In this embodiment, the optimized circuit board component structure model is used to perform electromagnetic interference (EMI) simulation. Special software (such as HFSS or CST) is used to perform electromagnetic field simulation, and the geometric shape and material properties of the circuit board contained in the optimized circuit board component structure model are input to simulate the electromagnetic interference under different operating frequencies. Through this simulation, electromagnetic interference simulation data is obtained, the radiation and anti-interference capabilities of the signal are analyzed, and a corresponding EMI processing plan is formulated.

[0170] Optionally, step S5 specifically includes:

[0171] Step S51: performing circuit board thermal management simulation on the electromagnetic interference simulation data, thereby obtaining circuit board thermal management simulation data;

[0172] In this embodiment, before performing the circuit board thermal management simulation, electromagnetic interference (EMI) simulation data is first collected. This can be achieved by using professional simulation software (such as ANSYS or COMSOL) to perform electromagnetic field simulation to determine the heat generation and heat source location of each component on the circuit board. During the simulation, considering the ambient temperature, material thermal conductivity and circuit board layout, reasonable boundary conditions are set, and finally the thermal management simulation data of the circuit board is obtained, including temperature distribution and heat flux density information.

[0173] Step S52: drawing a heat flow distribution map of the circuit board according to the circuit board thermal management simulation data, thereby obtaining a heat flow distribution map of the circuit board;

[0174] In this embodiment, the obtained thermal management simulation data is used to draw a heat flux distribution map of the circuit board using a data visualization tool (such as Matplotlib in MATLAB or Python). The heat flux distribution map is generated based on the relationship between heat flux density and temperature to show the heat flux changes in different areas. In this process, the heat source area can be marked, and different colors can be used to distinguish the heat flux intensity, which is convenient for subsequent analysis of high heat flux density areas.

[0175] Step S53: performing heat flux density statistics based on the heat flux distribution map of the circuit board, thereby obtaining data of the circuit board area with high heat flux density;

[0176] In this embodiment, heat flux density statistics are performed based on the generated heat flux distribution map. Thresholds are set to identify high heat flux density areas, such as areas above a certain temperature (such as 80°C), and the coordinates and heat flux density values ​​of these areas are recorded. By writing a statistical analysis script, the number and distribution of these high heat flux density areas and their impact on the overall circuit board performance are counted to provide data support for subsequent optimization design.

[0177] Step S54: extracting circuit board routing features according to the optimized circuit board component structure model, thereby obtaining optimized circuit board routing data;

[0178] In this embodiment, the characteristics of the current circuit board routing are analyzed for optimizing the circuit board component structure model. The circuit board design is imported using CAD software (such as Altium Designer or Eagle) to extract routing data, including routing width, spacing, number of layers, and routing material properties. Combined with the thermal characteristics of the circuit board, bottleneck areas in the routing that may cause overheating are identified, providing a basis for subsequent optimization.

[0179] Step S55: Optimizing the heat flux balance routing layout of the high heat flux density circuit board area data according to the optimized circuit board routing data, thereby obtaining heat dissipation optimized routing layout data;

[0180] In this embodiment, based on the obtained routing data, the data of the high heat flux density area is analyzed to optimize the heat flux balanced routing layout. An optimization algorithm (such as genetic algorithm or particle swarm optimization) can be applied to adjust the routing path so that the heat flux is more evenly distributed. The goal is to combine the routing layout of the high heat flux density area with the cooling design, and finally output the heat dissipation optimized routing layout data and generate a circuit diagram of the new layout.

[0181] Step S56: Optimize the heat dissipation of the multi-layer circuit board on the optimized circuit board component structure model according to the heat dissipation optimization routing layout data, so as to obtain the optimal circuit board component structure model.

[0182] In this embodiment, the optimized circuit board component structure model is optimized for multi-layer circuit board heat dissipation according to the heat dissipation optimization routing layout data. By introducing methods such as heat sinks, heat sinks and reasonable air duct design, the entire system is thermally analyzed in combination with thermal flow simulation software to verify the effectiveness of the design. Finally, the optimal circuit board component structure model is obtained to achieve the best heat dissipation effect and ensure the stability and performance of the circuit board.

[0183] Optionally, the present specification also provides a printed circuit board simulation system for executing the printed circuit board simulation method as described above, the printed circuit board simulation system comprising:

[0184] A topology structure analysis module is used to obtain circuit board design data, and divide the circuit board design data into circuit board component hierarchies, thereby obtaining circuit board component hierarchical data; and perform circuit board component topology structure analysis based on the circuit board component hierarchical data, thereby obtaining a circuit board component topology structure model;

[0185] A circuit board working condition simulation module is used to extract circuit board structural material features from circuit board design data to obtain circuit board structural material data, and to perform circuit board working condition simulation based on the circuit board component topological structure model and circuit board structural material data to obtain circuit board working condition simulation data;

[0186] A signal integrity evaluation module is used to perform signal integrity evaluation based on circuit board working condition simulation data, thereby obtaining circuit board signal integrity data, and to divide the circuit board component topology structure model into signal abnormal component structures according to the circuit board signal integrity data, thereby obtaining signal abnormal component structure data;

[0187] The electromagnetic interference simulation module is used to optimize the multi-layer layout of the circuit board according to the signal abnormal component structure data, so as to obtain the optimized circuit board component structure model, and perform electromagnetic interference statistical simulation on the optimized circuit board component structure model, so as to obtain electromagnetic interference simulation data;

[0188] The circuit board heat dissipation optimization module is used to perform circuit board thermal management simulation according to the electromagnetic interference simulation data, so as to obtain the circuit board heat flow distribution map, and optimize the heat dissipation of the multi-layer circuit board on the optimized circuit board component structure model according to the circuit board heat flow distribution map, so as to obtain the optimal circuit board component structure model;

[0189] The circuit board printing strategy analysis module is used to obtain a circuit board printing parameter set, and perform circuit board printing strategy analysis on the optimal circuit board component structure model according to the circuit board printing parameter set, so as to obtain a circuit board printing strategy.

[0190] The printed circuit board simulation system of the present invention can implement any printed circuit board simulation method of the present invention, and is used to combine the operation and signal transmission medium between various modules to complete the printed circuit board simulation method. The internal modules of the system cooperate with each other, thereby improving the efficiency and reliability of circuit board design.

[0191] Optionally, the present specification also provides a storage medium storing a computer program, wherein the computer program implements the printed circuit board simulation method as described above when executed by a processor.

[0192] Therefore, the embodiments should be regarded as illustrative and non-restrictive from all points, and the scope of the present invention is limited by the appended claims rather than the above description, and it is therefore intended that all changes falling within the meaning and range of equivalent elements of the application documents are included in the present invention.

[0193] The above description is only a specific embodiment of the present invention, so that those skilled in the art can understand or implement the present invention. Various modifications to these embodiments will be apparent to those skilled in the art, and the general principles defined herein may be implemented in other embodiments without departing from the spirit or scope of the present invention. Therefore, the present invention will not be limited to the embodiments shown herein, but should conform to the widest scope consistent with the principles and novel features invented herein.

Claims

1. A printed circuit board simulation method, characterized in that: The following steps are involved: Step S1: Acquire circuit board design data, and divide the circuit board design data into circuit board component hierarchies, thereby obtaining circuit board component hierarchical data; perform circuit board component topological structure analysis based on the circuit board component hierarchical data, thereby obtaining a circuit board component topological structure model; Step S2: Extract the circuit board structural material features from the circuit board design data to obtain the circuit board structural material data, and perform circuit board working condition simulation based on the circuit board component topological structure model and the circuit board structural material data to obtain circuit board working condition simulation data. Step S2 is specifically as follows: Step S21: extracting circuit board structure material features and circuit board design working condition features from the circuit board design data, thereby obtaining circuit board structure material data and circuit board design working condition data; Step S22: performing circuit board structural material characteristic analysis based on the circuit board structural material data, thereby obtaining circuit board structural material characteristic data; Step S23: setting simulation boundary conditions according to the circuit board structural material characteristic data and the circuit board design working condition data, thereby obtaining working condition simulation boundary condition data; Step S24: filling the circuit board component topology model with structural material characteristics according to the circuit board structural material characteristic data, thereby obtaining a circuit board component simulation structural model; Step S25: performing circuit board working condition finite element simulation on the circuit board component simulation structure model according to the working condition simulation boundary condition data, thereby obtaining circuit board working condition simulation data; Step S3: Perform signal integrity evaluation based on the circuit board working condition simulation data to obtain circuit board signal integrity data, and divide the circuit board component topology structure model into signal abnormal component structures according to the circuit board signal integrity data to obtain signal abnormal component structure data. Step S3 is specifically as follows: Step S31: extracting electromagnetic simulation data from the circuit board working condition simulation data, thereby obtaining the circuit board electromagnetic simulation data; Step S32: performing component signal line simulation division on the circuit board electromagnetic simulation data to obtain a component signal line simulation data set, and performing signal line signal attenuation statistics on the component signal line simulation data set to obtain high attenuation signal line data and low attenuation signal line data; Step S33: integrating signal fluctuation features according to the signal line simulation data set to obtain signal line simulation signal fluctuation data, and performing signal line crosstalk correlation identification according to the signal line simulation signal fluctuation data to obtain signal line signal fluctuation correlation data; Step S34: performing signal line crosstalk frequency statistics according to the signal line signal fluctuation correlation data, thereby obtaining high-frequency crosstalk signal line data and low-frequency crosstalk signal line data; Step S35: performing a signal line intersection operation on the high attenuation signal line data and the high frequency crosstalk signal line data, thereby obtaining low signal integrity signal line data; performing a signal line intersection operation on the low attenuation signal line data and the low frequency crosstalk signal line data, thereby obtaining high signal integrity signal line data; Step S36: merging the low signal integrity signal line data and the high signal integrity signal line data to obtain circuit board signal integrity data, and associating the circuit board signal integrity data with signal lines according to the component signal line simulation data set to obtain circuit board component signal integrity data; Step S37: dividing the circuit board assembly topology model into components associated with low signal integrity signal lines according to the circuit board assembly signal integrity data, thereby obtaining signal abnormality component structure data; Step S4: Optimize the multi-layer layout of the circuit board according to the signal abnormal component structure data, so as to obtain an optimized circuit board component structure model, and perform electromagnetic interference statistical simulation on the optimized circuit board component structure model, so as to obtain electromagnetic interference simulation data. Step S4 is specifically as follows: Step S41: performing signal abnormal component density statistics on the signal abnormal component structure data through the circuit board component topology structure model, thereby obtaining high-density abnormal component area data and low-density abnormal component area data; Step S42: extracting circuit board component wiring features from the circuit board component topology model, thereby obtaining component wiring data; Step S43: reconstructing the abnormal component spacing layout of the high-density abnormal component area data according to the board wiring data, thereby obtaining component optimized layout data; Step S44: reconstructing the abnormal component signal cross routing for the low-density abnormal component area data according to the board wiring data, thereby obtaining component optimized routing data; Step S45: optimizing the layout and routing of the circuit board component simulation structure model according to the component optimization layout data and the component optimization routing data, thereby obtaining an optimized circuit board component structure model; Step S46: performing electromagnetic interference statistical simulation on the optimized circuit board component structure model to obtain electromagnetic interference simulation data; Step S5: performing a circuit board thermal management simulation according to the electromagnetic interference simulation data to obtain a circuit board heat flow distribution diagram, and performing multi-layer circuit board heat dissipation optimization on the optimized circuit board component structure model according to the circuit board heat flow distribution diagram to obtain an optimal circuit board component structure model; Step S6: Obtain a circuit board printing parameter set, and perform circuit board printing strategy analysis on the optimal circuit board component structure model according to the circuit board printing parameter set, thereby obtaining a circuit board printing strategy.

2. The printed circuit board simulation method according to claim 1, characterized in that: Step S1 is specifically as follows: Step S11: acquiring circuit board design data, and extracting circuit board structural features from the circuit board design data, thereby obtaining circuit board structural data; Step S12: classifying the circuit board structure data to obtain circuit board component structure data and circuit board assembly structure data; Step S13: dividing the circuit board component structure data into a tree-like hierarchy according to the circuit board panel structure data, thereby obtaining circuit board component hierarchy data; Step S14: performing component electrical characteristic analysis according to the circuit board component structure data to obtain component electrical characteristic data, and performing component electrical signal path connection according to the component electrical characteristic data to obtain component electrical signal path data; Step S15: constructing a circuit board component topology structure according to the circuit board component hierarchy data and the component electrical signal path data, thereby obtaining a circuit board component topology structure model.

3. The printed circuit board simulation method according to claim 2, characterized in that: Step S13 is specifically as follows: Step S131: performing circuit board component hierarchical integration according to the circuit board component structure data, thereby obtaining circuit board component hierarchical structure data; Step S132: extracting board wiring features from the circuit board structure data to obtain board wiring data; Step S133: extracting component connection structure features and component spatial distribution features according to the circuit board component structure data, thereby obtaining component connection structure data and component spatial distribution data; Step S134: performing panel-component connection association on the component connection structure data and the panel wiring data according to the component spatial distribution data, thereby obtaining panel-component connection association data; Step S135: Integrate the tree hierarchy of the circuit board according to the circuit board component hierarchy data and the board-component connection association data, so as to obtain the circuit board component hierarchy data.

4. The printed circuit board simulation method according to claim 2, characterized in that: Step S14 is specifically as follows: Step S141: extracting component structure function description features and component electrical features from the circuit board component structure data, thereby obtaining component structure function description data and component electrical feature data; Step S142: converting the component structure function description data into a function description text to obtain component structure function description text data, and clustering the component function descriptions according to the component structure function description text data to obtain component function clustering data; Step S143: performing component electrical characteristic analysis on the component electrical characteristic data to obtain component electrical characteristic data, and performing component electrical characteristic clustering according to the component electrical characteristic data to obtain component electrical clustering data; Step S144: performing a connected component intersection operation according to the component functional clustering data and the component electrical clustering data, thereby obtaining component connection data; Step S145: extracting circuit board component wiring features from the circuit board component hierarchy data, thereby obtaining circuit board hierarchy component wiring data; Step S146: Integrate the electrical signal path diagram according to the circuit board layer wiring data and the component connection data, so as to obtain the component electrical signal path data.

5. The printed circuit board simulation method according to claim 1, characterized in that: Step S5 is specifically as follows: Step S51: performing circuit board thermal management simulation on the electromagnetic interference simulation data, thereby obtaining circuit board thermal management simulation data; Step S52: drawing a heat flow distribution map of the circuit board according to the circuit board thermal management simulation data, thereby obtaining a heat flow distribution map of the circuit board; Step S53: performing heat flux density statistics based on the heat flux distribution map of the circuit board, thereby obtaining data of the circuit board area with high heat flux density; Step S54: extracting circuit board routing features according to the optimized circuit board component structure model, thereby obtaining optimized circuit board routing data; Step S55: Optimizing the heat flux balance routing layout of the high heat flux density circuit board area data according to the optimized circuit board routing data, thereby obtaining heat dissipation optimized routing layout data; Step S56: Optimize the heat dissipation of the multi-layer circuit board on the optimized circuit board component structure model according to the heat dissipation optimization routing layout data, so as to obtain the optimal circuit board component structure model.

6. A printed circuit board simulation system, characterized in that: For executing a printed circuit board simulation method as claimed in claim 1, the printed circuit board simulation system comprises: A topology structure analysis module is used to obtain circuit board design data, and divide the circuit board design data into circuit board component hierarchies, thereby obtaining circuit board component hierarchical data; and perform circuit board component topology structure analysis based on the circuit board component hierarchical data, thereby obtaining a circuit board component topology structure model; A circuit board working condition simulation module is used to extract circuit board structural material features from circuit board design data to obtain circuit board structural material data, and to simulate circuit board working conditions based on the circuit board component topological structure model and circuit board structural material data to obtain circuit board working condition simulation data; A signal integrity evaluation module is used to perform signal integrity evaluation based on circuit board working condition simulation data, thereby obtaining circuit board signal integrity data, and to divide the circuit board component topology structure model into signal abnormal component structures according to the circuit board signal integrity data, thereby obtaining signal abnormal component structure data; The electromagnetic interference simulation module is used to optimize the multi-layer layout of the circuit board according to the signal abnormality component structure data, so as to obtain the optimized circuit board component structure model, and perform electromagnetic interference statistical simulation on the optimized circuit board component structure model, so as to obtain electromagnetic interference simulation data; The circuit board heat dissipation optimization module is used to perform circuit board thermal management simulation according to the electromagnetic interference simulation data, so as to obtain the circuit board heat flow distribution map, and optimize the heat dissipation of the multi-layer circuit board on the optimized circuit board component structure model according to the circuit board heat flow distribution map, so as to obtain the optimal circuit board component structure model; The circuit board printing strategy analysis module is used to obtain a circuit board printing parameter set, and perform circuit board printing strategy analysis on the optimal circuit board component structure model according to the circuit board printing parameter set, so as to obtain a circuit board printing strategy.

7. A storage medium storing a computer program, characterized in that: When the computer program is executed by a processor, the printed circuit board simulation method according to any one of claims 1 to 5 is implemented.

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