Packaging method for realizing electromagnetic shielding function of GaAs chip and GaAs chip

Abstract

The invention discloses a packaging method for realizing an electromagnetic shielding function of a GaAs chip and the GaAs chip, and belongs to the technical field of semiconductor packaging. Comprising a packaging substrate, and the packaging substrate comprises a device region formed by a plurality of GaAs tube cores and a frame peripheral region surrounding the device region; the first electromagnetic shielding layer is formed on the side surface of the GaAs tube core; the second electromagnetic shielding layer is formed in the peripheral region of the frame; and the third electromagnetic shielding layer is positioned on the surface of the GaAs tube core and is electrically connected with the first electromagnetic shielding layer and the second electromagnetic shielding layer in a grounding manner. The first electromagnetic shielding layer, the second electromagnetic shielding layer and the third electromagnetic shielding layer are electrically connected to form a full-surrounding electromagnetic shielding structure on the peripheral side and the upper surface of the GaAs chip, so that the electromagnetic shielding effect of the GaAs chip is greatly improved, and the electromagnetic-sensitive GaAs chip is effectively protected.

Description

Technical Field

[0001] The invention relates to the technical field of semiconductor packaging, in particular to a packaging method for realizing the electromagnetic shielding function of a GaAs chip and a GaAs chip. Background Art

[0002] Semiconductor devices are commonly found in modern electronic products. Semiconductor devices perform a wide variety of functions, such as signal processing, high-speed computing, transmitting and receiving electromagnetic signals, controlling electronic devices, converting sunlight into electricity, and creating visual images for television displays. Semiconductor devices are found in the fields of communications, power conversion, networking, computers, entertainment, and consumer products. Semiconductor devices are also found in military applications, aviation, automobiles, industrial controllers, and office equipment.

[0003] As device size decreases and chip integration increases, semiconductor devices face severe electromagnetic compatibility (EMC) challenges in printed circuit board (PCB) design, package design, and chip design. Therefore, once the noise and electromagnetic interference can be reduced in the package or chip, the subsequent EMC design pressure at the PCB level and the entire machine can be greatly reduced, thereby significantly shortening the R&D cycle and reducing costs.

[0004] In semiconductor devices, gallium arsenide (GaAs) materials have special uses and diversity due to their high electron mobility and high saturation mobility, as well as heat resistance, radiation resistance, and sensitivity to magnetic fields. Their applications have extended to areas that silicon and germanium devices cannot reach. GaAs chips are mainly used in the manufacture of electronic devices, such as transistors, integrated circuits, optoelectronic devices, and laser devices. Based on the magnetic field sensitivity of GaAs materials, the GaAs semiconductor devices formed by them are more susceptible to electromagnetic interference. Therefore, it is important to study a GaAs chip that can achieve electromagnetic shielding function and its packaging method. Summary of the invention

[0005] In order to solve the problems existing in the above background technology, the present invention adopts the following technical solutions:

[0006] The present application provides a packaging method for realizing the electromagnetic shielding function of a GaAs chip, comprising the steps of:

[0007] Forming a plurality of GaAs tube cores having a first electromagnetic shielding layer on the side surfaces;

[0008] Transferring the GaAs dies to a packaging substrate, wherein the GaAs dies are distributed in an array on the packaging substrate;

[0009] forming a second electromagnetic shielding layer around the frame of the packaging substrate;

[0010] Filling the gaps between the GaAs tube cores with plastic sealing material to plastic seal each GaAs tube core and the second electromagnetic shielding layer;

[0011] forming a third electromagnetic shielding layer on the surface of the plastic packaging structure;

[0012] Among them, the first electromagnetic shielding layer includes a first conductive polymer film layer with conductive metal filler; the second electromagnetic shielding layer includes a metal conductive column; the third electromagnetic shielding layer is a multilayer structure including at least a second conductive polymer film layer; the first electromagnetic shielding layer, the second electromagnetic shielding layer and the third electromagnetic shielding layer are electrically connected.

[0013] As a preferred embodiment of the present application, the formation of a GaAs tube core having a first electromagnetic shielding layer on several sides includes: slicing a semiconductor wafer to form scribe lines; cutting the semiconductor wafer according to the scribe lines to form first cutting grooves; filling the first cutting grooves with a first conductive polymer film layer having a conductive metal filler; curing the first conductive polymer film layer having a conductive metal filler; and cutting the cured first conductive polymer film layer having a conductive metal filler to form a first electromagnetic shielding layer.

[0014] As a preferred solution of the present application, before curing the first conductive polymer film layer with conductive metal fillers, the method further includes thinning the back side of the semiconductor wafer until the first conductive polymer film layer with conductive metal fillers is exposed.

[0015] As a preferred solution of the present application, the depth of the first cutting groove is less than the thickness of the semiconductor wafer, and the first cutting groove is a groove with vertical side walls or a V-shaped groove with inclined side walls.

[0016] As a preferred solution of the present application, the second electromagnetic shielding layer is an integrated metal conductive column with vertical side walls, or an inverted T-shaped metal conductive column, or is composed of a plurality of stacked metal conductive columns.

[0017] As a preferred solution of the present application, the third electromagnetic shielding layer comprises a conductive polymer film layer having metal nanoparticles and a metal layer in sequence in a direction away from the GaAs core, wherein the thickness of the metal layer is greater than that of the conductive polymer film layer.

[0018] As a preferred solution of the present application, the third electromagnetic shielding layer includes a conductive silver paste layer and a metal layer in sequence in a direction away from the GaAs core, wherein the thickness of the metal layer is greater than the thickness of the conductive silver paste.

[0019] As a preferred solution of the present application, the metal layer includes a stacked nanocomposite film layer and a single metal layer.

[0020] As a preferred solution of the present application, after the first to third electromagnetic shielding layers are formed, the electromagnetic shielding layers are tested.

[0021] The present application also provides a GaAs chip that realizes the electromagnetic shielding function of the GaAs chip, which is packaged using the above-mentioned packaging method; it includes a packaging substrate, a device area composed of a plurality of GaAs tube cores and a frame peripheral area surrounding the device area on the packaging substrate; a first electromagnetic shielding layer formed on the side of the GaAs tube core, a second electromagnetic shielding layer formed in the frame peripheral area; and a third electromagnetic shielding layer located on the surface of the GaAs tube core and electrically connected to the first electromagnetic shielding layer and the second electromagnetic shielding layer.

[0022] Compared with the prior art, the present invention has the following beneficial effects:

[0023] The present invention provides a packaging method for realizing the electromagnetic shielding function of a GaAs chip and a GaAs chip. By forming a side shielding structure of the GaAs chip when cutting to form a plurality of discrete GaAs chips, the electromagnetic shielding effect of the peripheral side of the GaAs chip is improved. Furthermore, by forming the side shielding structure before transferring to a packaging substrate, the subsequent process can be further simplified, thereby improving the packaging efficiency of the GaAs chip.

[0024] The packaging method for realizing the electromagnetic shielding function of a GaAs chip and the GaAs chip of the present invention form the electromagnetic shielding films on the side and upper surface of the GaAs chip by different materials, form the side electromagnetic shielding film by a conductive polymer film, and form the upper surface composite electromagnetic shielding film by a nano-composite film layer and a metal film layer, so as to further improve the adhesion between the electromagnetic shielding film and the GaAs chip, and prevent the electromagnetic shielding film from falling off and causing electromagnetic shielding failure.

[0025] The packaging method and GaAs chip of the present invention for realizing the electromagnetic shielding function of GaAs chips include forming an edge electromagnetic shielding film by arranging conductive columns in the border area of ​​the packaging structure when multiple GaAs chips are integrated and packaged. The formation of the edge electromagnetic shielding film further protects the GaAs chips in the integrated packaging structure from interference from external electromagnetic waves, and effectively enhances the electromagnetic shielding effect of the GaAs chips.

[0026] The present invention realizes electrical connection and grounding through the first electromagnetic shielding layer, the second electromagnetic shielding layer and the third electromagnetic shielding layer to form a fully enclosed electromagnetic shielding structure on the circumference and upper surface of the GaAs chip, which greatly improves the electromagnetic shielding effect of the GaAs chip, so that the electromagnetically sensitive GaAs chip is effectively protected. The circumference is protected from electromagnetic interference in the lateral direction of the GaAs chip by the multi-layer shielding structure of the first electromagnetic shielding layer, the second electromagnetic shielding layer and / or the third electromagnetic shielding layer. At the same time, the first electromagnetic shielding layer is formed between the dies or components of the GaAs chip, which can protect the dies or components from mutual electromagnetic interference, thereby improving the reliability of the GaAs chip. The multi-layer structure of the third electromagnetic shielding layer can not only effectively improve the bonding force between the electromagnetic shielding layer and the chip, but also further improve the heat dissipation performance of the chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0027] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings required for use in the embodiments or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0028] Figure 1 It is a schematic diagram of the overall structure of the semiconductor wafer of the present invention;

[0029] Figure 2 A partial cross-sectional view of a semiconductor wafer of the present invention;

[0030] Figure 3 A partial cross-sectional view of a semiconductor wafer cutting process of the present invention;

[0031] Figure 4 A schematic diagram of filling a shielding material in a first cutting groove of a semiconductor wafer according to the present invention;

[0032] Figure 5 A schematic diagram of forming a first conductive polymer film layer on a semiconductor wafer of the present invention;

[0033] Figure 6 A schematic diagram of forming an independent GaAs die or assembly for the present invention;

[0034] Figure 7 A schematic diagram of transferring the GaAs die to a packaging substrate of the present invention;

[0035] Figure 8 A partial schematic diagram of a GaAs chip after forming a second electromagnetic shielding layer according to the present invention;

[0036] Fig. 9It is a partial schematic diagram of the GaAs chip after the third electromagnetic shielding layer is formed in the present invention;

[0037] Fig.10 is a schematic structural diagram of a third electromagnetic shielding layer according to an embodiment of the present invention;

[0038] Fig.11 is a schematic structural diagram of a third electromagnetic shielding layer according to another embodiment of the present invention;

[0039] Fig.12 is a schematic structural diagram of a third electromagnetic shielding layer according to another embodiment of the present invention; DETAILED DESCRIPTION

[0040] The technical solution of the present invention will be clearly and completely described below in conjunction with the embodiments. Obviously, the described embodiments are only part of the embodiments of the present invention, rather than all of the embodiments. Based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention. It should be noted that relational terms such as "first" and "second" are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any such actual relationship or order between these entities or operations.

[0041] The present invention is described in one or more embodiments in the following description with reference to the accompanying drawings, wherein like reference numerals represent the same or similar elements. Although the present invention is described in terms of the best mode for carrying out the purposes of the present invention, it will be appreciated by those skilled in the art that it is intended to cover substitutions, modifications and equivalents that may be included within the spirit and scope of the present invention as defined by the appended claims and their equivalents as supported by the following disclosure and drawings. The term "semiconductor die" as used herein refers to both the singular and the plural, and thus may refer to both a single semiconductor device and a plurality of semiconductor devices.

[0042] GaAs is a direct bandgap semiconductor, with the minimum energy of the conduction band and the maximum energy of the valence band at k=0. To form a half-filled energy band, it only needs to absorb energy (radiate photons). Currently, it is more used to make optical devices. Silicon and germanium are indirect bandgap semiconductors. The bottom of the conduction band and the top of the valence band are not at the same point in the K space. To form a half-filled energy band, it not only absorbs energy (radiates photons), but also changes momentum (radiates phonons). It is often used to make electronic devices. It can be seen that GaAs has higher electron mobility and saturation migration rate than silicon-based. In addition, GaAs materials also have the characteristics of heat resistance, radiation resistance and sensitivity to magnetic fields, which make GaAs materials have special uses and diversity. The application has extended to areas that silicon and germanium devices cannot reach.

[0043] The manufacture of semiconductor devices includes front-end manufacturing and back-end manufacturing. Front-end manufacturing refers to the process of forming multiple dies on the surface of a semiconductor wafer. Each die on the wafer contains active and passive electrical components, which are electrically connected to form a functional circuit. Back-end manufacturing refers to cutting or dividing the wafer completed by the front-end manufacturing into individual semiconductor dies and packaging the semiconductor dies for structural support, electrical interconnection and environmental isolation. The process of cutting or dividing semiconductor wafers includes forming scribe lines in non-functional areas of the wafer (called saw roads or scribe lines) and cutting using lasers or similar cutting tools. After the wafer is cut, a plurality of discrete semiconductor dies are obtained, which are mounted on a packaging substrate for packaging, and the packaging includes electrically connecting the semiconductor dies through the packaging substrate.

[0044] As the name implies, electromagnetic shielding (EMI) refers to shielding electromagnetic interference, and the principle of electromagnetic shielding is mainly based on the mechanism of wave reflection and wave absorption when electromagnetic waves pass through metal shielding bodies. EMI (Electromagnetic Interference) electromagnetic shielding film is a material used to suppress electromagnetic interference, and its structure can have different forms. Common EMI electromagnetic shielding film structures include single-layer metal film structure, multi-layer metal film structure, nano-composite film structure and elastic polymer film structure. EMI electromagnetic shielding film uses the conductivity, absorption and scattering ability of the material to prevent the propagation and interference of electromagnetic waves. By selecting appropriate shielding materials, structures and thicknesses, the effect of suppressing electromagnetic interference can be achieved and the normal operation of electronic equipment can be protected.

[0045] The present invention provides a packaging method and a GaAs chip for realizing the electromagnetic shielding function of a GaAs chip. By forming a side shielding structure of the GaAs chip when cutting to form a plurality of discrete GaAs chips, the electromagnetic shielding effect of the peripheral side of the GaAs chip is improved; and by forming the side shielding structure before transferring to the packaging substrate, the subsequent process can be further simplified, and the packaging efficiency of the GaAs chip can be improved. The packaging method and the GaAs chip for realizing the electromagnetic shielding function of the GaAs chip of the present invention form the electromagnetic shielding film on the side and the upper surface of the GaAs chip through different materials, form the side electromagnetic shielding film through a conductive polymer film, and form the upper surface composite electromagnetic shielding film through a nano-composite film layer and a metal film layer, further improve the adhesion between the electromagnetic shielding film and the GaAs chip, and prevent the electromagnetic shielding film from falling off and causing electromagnetic shielding failure. The packaging method and the GaAs chip for realizing the electromagnetic shielding function of the GaAs chip of the present invention include forming an edge electromagnetic shielding film by setting a conductive column in the frame area of ​​the packaging structure when multiple GaAs chips are integrated and packaged. The formation of the edge electromagnetic shielding film further protects the GaAs chip in the integrated packaging structure from interference from external electromagnetic waves, and effectively enhances the electromagnetic shielding effect of the GaAs chip.

[0046] Embodiment 1

[0047] The present invention provides a packaging method for realizing the electromagnetic shielding function of a GaAs chip, comprising the steps of:

[0048] S1, forming a plurality of GaAs tube cores having a first electromagnetic shielding layer on the side surface;

[0049] S2, transferring the GaAs dies to a packaging substrate, wherein the GaAs dies are distributed in an array on the packaging substrate;

[0050] S3, forming a second electromagnetic shielding layer around the frame of the packaging substrate;

[0051] S4, filling the gaps between the GaAs tube cores with a plastic encapsulation material to encapsulate the GaAs tube cores and the second electromagnetic shielding layer;

[0052] S5, forming a third electromagnetic shielding layer on the surface of the plastic package structure to complete the packaging;

[0053] Among them, the first electromagnetic shielding layer includes a first conductive polymer film layer with conductive metal filler; the second electromagnetic shielding layer includes a metal conductive column; the third electromagnetic shielding layer is a multilayer structure including at least a second conductive polymer film layer; the first electromagnetic shielding layer, the second electromagnetic shielding layer and the third electromagnetic shielding layer are electrically connected.

[0054] In step S1, refer to Figure 1-6, forming a plurality of GaAs tube cores with a first electromagnetic shielding layer on the side, specifically comprising: dicing a semiconductor wafer to form dicing lanes; cutting the semiconductor wafer according to the dicing lanes to form first cutting grooves; filling a first conductive polymer film layer with a conductive metal filler in the first cutting grooves; heat treating the first conductive polymer film layer with the conductive metal filler; and cutting the heat-treated first conductive polymer film layer with the conductive metal filler to form a first electromagnetic shielding layer.

[0055] Specifically,

[0056] like Figure 1 As shown, the semiconductor wafer 100 includes a plurality of GaAs dies or components 101 formed on a GaAs substrate 102 and a scribe line 103 for dividing the plurality of GaAs dies or components 101. The scribe line 103 provides a cutting area, and the semiconductor wafer 100 is divided into individual GaAs dies or components 101 according to the scribe line. In one embodiment, the semiconductor wafer 100 has a width or diameter of 50-500 millimeters (mm).

[0057] Figure 2 is a partial cross-sectional view of a semiconductor wafer 100, as shown in FIG. Figure 2 As shown, a semiconductor wafer 100 includes a plurality of GaAs tube cores or components 101, each GaAs tube core or component 101 has a lower surface 105 of a non-active area and an upper surface 104 of an active area, and the upper surface 104 includes an interconnection layer for realizing electrical interconnection of the tube core, through which the tube core or component can realize electrical connection with other electronic devices including conductive connection layers and electronic circuits, etc. The GaAs tube core or component 101 includes one or more transistors, diodes and other electronic components formed on a GaAs substrate 102, and other electronic components may include capacitors, inductors and resistors.

[0058] A first conductive layer 106 and a second conductive layer 107 thereon are formed. First, a conventional deposition process (including physical vapor deposition (PVD), chemical vapor deposition (CVD), electrolytic plating, electroless plating or other suitable metal deposition processes) is used to form a first conductive layer 106 on the upper surface 104 of the active area. The first conductive layer 106 may be one or more layers of aluminum (Al), copper (Cu), tin (Sn), nickel (Ni), gold (Au), silver (Ag) or other suitable conductive materials. The first conductive layer 106 serves as a contact pad and plays the role of conductive connection and conductive wiring. Then, a conductive material is deposited on the first conductive layer 106 using processes such as electroplating, ball drop or screen printing to form a second conductive layer 107 with solder ball bumps. The second conductive layer 107 may be Al, Sn, Ni, Au, Ag, lead (Pb), bismuth (Bi), Cu, solder and combinations thereof in a molten state. The conductive material is bonded to the first conductive layer 106 using the conventional aforementioned processes in the art. For example, the second conductive layer 107 may be formed by heating and reflow soldering to form a protrusion, or by bonding or thermal pressing to form a protrusion. In some embodiments, the second conductive layer 107 may be formed on an under-bump metallization (UBM) having a wetting layer, a barrier layer, and an adhesion layer. The second conductive layer 107 as a solder ball and the first conductive layer 106 as a contact pad together constitute the surface interconnect wiring layer of the GaAs die or component 101.

[0059] The scribe lines 103 are formed, wherein the scribe lines 103 can be planned according to the actual semiconductor circuit design. In this embodiment, the scribe lines are planned according to the GaAs die or component 101 to be cut, including horizontal and vertical lines, dividing the semiconductor experience 100 into separate GaAs die or component 101 areas.

[0060] Figure 3 FIG. 1 is a partial cross-sectional view of a semiconductor wafer 100 during a cutting process. Figure 3 As shown, a cutting tool 109 such as a laser or a saw blade is used to cut the semiconductor wafer 100 according to the scribe line 103 to form a first cutting groove 203. Figure 3 As shown, the depth of the first cutting groove 203 is less than the thickness of the semiconductor wafer 100. In this embodiment, the thickness of the semiconductor wafer 100 is also the thickness of the GaAs substrate 102. Figure 3The first cutting groove 203 shown is a groove with vertical sidewalls, but this does not affect the implementation of grooves of other shapes. Those skilled in the art can choose a groove structure of any shape as long as it can achieve the cutting of the semiconductor wafer into independent semiconductor dies or components. For example, the first cutting groove 203 can also be a V-shaped groove with inclined sidewalls. As the depth of the cutting groove deepens, the energy required to cut the groove with equal depth-to-width ratio needs to increase, and problems such as burrs caused by cutting will affect the performance of the semiconductor device. The use of a V-shaped groove with inclined sidewalls can solve the above problems well, and the use of a V-shaped groove with inclined sidewalls can also provide a wider contact surface for the subsequent first electromagnetic shielding layer, thereby making the adhesion between the first electromagnetic shielding layer and the semiconductor die or component stronger.

[0061] Figure 4 FIG. 1 is a schematic diagram of filling the shielding material in the first cutting groove of the semiconductor wafer of the present invention. Figure 4 As shown, the first conductive polymer film layer 108 having a conductive metal filler is filled in the first cutting groove 203, wherein the conductive metal filler includes but is not limited to metal nanoparticles, metal nanowires, etc. In this embodiment, the first conductive polymer film layer 108 having a conductive metal filler is a thermosetting film containing conductive metal nanoparticles or a thermosetting film containing a mixed filler of conductive metal nanoparticles and metal nanowires.

[0062] A further preferred embodiment also includes that after the first conductive polymer film layer 108 with conductive metal filler is filled into the first cutting groove 203, the first conductive polymer film layer 108 with conductive metal filler is heat-treated. The heat treatment process heats the first conductive polymer film layer 108 with conductive metal filler so that it is in a molten state. The first conductive polymer film layer 108 in the molten state has good fluidity and filling properties, and can evenly cover the surface of the first cutting groove. At the same time, the surface of the first cutting groove 203 is the side of the GaAs die or component 101. The GaAs die or component 101 has formed a plastic package for protecting and insulating the GaAs die or component 101 during the front-end process, that is, the surface of the first cutting groove 203 is a plastic package material, such as epoxy resin. During the heat treatment process, a curing reaction occurs between the first conductive polymer film layer 108 and the plastic package after heating, and a molecular chemical bond is formed between the first conductive polymer film layer 108 and the plastic package, thereby establishing a chemical bond connection, thereby greatly enhancing the interface bonding force between the first conductive polymer film layer 108 and the GaAs tube core or component 101, and avoiding the problem of easy falling off of the side electromagnetic shielding layer.

[0063] Among them, the mass ratio of the conductive metal filler in the first conductive polymer film layer is in the range of 50% to 85%. Preferably, when the conductive metal filler is conductive metal particles or conductive metal nanowires, the mass ratio is in the range of 80% to 85%; when the conductive metal filler is a mixture of conductive metal particles and conductive metal nanowires, the mass ratio can reach 50% to 70%, both of which can have a good conductive shielding effect; further, the heat treatment temperature is 100°C-300°C, preferably 150°C-210°C.

[0064] In the embodiment of the present application, a first conductive polymer film layer 108 having a conductive metal filler is formed on the side of the GaAs tube core or component 101 by heat treatment. Compared with the conventional method of setting a metal shell outside the GaAs tube core or component 101, the present application can reduce the packaging volume of the GaAs chip to a certain extent; at the same time, compared with the method of forming a metal coating by electroplating and the like, the GaAs tube core or component 101 of the present application is in a molten state during the heat treatment process, and can be evenly covered on the side of the GaAs tube core or component 101, and a chemical bond is formed between the side plastic package of the GaAs tube core or component 101, thereby improving the bonding strength of the electromagnetic shielding layer and avoiding the problem of easy shedding of the conventional metal coating and short circuit of the semiconductor chip caused by overflow plating during the electroplating process.

[0065] Figure 5 A schematic diagram of forming a first conductive polymer film layer on a semiconductor wafer of the present invention is shown. In another embodiment of the present application, before or after the first conductive polymer film layer with conductive metal fillers is heat treated, the back side of the GaAs substrate 102 of the semiconductor wafer is thinned until the first conductive polymer film layer with conductive metal fillers is exposed. The back side thinning can be performed using conventional thinning processes in the art, such as polishing, and conventional chemical mechanical polishing (CMP) can be used for polishing. In another embodiment of the present application, Figure 4-5 As shown, Figure 4 The back area where the first cutting groove is not formed is thinned until the first conductive polymer film layer 108 is exposed. The back thinning process can not only reduce the chip packaging volume, but also reduce the requirements for the cutting process and improve the device performance of the semiconductor chip, thereby saving costs.

[0066] Figure 6 Schematic diagram showing the present invention forming an independent GaAs die or assembly 101. Figure 6As shown, the first conductive polymer film layer with conductive metal fillers after heat treatment is cut to form a first electromagnetic shielding layer. After the first conductive polymer film layer is formed, the first conductive polymer film layer is cut by a cutting tool 109 such as a laser or a saw blade as mentioned above to form a first electromagnetic shielding layer 208, thereby dividing the semiconductor wafer into a plurality of independent GaAs dies or components 101. The cutting process is performed using conventional cutting processes in the art and will not be described in detail herein.

[0067] like Figure 6 As shown, each independent GaAs die or component 101 includes a GaAs substrate 102 and an interconnection wiring structure formed on the substrate, and also includes an electronic circuit structure formed in the GaAs substrate 102, and the electronic circuit structure is composed of triodes, transistors, diodes and other electronic components. At the same time, each independent GaAs die or component 101 also includes a first electromagnetic shielding layer 203 formed on all side surfaces thereof. The first electromagnetic shielding layer 203 is connected to the grounding layer to play an electromagnetic shielding role. In an embodiment of the present application, for example, the first electromagnetic shielding layer 203 can be connected to the grounding interconnection wiring to obtain the above-mentioned grounding structure.

[0068] In step S2, the GaAs dies are transferred to a packaging substrate, and the GaAs dies are distributed in an array on the packaging substrate, including:

[0069] Figure 7 The schematic diagram of transferring the GaAs die to the packaging substrate of the present invention is shown as follows. Figure 7 As shown, the independent GaAs tube core or component 101 is transferred to the packaging substrate 300. Among them, the transfer method can use the conventional chip transfer process in the art, which will not be repeated here; the packaging substrate 300 includes a multi-layer wiring (not shown in the figure) located in the packaging substrate, and the multi-layer wiring mainly serves to electrically connect with the electrical connection terminal led out of the tube core or component installed on the packaging substrate, and conduct the electrical connection to the back connection terminal of the packaging substrate to realize chip-level packaging. Further, the packaging substrate 300 also includes an interconnection structure located on its back, including a third conductive layer 301 that acts as a connection pad and a conductive bump located on the third conductive layer 301 that constitutes a fourth conductive layer 302, and the third conductive layer 301 and the fourth conductive layer 302 together constitute the interconnection structure. Further, the GaAs tube core is distributed in an array on the packaging substrate, and the independent GaAs tube core or component 101 is arranged in an array through a pre-designed integrated circuit array packaging structure, and is interconnected with the packaging substrate. The multilayer wiring and interconnection structure on the upper and lower surfaces of the package substrate 300 include a grounding layer for grounding the electromagnetic shielding layer of the GaAs chip. The electromagnetic shielding layer includes not only the first electromagnetic shielding layer but also the second and third electromagnetic shielding layers formed subsequently.

[0070] Figure 8 FIG. 4 shows a partial schematic diagram of a GaAs chip after forming a second electromagnetic shielding layer according to the present invention. Figure 8 , a second electromagnetic shielding layer 303 is formed around the frame side of the packaging substrate. The frame side refers to the area outside the device area surrounding the tube core or components on the packaging substrate. In order to form a semiconductor chip, it is necessary to package the array structure on the packaging substrate to form a fixed integrated support structure. The second electromagnetic shielding layer 303 includes a metal conductive column, wherein the metal conductive column is an integrated metal conductive column with a vertical side wall, such as an I-type conductive column or an inverted T-shaped metal conductive column, or a stacked structure of multiple sections of metal conductive columns.

[0071] like Figure 8 As shown, in one embodiment of the present application, the metal conductive column is an inverted T-shaped metal conductive column. The inverted T-shaped metal conductive column includes a metal gasket structure formed on the upper surface of the packaging substrate and a metal column structure formed on the metal gasket structure and extending longitudinally. Specifically, in one embodiment of the present application, the process of forming the second electromagnetic shielding layer 303 may include: first, forming a metal gasket structure around the peripheral side of the frame, and the width of the metal gasket structure can be set according to actual process requirements, and the present application does not limit this. Secondly, the metal column structure is grown with the metal gasket structure as the seed layer. In other embodiments of the present application, the second electromagnetic shielding layer 303 may also be formed by other means, such as forming the second electromagnetic shielding layer by a metal plating process or a deposition process.

[0072] Although, Figure 8 The second electromagnetic shielding layer shown is an inverted T-shaped metal conductive column, but those skilled in the art can understand that for other structures of the second electromagnetic shielding layer, such as an integrated metal conductive column with vertical side walls such as an I-type conductive column or a stacked structure of multiple sections of metal conductive columns, within the scope of the knowledge of those skilled in the art, conventional processes in the field can be used to form corresponding structures, and the specific process will not be described here.

[0073] The present application forms a second electromagnetic shielding layer 303 around the periphery of the frame of the packaging substrate to provide metal support on the periphery of the frame, thereby further improving the stability of the GaAs chip packaging structure. At the same time, the second electromagnetic shielding layer formed on the periphery of the frame can also improve the electromagnetic shielding function of the GaAs chip packaging structure, further reduce the external electromagnetic interference of the chip in the packaging structure, and greatly reduce the problem of electromagnetic interference leakage in the packaging structure. Compared with the traditional packaging structure with a single electromagnetic shielding structure, the present application adds an electromagnetic shielding layer on the periphery of the frame of the packaging body to effectively compensate for the problems caused by the failure of the electromagnetic shielding structure of the chip in the packaging body. The first electromagnetic shielding layer for side self-shielding is formed in the chip packaging structure of the present application, and the second electromagnetic shielding layer for side electromagnetic shielding is formed on the periphery of the packaging structure, forming a double insurance for electromagnetic shielding on the periphery of the GaAs chip packaging structure, which greatly guarantees the electromagnetic shielding function of the GaAs chip packaging structure.

[0074] In the embodiments of the present application, Figure 8 As shown, it also includes step S4, filling plastic encapsulation material 304 between GaAs tube cores, plastic encapsulating each GaAs tube core and the second electromagnetic shielding layer to form a plastic encapsulation structure of the GaAs chip. Among them, the filled plastic encapsulation material 304 can be a polymer composite material, such as epoxy resin, epoxy acrylate or a polymer with or without filler. The plastic encapsulation material 304 is insulating, provides structural support for the GaAs chip, and can protect the GaAs chip from external components and pollutants, such as preventing water vapor or corrosion from entering the GaAs chip. The method of filling the plastic encapsulation material can adopt processes such as injection, coating and printing. Filling the plastic encapsulation material also includes thinning the plastic encapsulation material to expose the upper surface of the GaAs tube core or component 101. In the embodiment of the present application, the plastic encapsulation material can be thinned with the second electromagnetic shielding layer as a stop layer, and the specific thinning process adopts a conventional thinning process and is not repeated here.

[0075] Fig. 9 FIG. 1 shows a partial schematic diagram of a GaAs chip after forming a third electromagnetic shielding layer according to the present invention. Fig. 9 As shown, the present application also includes step S5, forming a third electromagnetic shielding layer 400 on the surface of the plastic packaging structure. The third electromagnetic shielding layer 400 is a multilayer structure including at least a second conductive polymer film layer. The formation method of the third electromagnetic shielding layer 400 includes but is not limited to coating, electroplating and deposition processes. The third electromagnetic shielding layer 400 is formed on the surface of the plastic packaging structure including but not limited to the upper surface. In one embodiment of the present application, the third electromagnetic shielding layer 400 is only formed on the upper surface of the plastic packaging structure. However, in other embodiments of the present application, the third electromagnetic shielding layer 400 is not only formed on the upper surface of the plastic packaging structure but also on the side surface of the plastic packaging structure to form a fully enclosed structure.

[0076] Although in Fig. 9 In the embodiment, it is only shown that the third electromagnetic shielding layer 400 is only formed on the upper surface of the plastic packaging structure. The following specific implementation process takes this as an example. For other implementations of the present application, those skilled in the art can perform equivalent transformations on this basis, which will not be described one by one here.

[0077] Further, in order to further enhance the electromagnetic shielding effect and the stability of the electromagnetic shielding layer, the third electromagnetic shielding layer 400 includes a second conductive polymer film layer 401 and a metal layer 402. The second conductive polymer film layer 401 is a polymer film layer filled with a conductive material. In some embodiments, the conductive material is a metal nanoparticle 501 or a metal nanowire (not shown). In some embodiments, the conductive material is a carbon nanotube or a carbon nanowire. The metal layer 402 can be a single-layer single-substance metal layer or a multilayer structure including a nano-composite film layer and a single-substance metal layer. The thickness of the metal layer 402 is greater than the thickness of the second conductive polymer film layer 401. The single-substance metal layer includes at least one metal such as copper (Cu), aluminum (Al), silver (Ag), tin (Sn), gold (Au), nickel (Ni), lead (Pb), titanium (Ti) or their alloys. The second conductive polymer film layer is similar to the first electromagnetic shielding layer. The polymerization characteristics of the polymer enable the second conductive polymer film layer to form a chemical bond connection with the surface of the plastic package structure coated thereon, thereby enhancing the bonding force between the third electromagnetic shielding layer and the chip. A seed growth force relationship is also established between the conductive filler in the conductive polymer film layer and the metal layer, thereby further strengthening the adhesion between the film layers, thereby avoiding problems such as the electromagnetic shielding layer falling off and causing shielding failure.

[0078] like Fig.10As shown, the second conductive polymer film layer 401 is a conductive polymer film layer single-layer structure filled with metal nanoparticles 501, wherein the metal nanoparticles 501 are uniformly dispersed in the polymer in a mixed form. The polymer may include polymers such as epoxy resin and acrylic resin, and the polymer has fluidity and filling properties. In actual use, the metal nanoparticles 501 can be added to the polymer in advance, and the polymer can be molten by heating or other methods, and the metal nanoparticles 501 can be uniformly mixed into the polymer by stirring or other mixing methods to form a metal nanoparticle coating solution. In the actual process, the coating solution in the molten state is first coated on the upper surface of the plastic packaging structure to form the second conductive polymer film layer 401; then, the metal layer 402 is formed on the second conductive polymer film layer 401. By first forming a conductive polymer film layer 401 filled with metal nanoparticles 501 on the surface of the plastic packaging structure, the interface bonding force between the conductive polymer film layer and the surface of the plastic packaging structure can be improved, similar to the first conductive polymer film layer, which will not be repeated here. At the same time, the heat dissipation capacity of the chip can be further increased. In addition, a single metal layer is formed on the conductive polymer film layer 401 filled with metal nanoparticles 501, and the metal layer can be grown by using the metal nanoparticles in the conductive polymer film layer 401 as seeds, thereby strengthening the adhesion between the conductive polymer film layer 401 and the metal layer 402. At the same time, by setting the thickness of the metal layer to be greater than the thickness of the second conductive polymer film layer 401, the thickness of the electromagnetic shielding layer can be reduced to the maximum extent, thereby reducing the volume of the packaged chip and further improving the integration of the device. Moreover, setting the thickness of the metal layer to be greater than the thickness of the second conductive polymer film layer 401 can also improve the electromagnetic shielding effect of the semiconductor chip.

[0079] like Fig.11 As shown in FIG. 4 , the conductive material filled in the second conductive polymer film layer 401 is conductive nanowires. Fig.10 The principle when the conductive material filled is metal nanoparticles 501 is similar and will not be repeated here.

[0080] like Fig.12 As shown, in the third electromagnetic shielding layer 400, the metal layer 402 includes a nano-composite film layer 403 and a single metal layer 404 stacked in sequence, and the second conductive polymer film layer 401 is a conductive silver glue layer. The adhesive layer in the conductive silver glue layer 401 improves the adhesion between the second conductive polymer film layer 401 and the plastic packaging structure; the conductive material improves the interface bonding force between the second conductive polymer film layer 401 and the metal layer. In addition, the nano-composite film layer 403 is formed between the single metal layer and the second conductive polymer film layer 401, which can better complete the establishment of a good internal connection between the second conductive polymer film layer 401 and the metal in the metal layer. And the thickness of the single metal layer can also be reduced by the nano-composite film layer 403, thereby achieving the purpose of cost saving.

[0081] The present application forms the first electromagnetic shielding layer, the second electromagnetic shielding layer and the third electromagnetic shielding layer in different stages, and forms the first to third electromagnetic shielding layers by different structures and materials. The packaging method process of the GaAs chip can be matched with the characteristics of different structures of the chip structure to achieve the effect of comprehensive electromagnetic shielding of the GaAs chip. The packaging method of the present application first forms the first electromagnetic shielding layer on the side during the cutting process of the tube core or component, so that the electromagnetic interference between the tube cores or components in the GaAs chip is shielded; at the same time, the second electromagnetic shielding layer is formed on the peripheral side of the frame of the GaAs chip, and the first electromagnetic shielding layer forms a lateral double shielding cover, thereby improving the anti-interference ability between the GaAs chip and other chips or other electronic devices. The packaging method of the present application also forms a third electromagnetic shielding layer on the surface of the packaging structure after the first electromagnetic shielding layer and the second electromagnetic shielding layer are formed. When it is formed on the upper surface of the packaging structure, it can be directly coated as a whole, which not only simplifies the process but also improves the packaging efficiency. And the multi-layer structure of the third electromagnetic shielding layer not only improves the stability of the shielding layer but also further improves the heat dissipation capacity of the GaAs chip.

[0082] Embodiment 2

[0083] The present invention provides another packaging method for realizing the electromagnetic shielding function of a GaAs chip. The difference between the another packaging method and the first embodiment is that the method includes a step of detecting the electromagnetic shielding layer after the first to third electromagnetic shielding layers are formed. The rest of the packaging process is the same as the first embodiment and will not be repeated here.

[0084] Specifically, the step of testing the electromagnetic shielding layer includes testing the adhesion of the electromagnetic shielding layer and testing the electrical connection between the electromagnetic shielding layer and the grounding layer. After the third electromagnetic shielding layer is formed, it also includes testing the electromagnetic interference generated by the GaAs chip as a whole and the electromagnetic interference received by the internal devices of the chip.

[0085] Furthermore, the adhesion test of the electromagnetic shielding layer includes testing the adhesion strength of the electromagnetic shielding layer, whether there are gaps at the bonding interface, whether there is peeling or falling off, etc.

[0086] Furthermore, the electrical connection between the electromagnetic shielding layer and the grounding layer is detected, including detecting whether the potential of the electromagnetic shielding layer is zero.

[0087] Furthermore, the electromagnetic interference generated by the GaAs chip as a whole and the electromagnetic interference received by the internal devices of the chip are detected, including placing the GaAs chip in a test environment, adding electromagnetic wave interference to the test environment, and detecting whether the electrical properties of the GaAs chip change, so as to determine whether the electromagnetic shielding layer of the GaAs chip has a shielding leakage area. At the same time, the electromagnetic wave signal released by the GaAs chip when it is working can be detected in the test environment, and by monitoring the band of the electromagnetic wave signal, it can be determined whether it has a shielding leakage area.

[0088] The preferred solution of the present application also includes analyzing and processing the test results, and performing early warning and feedback processing if electromagnetic shielding defects are detected.

[0089] For example, when testing the adhesion of the electromagnetic shielding layer, once gaps, peeling or falling off are detected, the electromagnetic shielding layer is repaired, and the test results and repair status are fed back to the packaging process flow, and the relevant operators optimize the parameters of the process flow to improve the packaging quality of the GaAs chip.

[0090] For example, when testing the electrical connection between the electromagnetic shielding layer and the grounding layer, once the potential of the electromagnetic shielding layer is detected to be non-zero, the interconnection structure between the electromagnetic shielding layer and the grounding layer is checked and repaired, thereby avoiding problems such as circuit short circuits caused by improper connection of the interconnection structure, and further improving the packaging quality of the GaAs chip.

[0091] For example, when detecting the electromagnetic interference generated by the entire GaAs chip and the electromagnetic interference received by the internal devices of the chip, once the shielding leakage area is detected, the GaAs chip is placed in the defective area, and then the electromagnetic shielding layer of each GaAs chip in the defective area is detected and checked one by one to find the cause of the shielding leakage area, and a repair method and an optimization plan are proposed. The repairable GaAs chip is repaired and placed in the qualified area. Compared with scrapping due to defects, the present invention can save costs. In addition, the optimization plan is fed back to the packaging process flow, and the relevant operators optimize the parameters of the process flow to improve the packaging quality of the GaAs chip.

[0092] Embodiment 3

[0093] The present invention also provides a GaAs chip that realizes the electromagnetic shielding function of the GaAs chip, which is packaged using the above packaging method; Fig. 9As shown, the GaAs chip includes a packaging substrate 300, a device area composed of a plurality of GaAs tube cores or components 101 on the packaging substrate, and a frame peripheral area surrounding the device area; the GaAs chip includes a first electromagnetic shielding layer 208 formed on the side of the GaAs tube core or component, a second electromagnetic shielding layer 303 formed in the frame peripheral area, and a third electromagnetic shielding layer 400 located on the surface of the GaAs tube core or component and electrically connected to the first electromagnetic shielding layer 208 and the second electromagnetic shielding layer 303.

[0094] The first electromagnetic shielding layer, the second electromagnetic shielding layer and the third electromagnetic shielding layer are connected to the ground layer of the GaAs chip.

[0095] The present application realizes electrical connection and grounding through the first electromagnetic shielding layer, the second electromagnetic shielding layer and the third electromagnetic shielding layer to form a fully enclosed electromagnetic shielding structure on the circumference and upper surface of the GaAs chip, which greatly improves the electromagnetic shielding effect of the GaAs chip, so that the electromagnetically sensitive GaAs chip is effectively protected. The circumference is protected from electromagnetic interference in the lateral direction of the GaAs chip by the multi-layer shielding structure of the first electromagnetic shielding layer, the second electromagnetic shielding layer and / or the third electromagnetic shielding layer. At the same time, the first electromagnetic shielding layer is formed between the dies or components of the GaAs chip, which can protect the dies or components from mutual electromagnetic interference, thereby improving the reliability of the GaAs chip. The multi-layer structure of the third electromagnetic shielding layer can not only effectively improve the bonding force between the electromagnetic shielding layer and the chip, but also further improve the heat dissipation performance of the chip.

[0096] While one or more embodiments of the present invention have been described in detail, those skilled in the art will appreciate that modifications and adaptations may be made to those embodiments to create other implementations understandable to those skilled in the art without departing from the scope of the invention as set forth in the appended claims.

Claims

1. A method for packaging a GaAs chip to achieve electromagnetic shielding function, characterized in that: Includes steps: Forming a plurality of GaAs tube cores having a first electromagnetic shielding layer on the side surfaces; Transferring the GaAs dies to a packaging substrate, wherein the GaAs dies are distributed in an array on the packaging substrate; forming a second electromagnetic shielding layer around the frame of the packaging substrate; Filling the gaps between the GaAs tube cores with plastic sealing material to plastic seal each GaAs tube core and the second electromagnetic shielding layer; Forming a third electromagnetic shielding layer on the surface of the plastic package structure to complete the package; The first electromagnetic shielding layer comprises a first conductive polymer film layer having a conductive metal filler; the second electromagnetic shielding layer comprises a metal conductive column; the third electromagnetic shielding layer is a multilayer structure comprising at least the second conductive polymer film layer; the first electromagnetic shielding layer, the second electromagnetic shielding layer and the third electromagnetic shielding layer are all electrically connected to the ground; The step of forming a plurality of GaAs tube cores with first electromagnetic shielding layers on their side surfaces includes heat treating the first conductive polymer film layer with conductive metal fillers.

2. The method for packaging a GaAs chip to achieve electromagnetic shielding function according to claim 1, characterized in that: The method for forming a GaAs tube core having a first electromagnetic shielding layer on several sides also includes: slicing a semiconductor wafer to form slicing lanes; cutting the semiconductor wafer according to the slicing lanes to form first cutting grooves; filling the first conductive polymer film layer having a conductive metal filler in the first cutting grooves; and cutting the first conductive polymer film layer having a conductive metal filler after heat treatment to form a first electromagnetic shielding layer.

3. The method for packaging a GaAs chip to achieve electromagnetic shielding function according to claim 2, characterized in that: Before or after heat treating the first conductive polymer film layer with conductive metal fillers, the method further includes thinning the back side of the semiconductor wafer until the first conductive polymer film layer with conductive metal fillers is exposed.

4. A packaging method for realizing the electromagnetic shielding function of a GaAs chip according to claim 2 or 3, characterized in that: The depth of the first cutting groove is less than the thickness of the semiconductor wafer, and the first cutting groove is a groove with a vertical side wall or a V-shaped groove with an inclined side wall.

5. The method for packaging a GaAs chip to achieve electromagnetic shielding function according to claim 1, characterized in that: The second electromagnetic shielding layer is an I-shaped metal conductive column with vertical side walls, or an inverted T-shaped metal conductive column, or a stacked structure consisting of multiple sections of metal conductive columns.

6. The method for packaging a GaAs chip to achieve electromagnetic shielding function according to claim 1, characterized in that: The third electromagnetic shielding layer includes, in sequence in a direction away from the GaAs core, a first conductive polymer film layer having metal nanoparticles and a metal layer, wherein the thickness of the metal layer is greater than that of the first conductive polymer film layer.

7. The method for packaging a GaAs chip to achieve electromagnetic shielding function according to claim 1, characterized in that: The third electromagnetic shielding layer includes a conductive silver paste layer and a metal layer in sequence in a direction away from the GaAs core, wherein the thickness of the metal layer is greater than the thickness of the conductive silver paste.

8. The method for packaging a GaAs chip to achieve electromagnetic shielding function according to claim 7, characterized in that: The metal layer includes a stacked nanocomposite film layer and a single metal layer.

9. The method for packaging a GaAs chip to achieve electromagnetic shielding function according to claim 1, characterized in that: After the first to third electromagnetic shielding layers are formed, electromagnetic interference detection is included.

10. A GaAs chip that realizes the electromagnetic shielding function of the GaAs chip, characterized in that: The GaAs chip is packaged using a packaging method for realizing the electromagnetic shielding function of a GaAs chip as described in any one of claims 1 to 9; The invention comprises a packaging substrate, a device area composed of a plurality of GaAs tube cores and a frame peripheral area surrounding the device area on the packaging substrate; a first electromagnetic shielding layer formed on the side of the GaAs tube core, and a second electromagnetic shielding layer formed on the frame peripheral area; A third electromagnetic shielding layer is located on the upper surface of the GaAs tube core and is electrically connected to the first electromagnetic shielding layer and the second electromagnetic shielding layer.

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