Cavity package carrier and processing method thereof

Abstract

The processing method comprises the following steps: carrying out etching, lamination and UV cutting on a double-sided copper-clad plate A to prepare a first part of which the warping degree is a non-zero value and which is provided with a first copper layer and a through groove; performing single-sided circuit pattern manufacturing on the double-sided copper-clad plate B to obtain a second part provided with an inner-layer circuit; the first component and the second component are connected through a bonding layer in a pressing mode, an intermediate plate B with a blind groove is obtained, and the blind groove is formed by a through groove and a second component which seals one port of the through groove in a partially-enclosed mode; and the bonding layer on the bottom of the blind groove is removed through laser, interlayer conduction, blind groove metallization, outer layer circuit manufacturing and outer layer solder mask operation are carried out on the intermediate plate B, and the Cavity packaging carrier plate is obtained. According to the processing method, the alignment precision of the holes, the grooves and the circuit patterns in the packaging carrier plate can be improved, and the defect that a sandwich structure is prone to deviation in the assembling process is overcome; the alignment degree of the obtained Cavity packaging carrier plate is high, and the packaging test difficulty of a circuit board product is reduced.

Description

Technical Field

[0001] The present invention relates to the technical field of circuit boards, and in particular to a Cavity packaging carrier board and a processing method thereof. Background Art

[0002] With the development of electronic technology and people's demand for miniaturization and high integration of electronic products, the size of packaging substrates is getting smaller and smaller. Correspondingly, this has resulted in higher and higher requirements for the packaging and testing of "sandwich" structure circuit board products.

[0003] However, due to factors such as material expansion and contraction and alignment, the "sandwich" structure is prone to deviation during assembly, which can cause problems such as cutting offset and air leakage when cutting the finished circuit board.

[0004] In view of this, the present invention is proposed. Summary of the invention

[0005] In order to overcome the above-mentioned defects, the present invention provides a Cavity packaging carrier and a processing method thereof. The processing method is simple, reasonable and easy to implement, and can effectively improve the alignment accuracy of holes, grooves and circuit patterns in the packaging carrier structure, thereby effectively improving the defect that the "sandwich" structure is prone to deviation during assembly; the Cavity packaging carrier manufactured by the processing method has a high alignment degree, effectively reduces the difficulty of packaging and testing of circuit board products, and can be well applied to the production of electronic products.

[0006] The technical solution adopted by the present invention to solve the technical problem is: a method for processing a cavity packaging carrier, comprising the following steps:

[0007] S1: making the first component and the second component;

[0008] The double-sided copper-clad laminate A is etched and laminated to obtain an intermediate plate A with a non-zero warpage and a first copper layer on one side; the intermediate plate A is UV cut to obtain the first component with a through groove;

[0009] The double-sided copper-clad laminate B is subjected to single-sided circuit patterning to obtain the second component provided with inner-layer circuits;

[0010] S2: The first component and the second component are pressed and connected by an adhesive layer in such a manner that the first component is opposite to the inner layer circuit, so as to obtain an intermediate board B provided with a blind groove; wherein the blind groove is formed by the partial encirclement of the through groove and the second component closed at one end of the through groove;

[0011] S3: After laser cleaning the adhesive layer on the bottom of the blind groove, the intermediate board B is sequentially subjected to interlayer conduction, metallized blind groove, outer layer circuit production and outer layer solder mask operations to obtain a Cavity package carrier.

[0012] As a further improvement of the present invention, in the above S1, the warping degrees of the intermediate plate A and the first component are both 2-4 mm.

[0013] As a further improvement of the present invention, in the above S1, when UV cutting is performed on the intermediate plate A, positioning holes are also processed on the intermediate plate A.

[0014] As a further improvement of the present invention, in the above S1, the specific processing parameters for UV cutting of the intermediate plate A are: light output power 50-70W, light frequency 800-1200Hz, and galvanometer speed 800-1200mm / s.

[0015] As a further improvement of the present invention, in the above S2, the adhesive layer is made of pure glue or low-flow glue prepreg, and is arranged on the side of the second component where the inner layer circuit is arranged through a pre-lamination process.

[0016] As a further improvement of the present invention, in the above S3, a CO2 laser drilling machine is used to remove the adhesive layer on the bottom of the blind groove, and the processing parameters of the CO2 laser drilling machine are: laser pulse width is 5 to 8 μs, laser energy is 3.5 to 6.2 MJ, and the number of laser shots is 2 to 4 shots.

[0017] As a further improvement of the present invention, in the above S3, the method of interlayer conduction includes CCD drilling, electroplating, resin plugging, grinding and cap electroplating processing performed in sequence; wherein the position accuracy of the CCD drilling is controlled within ±15μm.

[0018] As a further improvement of the present invention, in the above S3, the method for making the outer layer circuit includes sequentially performing pre-coating treatment, coating with an anti-corrosion photosensitive film, LDI exposure, development, tin plating, film stripping, alkaline etching and tin stripping processing.

[0019] As a further improvement of the present invention, the Cavity packaging carrier is subjected to conventional surface treatment, molding, electrical testing, finished product inspection, packaging and shipment in sequence, thus completing the production of the subsequent required Cavity packaging carrier finished product.

[0020] The present invention also provides a Cavity packaging carrier board, which is manufactured by using the processing method of the Cavity packaging carrier board as described in the present invention.

[0021] The beneficial effects of the present invention are as follows: Compared with the prior art, ① the present invention can balance the product warping caused by the large difference between the two components when the first component and the second component are pressed together in the later process by designing the first component to have a certain warpage, thereby greatly improving the flatness of the finished Cavity package carrier, and effectively improving the defect of the "sandwich" structure that is prone to deviation during assembly. ② The present invention uses a CCD automatic positioning drilling machine with a position accuracy that can be controlled within ±15μm to process and manufacture through holes, alignment holes, etc., so that the position accuracy of the obtained holes is very high; in particular, the alignment holes are further drilled by the positioning holes on the first component, which further improves the alignment accuracy of the holes, grooves and circuit patterns in the package carrier structure, and further improves the defect of the "sandwich" structure that is prone to deviation during assembly. ③ The present invention immediately performs a laser cleaning operation on the adhesive layer on the blind groove after the first component and the second component are pressed together, which is beneficial to improving the processing quality of the metallized blind groove operation in the subsequent process and avoiding the copper nodule problem caused by the overflow of the adhesive layer. In short, the processing method provided by the present invention is simple, reasonable, and easy to implement, which effectively improves the alignment accuracy of the holes, grooves and circuit patterns in the packaging carrier structure, thereby effectively improving the "sandwich" structure that is prone to deviation during assembly; accordingly, the Cavity packaging carrier produced by the processing method has a high degree of alignment, which effectively reduces the difficulty of packaging and testing of circuit board products, and can be well applied to the production of electronic products. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 It is a flow chart of the method for processing the Cavity packaging substrate of the present invention;

[0023] Figure 2 This is a schematic cross-sectional structure diagram of the first component in Example 1 of the present invention;

[0024] Figure 3 This is a schematic cross-sectional structure diagram of the second component in Example 1 of the present invention;

[0025] Figure 4 It is a schematic diagram of a state where the adhesive layer is attached to the second component in Embodiment 1 of the present invention;

[0026] Figure 5 This is a schematic cross-sectional structure diagram of the intermediate plate B described in Example 1 of the present invention;

[0027] Figure 6 This is a schematic cross-sectional structure diagram of the intermediate plate C described in Example 1 of the present invention;

[0028] Figure 7 It is a schematic diagram of the cross-sectional structure of the Cavity packaging carrier described in Example 1 of the present invention.

[0029] Combined with the attached drawings, the following description is given:

[0030] 1. first component; 10. first copper layer; 11. through groove; 12. positioning hole;

[0031] 13. Insulating substrate A; 14. Prepreg; 2. Second component; 20. Inner layer circuit; 21. Insulating substrate B; 22. Second copper layer; 3. Adhesive layer; 4. Blind groove; 50. Metallization layer; 51. Thickened copper layer; 52. Connecting copper body; 6. Outer layer circuit; 7. Solder mask. DETAILED DESCRIPTION

[0032] The preferred embodiments of the present invention are described in detail below in conjunction with the accompanying drawings.

[0033] Embodiment 1:

[0034] Please refer to the attached Figures 1 to 7 As shown, this embodiment 1 provides a method for processing a Cavity packaging carrier (the Cavity packaging carrier is a packaging carrier with a U-shaped cavity), which includes the following steps:

[0035] S1: Making a first component 1 and a second component 2; wherein,

[0036] The manufacturing method of the first component 1 is:

[0037] S111: Provide a double-sided copper-clad laminate A, which is composed of an insulating substrate A13 and two copper foil layers fixedly disposed on opposite sides of the insulating substrate A13. Further, the insulating substrate A13 is preferably made of PP glass fiber cloth, and the type and number of the PP glass fiber cloth used are matched according to the product thickness requirements, and this embodiment does not limit it.

[0038] S112: First, according to the processing requirements, the two copper foil layers on the double-sided copper-clad laminate A are etched off, and then the prepreg 14 and the first copper layer 10 are stacked on one side of the insulating substrate A13 in sequence, and then hot pressing and laminating are performed to obtain an intermediate board A with a non-zero warpage; it can be understood that ① the intermediate board A belongs to a single-sided copper-clad laminate structure; ② by designing the intermediate board A to have a certain warpage: the warpage of the intermediate board A in this embodiment 1 is optimally controlled to be 2-4 mm, which can balance the product warpage caused by the large difference between the two components when the first component 1 and the second component 2 are pressed and connected in the later process, thereby greatly improving the flatness of the finished Cavity package carrier board, and effectively improving the "sandwich" structure that is prone to deviation during assembly. ③ The thickness of the prepreg 14 and the first copper layer 10 are matched according to the product thickness requirements, and this embodiment does not limit it. ④ The above-mentioned hot pressing and laminating process is a common technical means in the field of circuit board processing, so it will not be described in detail here.

[0039] S113: UV cutting is performed on the intermediate plate A to obtain the first component 1 having the through groove 11 and the positioning hole 12. For details, please refer to the attached Figure 2 As shown. It can be understood that ① the warping degree of the first component 1 is the same or similar to that of the intermediate plate A, which is also 2 to 4 mm. ② The processing quantity and processing position of the through groove 11 and the positioning hole 12 are determined according to the processing requirements, and this embodiment 1 does not impose any restrictions. ③ Regarding the specific processing parameters during the above-mentioned UV cutting process, this embodiment 1 preferably adopts: light output power 50 to 70 W, light frequency 800 to 1200 Hz, and galvanometer speed 800 to 1200 mm / s. ④ When UV cutting the intermediate plate A, riveting holes can also be processed on the intermediate plate A to enhance the firmness of the first component 1 and the second component 2 when they are press-fitted and connected in the subsequent process.

[0040] The manufacturing method of the second component 2 is:

[0041] S121: Provide a double-sided copper clad laminate B, which is composed of an insulating substrate B21 and two second copper layers 22 fixedly disposed on opposite sides of the insulating substrate B21. Further, the double-sided copper clad laminate B may have the same structure as the double-sided copper clad laminate A, so it is not described here.

[0042] S122: Single-sided circuit patterning is performed on the double-sided copper-clad laminate B, that is, the second component 2 having the inner layer circuit 20 is obtained. For details, please refer to the attached Figure 3As shown. Note: ① The specific production method of the above-mentioned "single-sided circuit pattern production" can adopt the circuit pattern production method commonly used in the field of circuit board technology (specifically including lamination pre-treatment, coating with anti-corrosion photosensitive film, exposure, development, etching and film stripping processing steps), so it will not be described in detail here. ② According to the above-mentioned single-sided circuit pattern production method, the inner layer circuit 20 is formed on one of the second copper layers 22, and the other second copper layer 22 is used to produce the outer layer circuit 6 in the subsequent process. ③ In order to improve the production accuracy of the inner layer circuit 20, before producing the inner layer circuit 20, a positioning target can also be drilled on the edge of the double-sided copper clad board B.

[0043] S2: With the first component 1 facing the inner layer circuit 20, the first component 1 and the second component 2 are pressed and connected through the adhesive layer 3 to obtain an intermediate board B with a blind groove 4; wherein the blind groove 4 is formed by the through groove 11 and the second component 2 partially enclosed at one end of the through groove 11; see the attached Figure 5 shown.

[0044] Specifically, in this embodiment 1, the adhesive layer 3 preferably uses pure glue or low flow glue semi-cured sheet (Low Flow PP), which is arranged on the side of the second component 2 provided with the inner layer circuit 20 through a pre-lamination process, that is, the adhesive layer 3 is attached to the second copper layer 22 formed with the inner layer circuit 20; see the attached Figure 4 As shown. Furthermore, the preferred processing parameters of the pre-lamination process are: pressure 0.4-0.8MPa, pressurization time 20-50s, temperature 40-70°C, and vacuum extraction time 20-50s. Based on the above pre-lamination process parameters, when the adhesive layer 3 is attached to the second component 2 (specifically the second copper layer 22), the curing degree of the adhesive layer 3 changes very little, thereby ensuring that it can continue to melt during subsequent hot pressing and bonding, thereby playing a role in pattern filling and bonding. In addition, the thickness of the adhesive layer 3 and the processing parameters of hot pressing and bonding can be determined according to product design requirements, and this embodiment does not limit it.

[0045] In addition, the attached Figure 5 It can be seen that in the middle plate B, one end of the positioning hole 12 is also closed by the second component 2 and becomes a blind hole.

[0046] S3: After laser cleaning the adhesive layer 3 on the bottom of the blind groove 4, the intermediate board B is sequentially subjected to interlayer conduction, metallized blind grooves, outer layer circuit production and outer layer solder mask operations to obtain a Cavity package carrier.

[0047] Specifically, the specific processing method of the above S3 is:

[0048] S31: Use a CO2 laser drilling machine to remove the adhesive layer 3 on the bottom of the blind groove 4 to expose the inner layer circuit 20 on the bottom of the blind groove 4; wherein the processing parameters of the CO2 laser drilling machine are preferably: laser pulse width is 5-8μs, laser energy is 3.5-6.2MJ, and the number of laser shots is 2-4. It is understandable that by removing the adhesive layer 3 on the blind groove 4, it is beneficial to improve the processing quality of the metallized blind groove operation in the subsequent process, and avoid the copper nodule problem caused by the overflow of the adhesive layer.

[0049] S32: The intermediate board B after the above S31 processing is processed in sequence by CCD drilling, electroplating, resin plugging, grinding and cap electroplating, so as to realize the electrical connection between the first copper layer 10, the inner layer circuit 20 and the second copper layer 22 (that is, the interlayer conduction between the first component 1 and the second component 2 is realized), and the inner wall of the blind groove 4 is metallized. For details, please refer to the attached Figure 6 shown.

[0050] Note: The above-mentioned "CCD drilling, electroplating, resin plugging, grinding and cap electroplating processing" are all common technical means in the field of circuit board processing technology, so they will not be described in detail here, only a brief description:

[0051] ①CCD drilling: a high-precision CCD automatic positioning drilling machine is used to drill holes in the middle plate B to obtain through holes and alignment holes.

[0052] Furthermore, the position accuracy of the CCD automatic positioning drilling machine during drilling can be controlled within ±15 μm, and the processing accuracy is very high, that is, the position accuracy of the produced hole is very high.

[0053] Furthermore, the alignment hole is formed by further drilling the blind hole (i.e., the positioning hole 12) on the middle plate B, which can further improve the alignment accuracy of the holes, grooves, and circuit patterns in the package carrier structure. It can be understood that based on the above CCD drilling, the defect of the "sandwich" structure being easily misaligned during assembly can be further improved.

[0054] ② Copper plating and electroplating: a metallization layer 50 of a set thickness is plated on the inner wall of the blind groove 4 through copper plating and electroplating processes, a connecting copper body 52 of a set thickness is plated on the inner walls of the obtained through holes and alignment holes, and a thickened copper layer 51 of a set thickness is plated on the opposite sides of the first copper layer 10 and the second copper layer 22, respectively. The metallization layer 50, the thickened copper layer 51 and the connecting copper body 52 are interconnected and connected.

[0055] ③ Resin plugging and grinding: fill the through holes with resin, and then use a sanding belt to grind the plate to remove the resin that overflows and remains on the surface of the plate, so that the surface of the plate is smooth.

[0056] ④ Cap plating: copper is coated on the opening of the resin plug hole through the cap plating process.

[0057] For ease of description, this application defines the board after completing the above-mentioned S32 processing as an intermediate board C, and the first copper layer 10 and the thickened copper layer 51 thereon are collectively referred to as the first outer copper layer, and the second copper layer 22 and the thickened copper layer 51 thereon are collectively referred to as the second outer copper layer.

[0058] S33: The obtained intermediate board C is sequentially subjected to pre-coating treatment, anti-corrosion photosensitive film coating, LDI exposure, development, tinning, film stripping, alkaline etching and tin stripping (i.e., outer layer circuit manufacturing process) to realize outer layer circuits 6 on the first outer copper layer and the second outer copper layer respectively; see the attached Figure 7 shown.

[0059] Note: The above-mentioned "pre-coating treatment, anti-corrosion photosensitive film coating, LDI exposure, development, tinning, film stripping, alkaline etching and tin stripping processing" are all common technical means in the field of circuit board processing technology, so they will not be described in detail here, only a brief description:

[0060] ① Pre-lamination treatment: The intermediate plate C is cleaned, heated and dried to facilitate subsequent processes.

[0061] ② Covering with anti-corrosion photosensitive film: Covering the anti-corrosion photosensitive dry film on the first outer copper layer and the second outer copper layer.

[0062] ③LDI exposure and development: LDI exposure is to expose part of the area of ​​the resist photosensitive dry film; development is to remove the unexposed area of ​​the resist photosensitive dry film.

[0063] ④Tin plating: a protective tin layer is plated on the first outer copper layer and the second outer copper layer and on the portions exposed outside the anti-etching photosensitive dry film.

[0064] ⑤ Stripping and alkaline etching: Stripping is to remove the anti-corrosion photosensitive dry film using a strong alkaline solution; alkaline etching is to remove the areas on the first outer copper layer and the second outer copper layer that are not protected by the protective tin layer using a strong alkaline solution.

[0065] ⑥ Tin stripping: using a tin stripping solution (commonly used in the field of circuit boards) to strip off the protective tin layer to obtain the outer layer circuit 6.

[0066] For the convenience of description, this application defines the board after completing the above S33 processing as an intermediate board D.

[0067] S34: Perform an outer layer solder mask operation on the obtained intermediate plate D to achieve a solder mask layer 7 on the obtained intermediate plate D (specifically, the second outer copper layer). Figure 7 As shown; then the Cavity packaging carrier board is obtained.

[0068] Note: The outer layer solder mask operation is a common technical means in the field of circuit board processing technology, so it will not be described in detail here.

[0069] S4: The Cavity package carrier is subjected to conventional surface treatment (such as plating a gold layer on the outer layer circuit 6), molding, electrical testing, finished product inspection, packaging and shipment, etc., to complete the subsequent processing and production of the Cavity package carrier finished product required.

[0070] From the above content, it can be seen that ① the present invention can balance the product warping caused by the large difference between the two components when the first component and the second component are pressed and connected in the later process, thereby greatly improving the flatness of the finished Cavity package carrier, and effectively improving the defect of the "sandwich" structure that is prone to deviation during assembly. ② The present invention uses a CCD automatic positioning drilling machine with a position accuracy that can be controlled within ±15μm to process and produce through holes, alignment holes, etc., so that the position accuracy of the obtained holes is very high; in particular, the alignment holes are further drilled on the positioning holes on the first component, which further improves the alignment accuracy of the holes, grooves and circuit patterns in the package carrier structure, and further improves the defect of the "sandwich" structure that is prone to deviation during assembly. ③ The present invention immediately performs a laser cleaning operation on the adhesive layer on the blind groove after the first component and the second component are pressed and connected, which is beneficial to improving the processing quality of the metallized blind groove operation in the later process, and avoiding the copper nodule problem caused by the overflow of the adhesive layer. In summary, the processing method provided by the present invention is simple, reasonable, and easy to implement, and effectively improves the alignment accuracy of holes, grooves, and circuit patterns in the packaging carrier structure, thereby effectively improving the defect of the "sandwich" structure that is prone to deviation during assembly.

[0071] Embodiment 2:

[0072] The second embodiment provides a cavity packaging carrier, which is manufactured by using the processing method of the cavity packaging carrier described in the first embodiment.

[0073] Specifically, the specific structure of the Cavity package carrier described in this embodiment 2 is as follows: Figure 7As shown, the Cavity package carrier includes a board body, which is provided with an insulating substrate B21, an inner layer circuit 20 and an insulating substrate A13 stacked in sequence, and two layers of outer layer circuits 6 fixedly arranged on the opposite sides of the insulating substrate B21 and the insulating substrate A13, respectively. In particular, a blind groove 4 is formed on the board body, which has a part of the inner layer circuit 20 as the groove bottom and passes through the insulating substrate A13 and one of the outer layer circuits 6 in sequence, and the inner side wall of the blind groove 4 is plated with a metallization layer 50. In addition, a solder mask 7 is provided on one of the outer layer circuits 6 adjacent to the insulating substrate B21.

[0074] As can be seen from the above, the Cavity packaging substrate described in this embodiment 2 has a high degree of alignment, which can effectively reduce the difficulty of packaging and testing circuit board products, and can thus be well applied in the production of electronic products.

[0075] Finally, the prefixes "first", "second", etc. of the component names in this application specification (such as the first component, the second component, etc.), and the suffixes "A", "B", etc. of the component names (such as insulating substrate A, insulating substrate B, etc.) are only for the convenience of description and are not used to limit the scope of the implementation of the patent of this invention.

[0076] In summary, the processing method of the Cavity packaging carrier provided in the present application is simple, reasonable, and easy to implement, and can effectively improve the alignment accuracy of the holes, grooves, and circuit patterns in the packaging carrier structure, thereby effectively improving the defect of the "sandwich" structure that is prone to deviation during assembly; accordingly, the Cavity packaging carrier produced by the processing method has a high degree of alignment, which effectively reduces the difficulty of packaging and testing of circuit board products, and can be well applied to the production of electronic products.

[0077] Many specific details are described in the above description to facilitate a full understanding of the present invention. However, the above description is only a preferred embodiment of the present invention. The present invention can be implemented in many other ways different from those described herein, so the present invention is not limited to the specific implementation disclosed above. At the same time, any person familiar with the art can make many possible changes and modifications to the technical solution of the present invention using the methods and technical contents disclosed above without departing from the scope of the technical solution of the present invention, or modify it into an equivalent embodiment of equivalent changes. Any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention without departing from the content of the technical solution of the present invention still falls within the scope of protection of the technical solution of the present invention.

Claims

1. A method for processing a cavity package carrier, characterized in that: The following steps are involved: S1: manufacturing a first component (1) and a second component (2); Etching and laminating a double-sided copper-clad laminate A to obtain an intermediate plate A having a non-zero warpage and a first copper layer (10) on one side; UV cutting the intermediate plate A to obtain the first component (1) having a through groove (11); Producing a single-sided circuit pattern on a double-sided copper-clad laminate B to obtain the second component (2) provided with an inner layer circuit (20); S2: The first component (1) and the second component (2) are pressed and connected via an adhesive layer (3) in such a manner that the first component (1) and the inner layer circuit (20) are opposite to each other, thereby obtaining an intermediate board B provided with a blind groove (4); wherein the blind groove (4) is formed by partially enclosing the through groove (11) and the second component (2) closed at one end of the through groove (11); S3: After laser cleaning of the adhesive layer (3) on the bottom of the blind groove (4), the intermediate board B is sequentially subjected to interlayer conduction, metallized blind grooves, outer layer circuit fabrication and outer layer solder masking operations to obtain a Cavity packaging carrier board.

2. The method for processing a cavity package carrier according to claim 1, characterized in that: In the above S1, the warping degrees of the intermediate plate A and the first component (1) are both 2 to 4 mm.

3. The method for processing a cavity package substrate according to claim 1, wherein: In the above S1, when the intermediate plate A is UV cut, positioning holes (12) are also processed on the intermediate plate A.

4. The method for processing a cavity package carrier according to claim 1, characterized in that: In the above S1, the specific processing parameters for UV cutting the intermediate plate A are: light output power 50-70W, light frequency 800-1200Hz, and galvanometer speed 800-1200mm / s.

5. The method for processing a cavity package carrier according to claim 1, characterized in that: In the above S2, the adhesive layer (3) is made of pure glue or low-flow glue prepreg, and is arranged on the side of the second component (2) provided with the inner layer circuit (20) through a pre-lamination process.

6. The method for processing a cavity package carrier according to claim 1, characterized in that: In the above S3, a CO2 laser drilling machine is used to remove the adhesive layer (3) on the bottom of the blind groove (4), and the processing parameters of the CO2 laser drilling machine are: laser pulse width is 5 to 8 μs, laser energy is 3.5 to 6.2 MJ, and the number of laser shots is 2 to 4 shots.

7. The method for processing a cavity package carrier according to claim 1, characterized in that: In the above S3, the interlayer conduction method includes CCD drilling, electroplating, resin plugging, grinding and cap electroplating in sequence; wherein the position accuracy of the CCD drilling is controlled within ±15 μm.

8. The method for processing a cavity package carrier according to claim 1, characterized in that: In the above S3, the method for manufacturing the outer layer circuit includes sequentially performing pre-coating treatment, coating with an anti-corrosion photosensitive film, LDI exposure, development, tin plating, film stripping, alkaline etching and tin stripping.

9. The method for processing a cavity package carrier according to claim 1, characterized in that: The Cavity package carrier is subjected to conventional surface treatment, molding, electrical testing, finished product inspection, packaging and shipment in sequence, thus completing the production of the subsequent required Cavity package carrier finished product.

10. A Cavity packaging carrier, characterized in that: The Cavity package carrier is manufactured by the processing method of any one of claims 1 to 9.

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